99 lines
2.5 KiB
C++
99 lines
2.5 KiB
C++
/* Copyright (C) 2008, 2009, 2011 Free Software Foundation, Inc.
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Contributed by Richard Henderson <rth@redhat.com>.
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This file is part of the GNU Transactional Memory Library (libitm).
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Libitm is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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namespace GTM HIDDEN {
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#ifdef __x86_64__
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/* ??? This doesn't work for Win64. */
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typedef struct gtm_jmpbuf
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{
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void *cfa;
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unsigned long rip;
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unsigned long rbx;
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unsigned long rbp;
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unsigned long r12;
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unsigned long r13;
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unsigned long r14;
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unsigned long r15;
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} gtm_jmpbuf;
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#else
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typedef struct gtm_jmpbuf
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{
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void *cfa;
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unsigned long ebx;
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unsigned long esi;
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unsigned long edi;
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unsigned long ebp;
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unsigned long eip;
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} gtm_jmpbuf;
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#endif
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/* x86 doesn't require strict alignment for the basic types. */
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#define STRICT_ALIGNMENT 0
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/* x86 uses a fixed page size of 4K. */
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#define PAGE_SIZE 4096
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#define FIXED_PAGE_SIZE 1
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/* The size of one line in hardware caches (in bytes). */
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#define HW_CACHELINE_SIZE 64
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static inline void
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cpu_relax (void)
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{
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__asm volatile ("rep; nop" : : : "memory");
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}
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static inline void
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atomic_read_barrier (void)
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{
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/* x86 is a strong memory ordering machine. */
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__asm volatile ("" : : : "memory");
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}
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static inline void
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atomic_write_barrier (void)
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{
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/* x86 is a strong memory ordering machine. */
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__asm volatile ("" : : : "memory");
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}
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} // namespace GTM
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// We'll be using some of the cpu builtins, and their associated types.
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#ifndef __cplusplus
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/* ??? It's broken for C++. */
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#include <x86intrin.h>
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#else
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# ifdef __SSE2__
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# include <emmintrin.h>
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# elif defined(__SSE__)
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# include <xmmintrin.h>
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# endif
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# ifdef __AVX__
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# include <immintrin.h>
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# endif
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#endif
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