bf7b94d407
Hardware multipliers that support widening 32-bit multiplication can
be used to perform a 64-bit * 64-bit multiplication more efficiently
than a software implementation.
The following equation is used to perform 64-bit multiplication for
devices with "32bit" or "f5series" hardware multiply versions:
64bit_result = (low32_op0 * lop32_op1)
+ ((low32_op0 * high32_op1) << 32)
+ ((high32_op0 * low32_op1) << 32)
libgcc/ChangeLog:
* config/msp430/lib2hw_mul.S (mult64_hw): New.
(if MUL_32): Use mult64_hw for __muldi3.
(if MUL_F5): Use mult64_hw for __muldi3.
* config/msp430/lib2mul.c (__muldi3): New.
* config/msp430/t-msp430 (LIB2FUNCS_EXCLUDE): Define.
475 lines
16 KiB
ArmAsm
475 lines
16 KiB
ArmAsm
; Copyright (C) 2014-2020 Free Software Foundation, Inc.
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; Contributed by Red Hat.
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;
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; This file is free software; you can redistribute it and/or modify it
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; under the terms of the GNU General Public License as published by the
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; Free Software Foundation; either version 3, or (at your option) any
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; later version.
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;
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; This file is distributed in the hope that it will be useful, but
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; WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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; General Public License for more details.
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;
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; Under Section 7 of GPL version 3, you are granted additional
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; permissions described in the GCC Runtime Library Exception, version
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; 3.1, as published by the Free Software Foundation.
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;
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; You should have received a copy of the GNU General Public License and
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; a copy of the GCC Runtime Library Exception along with this program;
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; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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; <http://www.gnu.org/licenses/>.
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;; Macro to start a multiply function. Each function has three
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;; names, and hence three entry points - although they all go
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;; through the same code. The first name is the version generated
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;; by GCC. The second is the MSP430 EABI mandated name for the
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;; *software* version of the function. The third is the EABI
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;; mandated name for the *hardware* version of the function.
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;;
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;; Since we are using the hardware and software names to point
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;; to the same code this effectively means that we are mapping
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;; the software function onto the hardware function. Thus if
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;; the library containing this code is linked into an application
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;; (before the libgcc.a library) *all* multiply functions will
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;; be mapped onto the hardware versions.
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;;
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;; We construct each function in its own section so that linker
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;; garbage collection can be used to delete any unused functions
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;; from this file.
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.macro start_func gcc_name eabi_soft_name eabi_hard_name
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.pushsection .text.\gcc_name,"ax",@progbits
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.p2align 1
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.global \eabi_hard_name
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.type \eabi_hard_name , @function
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\eabi_hard_name:
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.global \eabi_soft_name
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.type \eabi_soft_name , @function
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\eabi_soft_name:
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.global \gcc_name
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.type \gcc_name , @function
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\gcc_name:
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PUSH.W sr ; Save current interrupt state
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DINT ; Disable interrupts
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NOP ; Account for latency
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.endm
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;; End a function started with the start_func macro.
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.macro end_func name
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#ifdef __MSP430X_LARGE__
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POP.W sr
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RETA
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#else
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RETI
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#endif
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.size \name , . - \name
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.popsection
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.endm
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;; Like the start_func macro except that it is used to
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;; create a false entry point that just jumps to the
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;; software function (implemented elsewhere).
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.macro fake_func gcc_name eabi_soft_name eabi_hard_name
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.pushsection .text.\gcc_name,"ax",@progbits
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.p2align 1
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.global \eabi_hard_name
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.type \eabi_hard_name , @function
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\eabi_hard_name:
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.global \gcc_name
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.type \gcc_name , @function
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\gcc_name:
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#ifdef __MSP430X_LARGE__
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BRA #\eabi_soft_name
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#else
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BR #\eabi_soft_name
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#endif
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.size \gcc_name , . - \gcc_name
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.popsection
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.endm
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.macro mult16 OP1, OP2, RESULT
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;* * 16-bit hardware multiply: int16 = int16 * int16
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;*
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;* - Operand 1 is in R12
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;* - Operand 2 is in R13
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;* - Result is in R12
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;*
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;* To ensure that the multiply is performed atomically, interrupts are
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;* disabled upon routine entry. Interrupt state is restored upon exit.
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;*
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;* Registers used: R12, R13
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;*
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;* Macro arguments are the memory locations of the hardware registers.
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MOV.W r12, &\OP1 ; Load operand 1 into multiplier
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MOV.W r13, &\OP2 ; Load operand 2 which triggers MPY
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MOV.W &\RESULT, r12 ; Move result into return register
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.endm
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.macro mult1632 OP1, OP2, RESLO, RESHI
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;* * 16-bit hardware multiply with a 32-bit result:
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;* int32 = int16 * int16
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;* uint32 = uint16 * uint16
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;*
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;* - Operand 1 is in R12
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;* - Operand 2 is in R13
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;* - Result is in R12, R13
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;*
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;* To ensure that the multiply is performed atomically, interrupts are
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;* disabled upon routine entry. Interrupt state is restored upon exit.
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;*
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;* Registers used: R12, R13
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;*
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;* Macro arguments are the memory locations of the hardware registers.
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MOV.W r12, &\OP1 ; Load operand 1 into multiplier
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MOV.W r13, &\OP2 ; Load operand 2 which triggers MPY
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MOV.W &\RESLO, r12 ; Move low result into return register
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MOV.W &\RESHI, r13 ; Move high result into return register
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.endm
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.macro mult32 OP1, OP2, MAC_OP1, MAC_OP2, RESLO, RESHI
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;* * 32-bit hardware multiply with a 32-bit result using 16 multiply and accumulate:
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;* int32 = int32 * int32
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;*
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;* - Operand 1 is in R12, R13
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;* - Operand 2 is in R14, R15
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;* - Result is in R12, R13
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;*
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;* To ensure that the multiply is performed atomically, interrupts are
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;* disabled upon routine entry. Interrupt state is restored upon exit.
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;*
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;* Registers used: R12, R13, R14, R15
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;*
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;* Macro arguments are the memory locations of the hardware registers.
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MOV.W r12, &\OP1 ; Load operand 1 Low into multiplier
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MOV.W r14, &\OP2 ; Load operand 2 Low which triggers MPY
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MOV.W r12, &\MAC_OP1 ; Load operand 1 Low into mac
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MOV.W &\RESLO, r12 ; Low 16-bits of result ready for return
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MOV.W &\RESHI, &\RESLO ; MOV intermediate mpy high into low
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MOV.W r15, &\MAC_OP2 ; Load operand 2 High, trigger MAC
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MOV.W r13, &\MAC_OP1 ; Load operand 1 High
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MOV.W r14, &\MAC_OP2 ; Load operand 2 Lo, trigger MAC
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MOV.W &\RESLO, r13 ; Upper 16-bits result ready for return
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.endm
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.macro mult32_hw OP1_LO OP1_HI OP2_LO OP2_HI RESLO RESHI
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;* * 32-bit hardware multiply with a 32-bit result
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;* int32 = int32 * int32
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;*
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;* - Operand 1 is in R12, R13
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;* - Operand 2 is in R14, R15
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;* - Result is in R12, R13
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;*
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;* To ensure that the multiply is performed atomically, interrupts are
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;* disabled upon routine entry. Interrupt state is restored upon exit.
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;*
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;* Registers used: R12, R13, R14, R15
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;*
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;* Macro arguments are the memory locations of the hardware registers.
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MOV.W r12, &\OP1_LO ; Load operand 1 Low into multiplier
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MOV.W r13, &\OP1_HI ; Load operand 1 High into multiplier
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MOV.W r14, &\OP2_LO ; Load operand 2 Low into multiplier
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MOV.W r15, &\OP2_HI ; Load operand 2 High, trigger MPY
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MOV.W &\RESLO, r12 ; Ready low 16-bits for return
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MOV.W &\RESHI, r13 ; Ready high 16-bits for return
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.endm
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.macro mult3264_hw OP1_LO OP1_HI OP2_LO OP2_HI RES0 RES1 RES2 RES3
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;* * 32-bit hardware multiply with a 64-bit result
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;* int64 = int32 * int32
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;* uint64 = uint32 * uint32
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;*
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;* - Operand 1 is in R12, R13
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;* - Operand 2 is in R14, R15
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;* - Result is in R12, R13, R14, R15
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;*
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;* To ensure that the multiply is performed atomically, interrupts are
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;* disabled upon routine entry. Interrupt state is restored upon exit.
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;*
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;* Registers used: R12, R13, R14, R15
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;*
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;* Macro arguments are the memory locations of the hardware registers.
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MOV.W r12, &\OP1_LO ; Load operand 1 Low into multiplier
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MOV.W r13, &\OP1_HI ; Load operand 1 High into multiplier
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MOV.W r14, &\OP2_LO ; Load operand 2 Low into multiplier
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MOV.W r15, &\OP2_HI ; Load operand 2 High, trigger MPY
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MOV.W &\RES0, R12 ; Ready low 16-bits for return
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MOV.W &\RES1, R13 ;
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MOV.W &\RES2, R14 ;
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MOV.W &\RES3, R15 ; Ready high 16-bits for return
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.endm
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.macro mult64_hw MPY32_LO MPY32_HI OP2_LO OP2_HI RES0 RES1 RES2 RES3
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;* * 64-bit hardware multiply with a 64-bit result
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;* int64 = int64 * int64
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;*
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;* - Operand 1 is in R8, R9, R10, R11
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;* - Operand 2 is in R12, R13, R14, R15
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;* - Result is in R12, R13, R14, R15
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;*
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;* 64-bit multiplication is achieved using the 32-bit hardware multiplier with
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;* the following equation:
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;* R12:R15 = (R8:R9 * R12:R13) + ((R8:R9 * R14:R15) << 32) + ((R10:R11 * R12:R13) << 32)
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;*
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;* The left shift by 32 is handled with minimal cost by saving the two low
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;* words and discarding the two high words.
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;*
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;* To ensure that the multiply is performed atomically, interrupts are
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;* disabled upon routine entry. Interrupt state is restored upon exit.
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;*
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;* Registers used: R6, R7, R8, R9, R10, R11, R12, R13, R14, R15
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;*
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;* Macro arguments are the memory locations of the hardware registers.
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;*
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#if defined(__MSP430X_LARGE__)
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PUSHM.A #5, R10
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#elif defined(__MSP430X__)
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PUSHM.W #5, R10
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#else
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PUSH R10 { PUSH R9 { PUSH R8 { PUSH R7 { PUSH R6
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#endif
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; Multiply the low 32-bits of op0 and the high 32-bits of op1.
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MOV.W R8, &\MPY32_LO
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MOV.W R9, &\MPY32_HI
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MOV.W R14, &\OP2_LO
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MOV.W R15, &\OP2_HI
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; Save the low 32-bits of the result.
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MOV.W &\RES0, R6
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MOV.W &\RES1, R7
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; Multiply the high 32-bits of op0 and the low 32-bits of op1.
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MOV.W R10, &\MPY32_LO
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MOV.W R11, &\MPY32_HI
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MOV.W R12, &\OP2_LO
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MOV.W R13, &\OP2_HI
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; Add the low 32-bits of the result to the previously saved result.
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ADD.W &\RES0, R6
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ADDC.W &\RES1, R7
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; Multiply the low 32-bits of op0 and op1.
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MOV.W R8, &\MPY32_LO
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MOV.W R9, &\MPY32_HI
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MOV.W R12, &\OP2_LO
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MOV.W R13, &\OP2_HI
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; Write the return values
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MOV.W &\RES0, R12
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MOV.W &\RES1, R13
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MOV.W &\RES2, R14
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MOV.W &\RES3, R15
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; Add the saved low 32-bit results from earlier to the high 32-bits of
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; this result, effectively shifting those two results left by 32 bits.
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ADD.W R6, R14
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ADDC.W R7, R15
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#if defined(__MSP430X_LARGE__)
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POPM.A #5, R10
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#elif defined(__MSP430X__)
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POPM.W #5, R10
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#else
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POP R6 { POP R7 { POP R8 { POP R9 { POP R10
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#endif
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.endm
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;; EABI mandated names:
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;;
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;; int16 __mspabi_mpyi (int16 x, int16 y)
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;; Multiply int by int.
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;; int16 __mspabi_mpyi_hw (int16 x, int16 y)
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;; Multiply int by int. Uses hardware MPY16 or MPY32.
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;; int16 __mspabi_mpyi_f5hw (int16 x, int16 y)
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;; Multiply int by int. Uses hardware MPY32 (F5xx devices and up).
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;;
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;; int32 __mspabi_mpyl (int32 x, int32 y);
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;; Multiply long by long.
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;; int32 __mspabi_mpyl_hw (int32 x, int32 y)
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;; Multiply long by long. Uses hardware MPY16.
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;; int32 __mspabi_mpyl_hw32 (int32 x, int32 y)
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;; Multiply long by long. Uses hardware MPY32 (F4xx devices).
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;; int32 __mspabi_mpyl_f5hw (int32 x, int32 y)
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;; Multiply long by long. Uses hardware MPY32 (F5xx devices and up).
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;;
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;; int64 __mspabi_mpyll (int64 x, int64 y)
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;; Multiply long long by long long.
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;; int64 __mspabi_mpyll_hw (int64 x, int64 y)
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;; Multiply long long by long long. Uses hardware MPY16.
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;; int64 __mspabi_mpyll_hw32 (int64 x, int64 y)
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;; Multiply long long by long long. Uses hardware MPY32 (F4xx devices).
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;; int64 __mspabi_mpyll_f5hw (int64 x, int64 y)
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;; Multiply long long by long long. Uses hardware MPY32 (F5xx devices and up).
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;;
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;; int32 __mspabi_mpysl (int16 x, int16 y)
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;; Multiply int by int; result is long.
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;; int32 __mspabi_mpysl_hw(int16 x, int16 y)
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;; Multiply int by int; result is long. Uses hardware MPY16 or MPY32
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;; int32 __mspabi_mpysl_f5hw(int16 x, int16 y)
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;; Multiply int by int; result is long. Uses hardware MPY32 (F5xx devices and up).
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;;
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;; int64 __mspabi_mpysll(int32 x, int32 y)
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;; Multiply long by long; result is long long.
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;; int64 __mspabi_mpysll_hw(int32 x, int32 y)
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;; Multiply long by long; result is long long. Uses hardware MPY16.
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;; int64 __mspabi_mpysll_hw32(int32 x, int32 y)
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;; Multiply long by long; result is long long. Uses hardware MPY32 (F4xx devices).
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;; int64 __mspabi_mpysll_f5hw(int32 x, int32 y)
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;; Multiply long by long; result is long long. Uses hardware MPY32 (F5xx devices and up).
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;;
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;; uint32 __mspabi_mpyul(uint16 x, uint16 y)
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;; Multiply unsigned int by unsigned int; result is unsigned long.
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;; uint32 __mspabi_mpyul_hw(uint16 x, uint16 y)
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;; Multiply unsigned int by unsigned int; result is unsigned long. Uses hardware MPY16 or MPY32
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;; uint32 __mspabi_mpyul_f5hw(uint16 x, uint16 y)
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;; Multiply unsigned int by unsigned int; result is unsigned long. Uses hardware MPY32 (F5xx devices and up).
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;;
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;; uint64 __mspabi_mpyull(uint32 x, uint32 y)
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;; Multiply unsigned long by unsigned long; result is unsigned long long.
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;; uint64 __mspabi_mpyull_hw(uint32 x, uint32 y)
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;; Multiply unsigned long by unsigned long; result is unsigned long long. Uses hardware MPY16
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;; uint64 __mspabi_mpyull_hw32(uint32 x, uint32 y)
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;; Multiply unsigned long by unsigned long; result is unsigned long long. Uses hardware MPY32 (F4xx devices).
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;; uint64 __mspabi_mpyull_f5hw(uint32 x, uint32 y)
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;; Multiply unsigned long by unsigned long; result is unsigned long long. Uses hardware MPY32 (F5xx devices and up)
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;;;; The register names below are the standardised versions used across TI
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;;;; literature.
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;; Hardware multiply register addresses for devices with 16-bit hardware
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;; multiply.
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.set MPY, 0x0130
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.set MPYS, 0x0132
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.set MAC, 0x0134
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.set OP2, 0x0138
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.set RESLO, 0x013A
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.set RESHI, 0x013C
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;; Hardware multiply register addresses for devices with 32-bit (non-f5)
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;; hardware multiply.
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.set MPY32L, 0x0140
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.set MPY32H, 0x0142
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.set MPYS32L, 0x0144
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.set MPYS32H, 0x0146
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.set OP2L, 0x0150
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.set OP2H, 0x0152
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.set RES0, 0x0154
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.set RES1, 0x0156
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.set RES2, 0x0158
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.set RES3, 0x015A
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;; Hardware multiply register addresses for devices with f5series hardware
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;; multiply.
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;; The F5xxx series of MCUs support the same 16-bit and 32-bit multiply
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;; as the second generation hardware, but they are accessed from different
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;; memory registers.
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;; These names AREN'T standard. We've appended _F5 to the standard names.
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.set MPY_F5, 0x04C0
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.set MPYS_F5, 0x04C2
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.set MAC_F5, 0x04C4
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.set OP2_F5, 0x04C8
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.set RESLO_F5, 0x04CA
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.set RESHI_F5, 0x04CC
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.set MPY32L_F5, 0x04D0
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.set MPY32H_F5, 0x04D2
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.set MPYS32L_F5, 0x04D4
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.set MPYS32H_F5, 0x04D6
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.set OP2L_F5, 0x04E0
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.set OP2H_F5, 0x04E2
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.set RES0_F5, 0x04E4
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.set RES1_F5, 0x04E6
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.set RES2_F5, 0x04E8
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.set RES3_F5, 0x04EA
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#if defined MUL_16
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;; First generation MSP430 hardware multiplies ...
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start_func __mulhi2 __mspabi_mpyi __mspabi_mpyi_hw
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mult16 MPY, OP2, RESLO
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end_func __mulhi2
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start_func __mulhisi2 __mspabi_mpysl __mspabi_mpysl_hw
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mult1632 MPYS, OP2, RESLO, RESHI
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end_func __mulhisi2
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start_func __umulhisi2 __mspabi_mpyul __mspabi_mpyul_hw
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mult1632 MPY, OP2, RESLO, RESHI
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end_func __umulhisi2
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start_func __mulsi2 __mspabi_mpyl __mspabi_mpyl_hw
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mult32 MPY, OP2, MAC, OP2, RESLO, RESHI
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end_func __mulsi2
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;; FIXME: We do not have hardware implementations of these
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;; routines, so just jump to the software versions instead.
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fake_func __mulsidi2 __mspabi_mpysll __mspabi_mpysll_hw
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fake_func __umulsidi2 __mspabi_mpyull __mspabi_mpyull_hw
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fake_func __muldi3 __mspabi_mpyll __mspabi_mpyll_hw
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#elif defined MUL_32
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;; Second generation MSP430 hardware multiplies ...
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start_func __mulhi2 __mspabi_mpyi __mspabi_mpyi_hw
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mult16 MPY, OP2, RESLO
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end_func __mulhi2
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start_func __mulhisi2 __mspabi_mpysl __mspabi_mpysl_hw
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mult1632 MPYS, OP2, RESLO, RESHI
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end_func __mulhisi2
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start_func __umulhisi2 __mspabi_mpyul __mspabi_mpyul_hw
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mult1632 MPY, OP2, RESLO, RESHI
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end_func __umulhisi2
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start_func __mulsi2 __mspabi_mpyl __mspabi_mpyl_hw32
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mult32_hw MPY32L, MPY32H, OP2L, OP2H, RES0, RES1
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end_func __mulsi2
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start_func __mulsidi2 __mspabi_mpysll __mspabi_mpysll_hw32
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mult3264_hw MPYS32L, MPYS32H, OP2L, OP2H, RES0, RES1, RES2, RES3
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end_func __mulsidi2
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start_func __umulsidi2 __mspabi_mpyull __mspabi_mpyull_hw32
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mult3264_hw MPY32L, MPY32H, OP2L, OP2H, RES0, RES1, RES2, RES3
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end_func __umulsidi2
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start_func __muldi3 __mspabi_mpyll __mspabi_mpyll_hw32
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mult64_hw MPY32L, MPY32H, OP2L, OP2H, RES0, RES1, RES2, RES3
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end_func __muldi3
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#elif defined MUL_F5
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/* The F5xxx series of MCUs support the same 16-bit and 32-bit multiply
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as the second generation hardware, but they are accessed from different
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memory registers. */
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start_func __mulhi2 __mspabi_mpyi __mspabi_mpyi_f5hw
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mult16 MPY_F5, OP2_F5, RESLO_F5
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end_func __mulhi2
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start_func __mulhisi2 __mspabi_mpysl __mspabi_mpysl_f5hw
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mult1632 MPYS_F5, OP2_F5, RESLO_F5, RESHI_F5
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end_func __mulhisi2
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start_func __umulhisi2 __mspabi_mpyul __mspabi_mpyul_f5hw
|
|
mult1632 MPY_F5, OP2_F5, RESLO_F5, RESHI_F5
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end_func __umulhisi2
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start_func __mulsi2 __mspabi_mpyl __mspabi_mpyl_f5hw
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mult32_hw MPY32L_F5, MPY32H_F5, OP2L_F5, OP2H_F5, RES0_F5, RES1_F5
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end_func __mulsi2
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start_func __mulsidi2 __mspabi_mpysll __mspabi_mpysll_f5hw
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mult3264_hw MPYS32L_F5, MPYS32H_F5, OP2L_F5, OP2H_F5, RES0_F5, RES1_F5, RES2_F5, RES3_F5
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end_func __mulsidi2
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start_func __umulsidi2 __mspabi_mpyull __mspabi_mpyull_f5hw
|
|
mult3264_hw MPY32L_F5, MPY32H_F5, OP2L_F5, OP2H_F5, RES0_F5, RES1_F5, RES2_F5, RES3_F5
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end_func __umulsidi2
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start_func __muldi3 __mspabi_mpyll __mspabi_mpyll_f5hw
|
|
mult64_hw MPY32L_F5, MPY32H_F5, OP2L_F5, OP2H_F5, RES0_F5, RES1_F5, RES2_F5, RES3_F5
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end_func __muldi3
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#else
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#error MUL type not defined
|
|
#endif
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