aa118a03c4
From-SVN: r206301
65 lines
2.4 KiB
C++
65 lines
2.4 KiB
C++
// Low-level type for atomic operations -*- C++ -*-
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// Copyright (C) 2004-2014 Free Software Foundation, Inc.
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//
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// This file is part of the GNU ISO C++ Library. This library is free
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// software; you can redistribute it and/or modify it under the
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// terms of the GNU General Public License as published by the
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// Free Software Foundation; either version 3, or (at your option)
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// any later version.
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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// Under Section 7 of GPL version 3, you are granted additional
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// permissions described in the GCC Runtime Library Exception, version
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// 3.1, as published by the Free Software Foundation.
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// You should have received a copy of the GNU General Public License and
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// a copy of the GCC Runtime Library Exception along with this program;
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// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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// <http://www.gnu.org/licenses/>.
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#ifndef _GLIBCXX_ATOMIC_WORD_H
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#define _GLIBCXX_ATOMIC_WORD_H 1
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#include <bits/cxxabi_tweaks.h>
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typedef int _Atomic_word;
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namespace __gnu_cxx _GLIBCXX_VISIBILITY(default)
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{
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// Test the first byte of __g and ensure that no loads are hoisted across
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// the test.
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inline bool
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__test_and_acquire (__cxxabiv1::__guard *__g)
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{
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unsigned char __c;
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unsigned char *__p = reinterpret_cast<unsigned char *>(__g);
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// ldN.acq is a load with an implied hoist barrier.
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// would ld8+mask be faster than just doing an ld1?
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__asm __volatile ("ld1.acq %0 = %1" : "=r"(__c) : "m"(*__p) : "memory");
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return __c != 0;
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}
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// Set the first byte of __g to 1 and ensure that no stores are sunk
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// across the store.
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inline void
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__set_and_release (__cxxabiv1::__guard *__g)
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{
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unsigned char *__p = reinterpret_cast<unsigned char *>(__g);
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// stN.rel is a store with an implied sink barrier.
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// could load word, set flag, and CAS it back
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__asm __volatile ("st1.rel %0 = %1" : "=m"(*__p) : "r"(1) : "memory");
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}
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// We don't define the _BARRIER macros on ia64 because the barriers are
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// included in the test and set, above.
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#define _GLIBCXX_GUARD_TEST_AND_ACQUIRE(G) __gnu_cxx::__test_and_acquire (G)
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#define _GLIBCXX_GUARD_SET_AND_RELEASE(G) __gnu_cxx::__set_and_release (G)
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}
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#endif
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