Go to file
Michael Meissner a16a872d44 vector.md (VEC_L): Add V1TI mode to vector types.
[gcc]
2014-03-12  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/vector.md (VEC_L): Add V1TI mode to vector types.
	(VEC_M): Likewise.
	(VEC_N): Likewise.
	(VEC_R): Likewise.
	(VEC_base): Likewise.
	(mov<MODE>, VEC_M modes): If we are loading TImode into VSX
	registers, we need to swap double words in little endian mode.

	* config/rs6000/rs6000-modes.def (V1TImode): Add new vector mode
	to be a container mode for 128-bit integer operations added in ISA
	2.07.  Unlike TImode and PTImode, the preferred register set is
	the Altivec/VMX registers for the 128-bit operations.

	* config/rs6000/rs6000-protos.h (rs6000_move_128bit_ok_p): Add
	declarations.
	(rs6000_split_128bit_ok_p): Likewise.

	* config/rs6000/rs6000-builtin.def (BU_P8V_AV_3): Add new support
	macros for creating ISA 2.07 normal and overloaded builtin
	functions with 3 arguments.
	(BU_P8V_OVERLOAD_3): Likewise.
	(VPERM_1T): Add support for V1TImode in 128-bit vector operations
	for use as overloaded functions.
	(VPERM_1TI_UNS): Likewise.
	(VSEL_1TI): Likewise.
	(VSEL_1TI_UNS): Likewise.
	(ST_INTERNAL_1ti): Likewise.
	(LD_INTERNAL_1ti): Likewise.
	(XXSEL_1TI): Likewise.
	(XXSEL_1TI_UNS): Likewise.
	(VPERM_1TI): Likewise.
	(VPERM_1TI_UNS): Likewise.
	(XXPERMDI_1TI): Likewise.
	(SET_1TI): Likewise.
	(LXVD2X_V1TI): Likewise.
	(STXVD2X_V1TI): Likewise.
	(VEC_INIT_V1TI): Likewise.
	(VEC_SET_V1TI): Likewise.
	(VEC_EXT_V1TI): Likewise.
	(EQV_V1TI): Likewise.
	(NAND_V1TI): Likewise.
	(ORC_V1TI): Likewise.
	(VADDCUQ): Add support for 128-bit integer arithmetic instructions
	added in ISA 2.07.  Add both normal 'altivec' builtins, and the
	overloaded builtin.
	(VADDUQM): Likewise.
	(VSUBCUQ): Likewise.
	(VADDEUQM): Likewise.
	(VADDECUQ): Likewise.
	(VSUBEUQM): Likewise.
	(VSUBECUQ): Likewise.

	* config/rs6000/rs6000-c.c (__int128_type): New static to hold
	__int128_t and __uint128_t types.
	(__uint128_type): Likewise.
	(altivec_categorize_keyword): Add support for vector __int128_t,
	vector __uint128_t, vector __int128, and vector unsigned __int128
	as a container type for TImode operations that need to be done in
	VSX/Altivec registers.
	(rs6000_macro_to_expand): Likewise.
	(altivec_overloaded_builtins): Add ISA 2.07 overloaded functions
	to support 128-bit integer instructions vaddcuq, vadduqm,
	vaddecuq, vaddeuqm, vsubcuq, vsubuqm, vsubecuq, vsubeuqm.
	(altivec_resolve_overloaded_builtin): Add support for V1TImode.

	* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Add support
	for V1TImode, and set up preferences to use VSX/Altivec
	registers.  Setup VSX reload handlers.
	(rs6000_debug_reg_global): Likewise.
	(rs6000_init_hard_regno_mode_ok): Likewise.
	(rs6000_preferred_simd_mode): Likewise.
	(vspltis_constant): Do not allow V1TImode as easy altivec
	constants.
	(easy_altivec_constant): Likewise.
	(output_vec_const_move): Likewise.
	(rs6000_expand_vector_set): Convert V1TImode set and extract to
	simple move.
	(rs6000_expand_vector_extract): Likewise.
	(reg_offset_addressing_ok_p): Setup V1TImode to use VSX reg+reg
	addressing.
	(rs6000_const_vec): Add support for V1TImode.
	(rs6000_emit_le_vsx_load): Swap double words when loading or
	storing TImode/V1TImode.
	(rs6000_emit_le_vsx_store): Likewise.
	(rs6000_emit_le_vsx_move): Likewise.
	(rs6000_emit_move): Add support for V1TImode.
	(altivec_expand_ld_builtin): Likewise.
	(altivec_expand_st_builtin): Likewise.
	(altivec_expand_vec_init_builtin): Likewise.
	(altivec_expand_builtin): Likewise.
	(rs6000_init_builtins): Add support for V1TImode type.  Add
	support for ISA 2.07 128-bit integer builtins.  Define type names
	for the VSX/Altivec vector types.
	(altivec_init_builtins): Add support for overloaded vector
	functions with V1TImode type.
	(rs6000_preferred_reload_class): Prefer Altivec registers for
	V1TImode.
	(rs6000_move_128bit_ok_p): Move 128-bit move/split validation to
	external function.
	(rs6000_split_128bit_ok_p): Likewise.
	(rs6000_handle_altivec_attribute): Create V1TImode from vector
	__int128_t and vector __uint128_t.

	* config/rs6000/vsx.md (VSX_L): Add V1TImode to vector iterators
	and mode attributes.
	(VSX_M): Likewise.
	(VSX_M2): Likewise.
	(VSm): Likewise.
	(VSs): Likewise.
	(VSr): Likewise.
	(VSv): Likewise.
	(VS_scalar): Likewise.
	(VS_double): Likewise.
	(vsx_set_v1ti): New builtin function to create V1TImode from
	TImode.

	* config/rs6000/rs6000.h (TARGET_VADDUQM): New macro to say
	whether we support the ISA 2.07 128-bit integer arithmetic
	instructions.
	(ALTIVEC_OR_VSX_VECTOR_MODE): Add V1TImode.
	(enum rs6000_builtin_type_index): Add fields to hold V1TImode
	and TImode types for use with the builtin functions.
	(V1TI_type_node): Likewise.
	(unsigned_V1TI_type_node): Likewise.
	(intTI_type_internal_node): Likewise.
	(uintTI_type_internal_node): Likewise.

	* config/rs6000/altivec.md (UNSPEC_VADDCUQ): New unspecs for ISA
	2.07 128-bit builtin functions.
	(UNSPEC_VADDEUQM): Likewise.
	(UNSPEC_VADDECUQ): Likewise.
	(UNSPEC_VSUBCUQ): Likewise.
	(UNSPEC_VSUBEUQM): Likewise.
	(UNSPEC_VSUBECUQ): Likewise.
	(VM): Add V1TImode to vector mode iterators.
	(VM2): Likewise.
	(VI_unit): Likewise.
	(altivec_vadduqm): Add ISA 2.07 128-bit binary builtins.
	(altivec_vaddcuq): Likewise.
	(altivec_vsubuqm): Likewise.
	(altivec_vsubcuq): Likewise.
	(altivec_vaddeuqm): Likewise.
	(altivec_vaddecuq): Likewise.
	(altivec_vsubeuqm): Likewise.
	(altivec_vsubecuq): Likewise.

	* config/rs6000/rs6000.md (FMOVE128_GPR): Add V1TImode to vector
	mode iterators.
	(BOOL_128): Likewise.
	(BOOL_REGS_OUTPUT): Likewise.
	(BOOL_REGS_OP1): Likewise.
	(BOOL_REGS_OP2): Likewise.
	(BOOL_REGS_UNARY): Likewise.
	(BOOL_REGS_AND_CR0): Likewise.

	* config/rs6000/altivec.h (vec_vaddcuq): Add support for ISA 2.07
	128-bit integer builtin support.
	(vec_vadduqm): Likewise.
	(vec_vaddecuq): Likewise.
	(vec_vaddeuqm): Likewise.
	(vec_vsubecuq): Likewise.
	(vec_vsubeuqm): Likewise.
	(vec_vsubcuq): Likewise.
	(vec_vsubuqm): Likewise.

	* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
	Document vec_vaddcuq, vec_vadduqm, vec_vaddecuq, vec_vaddeuqm,
	vec_subecuq, vec_subeuqm, vec_vsubcuq, vec_vsubeqm builtins adding
	128-bit integer add/subtract to ISA 2.07.

[gcc/testsuite]
2014-03-12  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/p8vector-int128-1.c: New test to test ISA
	2.07 128-bit arithmetic.
	* gcc.target/powerpc/p8vector-int128-2.c: Likewise.

	* gcc.target/powerpc/timode_off.c: Restrict cpu type to power5,
	due to when TImode is allowed in VSX registers, the allowable
	address modes for TImode is just a single indirect address in
	order for the value to be loaded and store in either GPR or VSX
	registers.  This affects the generated code, and it would cause
	this test to fail, when such an option is used.

From-SVN: r208522
2014-03-13 00:11:56 +00:00
boehm-gc gcconfig.h: Add FreeBSD powerpc64 defines. 2013-12-21 21:42:39 +01:00
config bootstrap-ubsan.mk (POSTSTAGE1_LDFLAGS): Remove -lpthread -ldl. 2013-11-29 20:13:45 +00:00
contrib TILE-Gx big endian support. 2014-02-24 15:08:00 +00:00
fixincludes fixincludes: use $(FI) instead of fixincl@EXEEXT@ 2013-12-20 13:07:52 +01:00
gcc vector.md (VEC_L): Add V1TI mode to vector types. 2014-03-13 00:11:56 +00:00
gnattools Makefile.in (TOOLS_FLAGS_TO_PASS_CROSS): Robustify. 2014-02-23 16:30:11 +00:00
include include 2014-01-21 15:09:10 +00:00
INSTALL README: Also refer to the online installation instructions. 2012-08-25 20:48:20 +00:00
intl
libada Update copyright years in libada/ 2014-01-02 22:24:25 +00:00
libatomic re PR c++/60272 (atomic<>::compare_exchange_weak has spurious store and can cause race conditions) 2014-02-20 09:43:53 -08:00
libbacktrace * sort.c (backtrace_qsort): Use middle element as pivot. 2014-03-07 15:52:48 +00:00
libcilkrts Makefile.am: Install cilk.h. 2014-03-09 08:48:48 +01:00
libcpp be.po, [...]: Update. 2014-03-03 19:04:36 +00:00
libdecnumber re PR c/59871 (No unused value warning for comma expression) 2014-01-23 19:04:29 +00:00
libffi sysv.S (ffi_closure_SYSV): Use x29 as the main CFA reg; update cfi_rel_offset. 2014-03-12 16:18:29 +00:00
libgcc re PR libgcc/60472 (Warning: array subscript is above array bounds when compiling crtstuff.c) 2014-03-10 19:31:20 +01:00
libgfortran re PR libfortran/38199 (missed optimization: I/O performance) 2014-03-09 05:34:34 +00:00
libgo libgo: Build math package with -ffp-contract=off on non-x86. 2014-03-12 04:38:52 +00:00
libgomp Update copyright years in libgomp/ 2014-01-02 22:25:54 +00:00
libiberty Avoid "'dc' may be uninitialized" warning. 2014-01-28 20:06:44 +01:00
libitm Make sure that -msse/-mavx are appended at the end 2014-01-13 11:36:17 -08:00
libjava dwarf2-signal.h: Update copyright year. 2014-03-12 12:19:05 +01:00
libobjc Update copyright years in libobjc/ 2014-01-02 22:26:09 +00:00
libquadmath gnat_ugn.texi: Bump @copying's copyright year. 2014-01-02 22:25:41 +01:00
libsanitizer Handle backtrace_qsort 2014-03-07 13:55:54 +00:00
libssp * ssp.c (fail): Avoid -Wformat-security warning. 2013-12-07 09:10:02 +01:00
libstdc++-v3 PR libstdc++/59392: Fix ARM EABI uncaught throw from unexpected exception handler 2014-03-12 22:42:13 +00:00
libvtv Fix up ChangeLog entries (name, e-mail, formatting, otherwise). 2013-10-23 21:30:54 +00:00
lto-plugin Fix up ChangeLog entries (name, e-mail, formatting, otherwise). 2013-10-23 21:30:54 +00:00
maintainer-scripts re PR other/56653 (Warning when verifying checksums from MD5SUMS file in tarballs) 2014-02-01 12:01:56 +00:00
zlib Add --enable-host-shared configuration option 2013-10-15 20:33:55 +00:00
.dir-locals.el * .dir-locals.el: Add. 2013-10-16 18:25:31 +00:00
.gitignore * .gitignore: Import from gdb repository. 2013-01-10 10:48:46 -05:00
ABOUT-NLS
ChangeLog * MAINTAINERS (Write After Approval): Add myself. 2014-03-10 23:44:14 +04:00
ChangeLog.tree-ssa
compile
config-ml.in
config.guess Import from savannah.gnu.org: 2013-10-01 17:50:56 +01:00
config.rpath
config.sub Import from savannah.gnu.org: 2013-10-01 17:50:56 +01:00
configure TILE-Gx big endian support. 2014-02-24 15:08:00 +00:00
configure.ac TILE-Gx big endian support. 2014-02-24 15:08:00 +00:00
COPYING
COPYING3
COPYING3.LIB
COPYING.LIB
COPYING.RUNTIME
depcomp
install-sh
libtool-ldflags
libtool.m4 libtool.m4 (_LT_ENABLE_LOCK <ld -m flags>): Remove non-canonical ppc host match. 2013-09-20 19:17:52 +09:30
lt~obsolete.m4
ltgcc.m4
ltmain.sh Ensure libgcc_s unwinder is always used on 64-bit Solaris 10+/x86 (PR target/59788) 2014-02-04 09:31:38 +00:00
ltoptions.m4
ltsugar.m4
ltversion.m4
MAINTAINERS * MAINTAINERS (Write After Approval): Add myself. 2014-03-10 23:44:14 +04:00
Makefile.def Added Cilk runtime library (libcilkrts) into GCC. 2013-10-29 11:37:47 -07:00
Makefile.in re PR bootstrap/58572 (make bootstrap-lean leads to installation failure (doing extra rebuilds and invoking system compiler)) 2014-03-07 13:58:27 +01:00
Makefile.tpl re PR bootstrap/58572 (make bootstrap-lean leads to installation failure (doing extra rebuilds and invoking system compiler)) 2014-03-07 13:58:27 +01:00
missing
mkdep
mkinstalldirs
move-if-change
README * README: Document use of ranges of years in copyright notices. 2012-07-16 15:01:34 +01:00
symlink-tree
ylwrap

This directory contains the GNU Compiler Collection (GCC).

The GNU Compiler Collection is free software.  See the files whose
names start with COPYING for copying permission.  The manuals, and
some of the runtime libraries, are under different terms; see the
individual source files for details.

The directory INSTALL contains copies of the installation information
as HTML and plain text.  The source of this information is
gcc/doc/install.texi.  The installation information includes details
of what is included in the GCC sources and what files GCC installs.

See the file gcc/doc/gcc.texi (together with other files that it
includes) for usage and porting information.  An online readable
version of the manual is in the files gcc/doc/gcc.info*.

See http://gcc.gnu.org/bugs/ for how to report bugs usefully.

Copyright years on GCC source files may be listed using range
notation, e.g., 1987-2012, indicating that every year in the range,
inclusive, is a copyrightable year that could otherwise be listed
individually.