re PR target/78451 (FAIL: gcc.target/i386/sse-22a.c: error: inlining failed in call to always_inline '_mm512_setzero_ps') ...
PR target/78451
* config/i386/avx512vlintrin.h (_mm_setzero_di): Removed.
(_mm_maskz_mov_epi64): Use _mm_setzero_si128 instead of
_mm_setzero_di.
(_mm_maskz_load_epi64): Likewise.
(_mm_setzero_hi): Removed.
(_mm_maskz_loadu_epi64): Use _mm_setzero_si128 instead of
_mm_setzero_di.
(_mm_abs_epi64, _mm_maskz_abs_epi64, _mm_maskz_srl_epi64,
_mm_maskz_unpackhi_epi64, _mm_maskz_unpacklo_epi64,
_mm_maskz_compress_epi64, _mm_srav_epi64, _mm_maskz_srav_epi64,
_mm_maskz_sllv_epi64, _mm_maskz_srlv_epi64, _mm_rolv_epi64,
_mm_maskz_rolv_epi64, _mm_rorv_epi64, _mm_maskz_rorv_epi64,
_mm_min_epi64, _mm_max_epi64, _mm_max_epu64, _mm_min_epu64,
_mm_lzcnt_epi64, _mm_maskz_lzcnt_epi64, _mm_conflict_epi64,
_mm_maskz_conflict_epi64, _mm_sra_epi64, _mm_maskz_sra_epi64,
_mm_maskz_sll_epi64, _mm_rol_epi64, _mm_maskz_rol_epi64,
_mm_ror_epi64, _mm_maskz_ror_epi64, _mm_alignr_epi64,
_mm_maskz_alignr_epi64, _mm_srai_epi64, _mm_maskz_slli_epi64):
Likewise.
(_mm_cvtepi32_epi8, _mm256_cvtepi32_epi8, _mm_cvtsepi32_epi8,
_mm256_cvtsepi32_epi8, _mm_cvtusepi32_epi8, _mm256_cvtusepi32_epi8,
_mm_cvtepi32_epi16, _mm256_cvtepi32_epi16, _mm_cvtsepi32_epi16,
_mm256_cvtsepi32_epi16, _mm_cvtusepi32_epi16, _mm256_cvtusepi32_epi16,
_mm_cvtepi64_epi8, _mm256_cvtepi64_epi8, _mm_cvtsepi64_epi8,
_mm256_cvtsepi64_epi8, _mm_cvtusepi64_epi8, _mm256_cvtusepi64_epi8,
_mm_cvtepi64_epi16, _mm256_cvtepi64_epi16, _mm_cvtsepi64_epi16,
_mm256_cvtsepi64_epi16, _mm_cvtusepi64_epi16, _mm256_cvtusepi64_epi16,
_mm_cvtepi64_epi32, _mm256_cvtepi64_epi32, _mm_cvtsepi64_epi32,
_mm256_cvtsepi64_epi32, _mm_cvtusepi64_epi32, _mm256_cvtusepi64_epi32,
_mm_maskz_set1_epi32, _mm_maskz_set1_epi64): Formatting fixes.
(_mm_maskz_cvtps_ph, _mm256_maskz_cvtps_ph): Use _mm_setzero_si128
instead of _mm_setzero_hi.
(_mm256_permutex_pd, _mm256_maskz_permutex_epi64, _mm256_insertf32x4,
_mm256_maskz_insertf32x4, _mm256_inserti32x4, _mm256_maskz_inserti32x4,
_mm256_extractf32x4_ps, _mm256_maskz_extractf32x4_ps,
_mm256_shuffle_i32x4, _mm256_maskz_shuffle_i32x4, _mm256_shuffle_f64x2,
_mm256_maskz_shuffle_f64x2, _mm256_shuffle_f32x4,
_mm256_maskz_shuffle_f32x4, _mm256_maskz_shuffle_pd,
_mm_maskz_shuffle_pd, _mm256_maskz_shuffle_ps, _mm_maskz_shuffle_ps,
_mm256_maskz_srli_epi32, _mm_maskz_srli_epi32, _mm_maskz_srli_epi64,
_mm256_mask_slli_epi32, _mm256_maskz_slli_epi32, _mm256_mask_slli_epi64,
_mm256_maskz_slli_epi64, _mm256_roundscale_ps,
_mm256_maskz_roundscale_ps, _mm256_roundscale_pd,
_mm256_maskz_roundscale_pd, _mm_roundscale_ps, _mm_maskz_roundscale_ps,
_mm_roundscale_pd, _mm_maskz_roundscale_pd, _mm256_getmant_ps,
_mm256_maskz_getmant_ps, _mm_getmant_ps, _mm_maskz_getmant_ps,
_mm256_getmant_pd, _mm256_maskz_getmant_pd, _mm_getmant_pd,
_mm_maskz_getmant_pd, _mm256_maskz_shuffle_epi32,
_mm_maskz_shuffle_epi32, _mm256_rol_epi32, _mm256_maskz_rol_epi32,
_mm_rol_epi32, _mm_maskz_rol_epi32, _mm256_ror_epi32,
_mm256_maskz_ror_epi32, _mm_ror_epi32, _mm_maskz_ror_epi32,
_mm_maskz_alignr_epi32, _mm_maskz_alignr_epi64,
_mm256_maskz_srai_epi32, _mm_maskz_srai_epi32, _mm_srai_epi64,
_mm_maskz_srai_epi64, _mm256_maskz_permutex_pd,
_mm256_maskz_permute_pd, _mm256_maskz_permute_ps, _mm_maskz_permute_pd,
_mm_maskz_permute_ps, _mm256_permutexvar_ps): Formatting fixes.
(_mm_maskz_slli_epi64, _mm_rol_epi64, _mm_maskz_rol_epi64,
_mm_ror_epi64, _mm_maskz_ror_epi64): Use _mm_setzero_si128 instead of
_mm_setzero_di.
(_mm_maskz_cvtps_ph, _mm256_maskz_cvtps_ph): Use _mm_setzero_si128
instead of _mm_setzero_hi.
* config/i386/avx512dqintrin.h (_mm512_broadcast_f64x2,
_mm512_broadcast_i64x2, _mm512_broadcast_f32x2, _mm512_broadcast_i32x2,
_mm512_broadcast_f32x8, _mm512_broadcast_i32x8): Formatting fixes.
(_mm512_extracti64x2_epi64, _mm512_maskz_extracti64x2_epi64): Use
_mm_setzero_si128 instead of _mm_setzero_di.
(_mm512_cvtt_roundpd_epi64, _mm512_mask_cvtt_roundpd_epi64,
_mm512_maskz_cvtt_roundpd_epi64, _mm512_cvtt_roundpd_epu64,
_mm512_mask_cvtt_roundpd_epu64, _mm512_maskz_cvtt_roundpd_epu64,
_mm512_cvtt_roundps_epi64, _mm512_mask_cvtt_roundps_epi64,
_mm512_maskz_cvtt_roundps_epi64, _mm512_cvtt_roundps_epu64,
_mm512_mask_cvtt_roundps_epu64, _mm512_maskz_cvtt_roundps_epu64,
_mm512_cvt_roundpd_epi64, _mm512_mask_cvt_roundpd_epi64,
_mm512_maskz_cvt_roundpd_epi64, _mm512_cvt_roundpd_epu64,
_mm512_mask_cvt_roundpd_epu64, _mm512_maskz_cvt_roundpd_epu64,
_mm512_cvt_roundps_epi64, _mm512_mask_cvt_roundps_epi64,
_mm512_maskz_cvt_roundps_epi64, _mm512_cvt_roundps_epu64,
_mm512_mask_cvt_roundps_epu64, _mm512_maskz_cvt_roundps_epu64,
_mm512_cvt_roundepi64_ps, _mm512_mask_cvt_roundepi64_ps,
_mm512_maskz_cvt_roundepi64_ps, _mm512_cvt_roundepu64_ps,
_mm512_mask_cvt_roundepu64_ps, _mm512_maskz_cvt_roundepu64_ps,
_mm512_cvt_roundepi64_pd, _mm512_mask_cvt_roundepi64_pd,
_mm512_maskz_cvt_roundepi64_pd, _mm512_cvt_roundepu64_pd,
_mm512_mask_cvt_roundepu64_pd, _mm512_maskz_cvt_roundepu64_pd,
_mm512_reduce_pd, _mm512_maskz_reduce_pd, _mm512_reduce_ps,
_mm512_maskz_reduce_ps, _mm512_extractf32x8_ps,
_mm512_maskz_extractf32x8_ps, _mm512_extractf64x2_pd,
_mm512_maskz_extractf64x2_pd, _mm512_extracti32x8_epi32,
_mm512_maskz_extracti32x8_epi32, _mm512_range_pd,
_mm512_maskz_range_pd, _mm512_range_ps, _mm512_maskz_range_ps,
_mm512_range_round_pd, _mm512_maskz_range_round_pd,
_mm512_range_round_ps, _mm512_maskz_range_round_ps,
_mm512_maskz_insertf64x2, _mm512_insertf32x8,
_mm512_maskz_insertf32x8): Formatting fixes.
(_mm512_extracti64x2_epi64, _mm512_maskz_extracti64x2_epi64): Use
_mm_setzero_si128 instead of _mm_setzero_di.
* config/i386/avx512vldqintrin.h (_mm_cvttpd_epi64,
_mm_cvttpd_epu64, _mm_cvtpd_epi64, _mm_cvtpd_epu64,
_mm_cvttps_epi64, _mm_maskz_cvttps_epi64, _mm_cvttps_epu64,
_mm_maskz_cvttps_epu64, _mm_maskz_mullo_epi64, _mm_cvtps_epi64,
_mm_maskz_cvtps_epi64, _mm_cvtps_epu64, _mm_maskz_cvtps_epu64,
_mm256_extracti64x2_epi64, _mm256_maskz_extracti64x2_epi64): Use
_mm_setzero_si128 instead of _mm_setzero_di.
(_mm256_extracti64x2_epi64, _mm256_maskz_extracti64x2_epi64):
Likewise in macros.
* config/i386/avx512vlbwintrin.h (_mm_maskz_mov_epi8,
_mm_maskz_loadu_epi16, _mm_maskz_mov_epi16, _mm_maskz_loadu_epi8,
_mm_permutexvar_epi16, _mm_maskz_maddubs_epi16): Use
_mm_setzero_si128 instead of _mm_setzero_hi.
(_mm_maskz_min_epu16, _mm_maskz_max_epu8, _mm_maskz_max_epi8,
_mm_maskz_min_epu8, _mm_maskz_min_epi8, _mm_maskz_max_epi16,
_mm_maskz_max_epu16, _mm_maskz_min_epi16): Use _mm_setzero_si128
instead of _mm_setzero_di.
(_mm_dbsad_epu8, _mm_maskz_shufflehi_epi16,
_mm_maskz_shufflelo_epi16): Use _mm_setzero_si128 instead of
_mm_setzero_hi.
(_mm_maskz_shufflehi_epi16, _mm_maskz_shufflelo_epi16,
_mm_maskz_slli_epi16): Use _mm_setzero_si128 instead of
_mm_setzero_hi.
(_mm_maskz_alignr_epi8): Use _mm_setzero_si128 instead of
_mm_setzero_di.
(_mm_maskz_mulhi_epi16, _mm_maskz_mulhi_epu16, _mm_maskz_mulhrs_epi16,
_mm_maskz_mullo_epi16, _mm_srav_epi16, _mm_srlv_epi16,
_mm_sllv_epi16): Use _mm_setzero_si128 instead of _mm_setzero_hi.
From-SVN: r242707
a25a788762