116 lines
3.5 KiB
ArmAsm
116 lines
3.5 KiB
ArmAsm
###################################
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#
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# Copyright (C) 2009-2016 Free Software Foundation, Inc.
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#
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# Contributed by Michael Eager <eager@eagercon.com>.
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#
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# This file is free software; you can redistribute it and/or modify it
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# under the terms of the GNU General Public License as published by the
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# Free Software Foundation; either version 3, or (at your option) any
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# later version.
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#
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# GCC is distributed in the hope that it will be useful, but WITHOUT
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# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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# License for more details.
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#
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# Under Section 7 of GPL version 3, you are granted additional
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# permissions described in the GCC Runtime Library Exception, version
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# 3.1, as published by the Free Software Foundation.
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#
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# You should have received a copy of the GNU General Public License and
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# a copy of the GCC Runtime Library Exception along with this program;
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# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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# <http://www.gnu.org/licenses/>.
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#
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# modsi3.S
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#
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# modulo operation for 64 bit integers.
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#
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#######################################
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.globl __moddi3
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.ent __moddi3
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__moddi3:
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.frame r1,0,r15
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#Change the stack pointer value and Save callee saved regs
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addik r1,r1,-24
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swi r25,r1,0
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swi r26,r1,4
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swi r27,r1,8 # used for sign
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swi r28,r1,12 # used for loop count
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swi r29,r1,16 # Used for div value High
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swi r30,r1,20 # Used for div value Low
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#Check for Zero Value in the divisor/dividend
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OR r9,r5,r6 # Check for the op1 being zero
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BEQID r9,$LaResult_Is_Zero # Result is zero
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OR r9,r7,r8 # Check for the dividend being zero
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BEQI r9,$LaDiv_By_Zero # Div_by_Zero # Division Error
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BGEId r5,$La1_Pos
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XOR r27,r5,r7 # Get the sign of the result
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RSUBI r6,r6,0 # Make dividend positive
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RSUBIC r5,r5,0 # Make dividend positive
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$La1_Pos:
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BGEI r7,$La2_Pos
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RSUBI r8,r8,0 # Make Divisor Positive
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RSUBIC r9,r9,0 # Make Divisor Positive
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$La2_Pos:
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ADDIK r4,r0,0 # Clear mod low
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ADDIK r3,r0,0 # Clear mod high
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ADDIK r29,r0,0 # clear div high
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ADDIK r30,r0,0 # clear div low
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ADDIK r28,r0,64 # Initialize the loop count
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# First part try to find the first '1' in the r5/r6
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$LaDIV1:
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ADD r6,r6,r6
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ADDC r5,r5,r5 # left shift logical r5
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BGEID r5,$LaDIV1
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ADDIK r28,r28,-1
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$LaDIV2:
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ADD r6,r6,r6
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ADDC r5,r5,r5 # left shift logical r5/r6 get the '1' into the Carry
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ADDC r4,r4,r4 # Move that bit into the Mod register
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ADDC r3,r3,r3 # Move carry into high mod register
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rsub r18,r7,r3 # Compare the High Parts of Mod and Divisor
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bnei r18,$L_High_EQ
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rsub r18,r6,r4 # Compare Low Parts only if Mod[h] == Divisor[h]
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$L_High_EQ:
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rSUB r26,r8,r4 # Subtract divisor[L] from Mod[L]
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rsubc r25,r7,r3 # Subtract divisor[H] from Mod[H]
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BLTi r25,$LaMOD_TOO_SMALL
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OR r3,r0,r25 # move r25 to mod [h]
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OR r4,r0,r26 # move r26 to mod [l]
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ADDI r30,r30,1
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ADDC r29,r29,r0
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$LaMOD_TOO_SMALL:
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ADDIK r28,r28,-1
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BEQi r28,$LaLOOP_END
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ADD r30,r30,r30 # Shift in the '1' into div [low]
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ADDC r29,r29,r29 # Move the carry generated into high
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BRI $LaDIV2 # Div2
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$LaLOOP_END:
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BGEI r27,$LaRETURN_HERE
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rsubi r30,r30,0
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rsubc r29,r29,r0
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BRI $LaRETURN_HERE
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$LaDiv_By_Zero:
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$LaResult_Is_Zero:
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or r29,r0,r0 # set result to 0 [High]
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or r30,r0,r0 # set result to 0 [Low]
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$LaRETURN_HERE:
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# Restore values of CSRs and that of r29 and the divisor and the dividend
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lwi r25,r1,0
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lwi r26,r1,4
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lwi r27,r1,8
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lwi r28,r1,12
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lwi r29,r1,16
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lwi r30,r1,20
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rtsd r15,8
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addik r1,r1,24
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.end __moddi3
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