![Richard Sandiford](/assets/img/avatar_default.png)
This patch adds support for unwinding frames that use the SVE pseudo VG register. We want this register to act like a normal register if the CFI explicitly sets it, but want to provide a default value otherwise. Computing the default value requires an SVE target, so we only want to compute it on demand. aarch64_vg uses a hard-coded .inst in order to avoid a build dependency on binutils 2.28 or later. 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document. * doc/tm.texi: Regenerate. libgcc/ * config/aarch64/value-unwind.h (aarch64_vg): New function. (DWARF_LAZY_REGISTER_VALUE): Define. * unwind-dw2.c (_Unwind_GetGR): Use DWARF_LAZY_REGISTER_VALUE to provide a fallback register value. gcc/testsuite/ * g++.target/aarch64/sve/aarch64-sve.exp: New harness. * g++.target/aarch64/sve/catch_1.C: New test. * g++.target/aarch64/sve/catch_2.C: Likewise. * g++.target/aarch64/sve/catch_3.C: Likewise. * g++.target/aarch64/sve/catch_4.C: Likewise. * g++.target/aarch64/sve/catch_5.C: Likewise. * g++.target/aarch64/sve/catch_6.C: Likewise. Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com> From-SVN: r256615
42 lines
1.6 KiB
C
42 lines
1.6 KiB
C
/* Store register values as _Unwind_Word type in DWARF2 EH unwind context.
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Copyright (C) 2017-2018 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published
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by the Free Software Foundation; either version 3, or (at your
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option) any later version.
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GCC is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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/* Define this macro if the target stores register values as _Unwind_Word
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type in unwind context. Only enable it for ilp32. */
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#if defined __aarch64__ && !defined __LP64__
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# define REG_VALUE_IN_UNWIND_CONTEXT
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#endif
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/* Return the value of the pseudo VG register. This should only be
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called if we know this is an SVE host. */
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static inline int
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aarch64_vg (void)
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{
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register int vg asm ("x0");
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/* CNTD X0. */
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asm (".inst 0x04e0e3e0" : "=r" (vg));
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return vg;
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}
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/* Lazily provide a value for VG, so that we don't try to execute SVE
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instructions unless we know they're needed. */
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#define DWARF_LAZY_REGISTER_VALUE(REGNO, VALUE) \
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((REGNO) == AARCH64_DWARF_VG && ((*VALUE) = aarch64_vg (), 1))
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