203 lines
3.3 KiB
ArmAsm
203 lines
3.3 KiB
ArmAsm
; Copyright (C) 2011-2014 Free Software Foundation, Inc.
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; Contributed by Red Hat.
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;
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; This file is free software; you can redistribute it and/or modify it
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; under the terms of the GNU General Public License as published by the
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; Free Software Foundation; either version 3, or (at your option) any
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; later version.
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;
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; This file is distributed in the hope that it will be useful, but
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; WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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; General Public License for more details.
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;
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; Under Section 7 of GPL version 3, you are granted additional
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; permissions described in the GCC Runtime Library Exception, version
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; 3.1, as published by the Free Software Foundation.
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;
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; You should have received a copy of the GNU General Public License and
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; a copy of the GCC Runtime Library Exception along with this program;
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; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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; <http://www.gnu.org/licenses/>.
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;; 32x32=32 multiply
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#include "vregs.h"
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; the G10 only has one register bank, so cannot use these optimized
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; versions. Use the C version instead.
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#ifndef __RL78_G10__
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;----------------------------------------------------------------------
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; Register use:
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; RB0 RB1 RB2
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; AX op2L res32L res32H
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; BC op2H (resH) op1
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; DE count (resL-tmp)
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; HL [sp+4]
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.text
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nop
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.global ___mulsi3 ; (USI a, USI b)
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___mulsi3:
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;; A is at [sp+4]
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;; B is at [sp+8]
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;; result is in R8..R11
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sel rb2
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push ax
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push bc
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sel rb0
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clrw ax
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movw r8, ax
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movw r16, ax
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movw ax, [sp+14]
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cmpw ax, #0
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bz $1f
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cmpw ax, #0xffff
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bnz $2f
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movw ax, [sp+8]
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sel rb1
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subw ax, r_0
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sel rb0
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br $1f
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2:
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movw bc, ax
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movw ax, [sp+8]
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cmpw ax, #0
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skz
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call !.Lmul_hi
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1:
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movw ax, [sp+10]
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cmpw ax, #0
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bz $1f
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cmpw ax, #0xffff
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bnz $2f
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movw ax, [sp+12]
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sel rb1
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subw ax, r_0
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sel rb0
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br $1f
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2:
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movw bc, ax
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movw ax, [sp+12]
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cmpw ax, #0
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skz
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call !.Lmul_hi
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1:
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movw ax, r8
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movw r16, ax
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clrw ax
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movw r8, ax
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;; now do R16:R8 += op1L * op2L
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;; op1 is in AX.0 (needs to shrw)
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;; op2 is in BC.2 and BC.1 (bc can shlw/rolcw)
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;; res is in AX.2 and AX.1 (needs to addw)
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movw ax, [sp+8]
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movw r10, ax ; BC.1
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movw ax, [sp+12]
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cmpw ax, r10
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bc $.Lmul_hisi_top
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movw bc, r10
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movw r10, ax
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movw ax, bc
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.Lmul_hisi_top:
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movw bc, #0
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.Lmul_hisi_loop:
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shrw ax, 1
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bnc $.Lmul_hisi_no_add
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sel rb1
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addw ax, bc
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sel rb2
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sknc
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incw ax
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addw ax, r_2
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.Lmul_hisi_no_add:
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sel rb1
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shlw bc, 1
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sel rb0
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rolwc bc, 1
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cmpw ax, #0
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bz $.Lmul_hisi_done
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shrw ax, 1
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bnc $.Lmul_hisi_no_add2
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sel rb1
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addw ax, bc
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sel rb2
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sknc
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incw ax
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addw ax, r_2
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.Lmul_hisi_no_add2:
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sel rb1
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shlw bc, 1
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sel rb0
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rolwc bc, 1
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cmpw ax, #0
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bnz $.Lmul_hisi_loop
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.Lmul_hisi_done:
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movw ax, r16
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movw r10, ax
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sel rb2
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pop bc
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pop ax
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sel rb0
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ret
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;----------------------------------------------------------------------
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.global ___mulhi3
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___mulhi3:
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movw r8, #0
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movw ax, [sp+6]
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movw bc, ax
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movw ax, [sp+4]
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;; R8 += AX * BC
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.Lmul_hi:
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cmpw ax, bc
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skc
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xchw ax, bc
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br $.Lmul_hi_loop
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.Lmul_hi_top:
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sel rb1
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addw ax, r_2
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sel rb0
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.Lmul_hi_no_add:
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shlw bc, 1
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.Lmul_hi_loop:
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shrw ax, 1
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bc $.Lmul_hi_top
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cmpw ax, #0
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bz $.Lmul_hi_done
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shlw bc, 1
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shrw ax, 1
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bc $.Lmul_hi_top
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cmpw ax, #0
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bnz $.Lmul_hi_no_add
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.Lmul_hi_done:
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ret
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#endif
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