57e6d9be77
This provides proper definitions for _GLIBCXX_READ_MEM_BARRIER and _GLIBCXX_WRITE_MEM_BARRIER, rewrites the guards in terms of proper atomic extensions and removes internal uses of _GLIBCXX_READ_MEM_BARRIER and _GLIBCXX_WRITE_MEM_BARRIER and replaces them with equivalent atomics. 2015-06-12 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> PR target/66200 PR c++/66192 * * config/cpu/generic/atomic_word.h (_GLIBCXX_READ_MEM_BARRIER): Define (_GLIBCXX_WRITE_MEM_BARRIER): Likewise * include/bits/shared_ptr_base.h: Use ACQ_REL barrier. * include/ext/atomicity.h: Likewise. * include/tr1/shared_ptr.h: Likewise. * libsupc++/guard.cc (__test_and_acquire): Rewrite with atomics. Update comment. (__set_and_release): Likewise. * testsuite/20_util/shared_ptr/cons/43820_neg.cc (test01): Adjust for line numbers. * testsuite/20_util/shared_ptr/cons/void_neg.cc: Likewise. * testsuite/tr1/2_general_utilities/shared_ptr/cons/43820_neg.cc: Likewise. From-SVN: r224411 |
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atomicity_builtins | ||
atomicity_mutex | ||
opt | ||
atomic_word.h | ||
cpu_defines.h | ||
cxxabi_tweaks.h |