d8c9d39117
* config/arm/ieee754-df.S: Fix typos. * config/arm/ieee754-sf.S: Fix typos. * config/c6x/libunwind.S: Fix typos. * config/epiphany/udivsi3-float.c: Fix typos. * config/microblaze/muldi3_hard.S: Fix typos. * config/picochip/adddi3.S: Fix typos. * config/picochip/ashlsi3.S: Fix typos. * config/picochip/ashrsi3.S: Fix typos. * config/picochip/clzsi2.S: Fix typos. * config/picochip/cmpsi2.S: Fix typos. * config/picochip/divmod15.S: Fix typos. * config/picochip/divmodhi4.S: Fix typos. * config/picochip/divmodsi4.S: Fix typos. * config/picochip/longjmp.S: Fix typos. * config/picochip/lshrsi3.S: Fix typos. * config/picochip/parityhi2.S: Fix typos. * config/picochip/popcounthi2.S: Fix typos. * config/picochip/setjmp.S: Fix typos. * config/picochip/subdi3.S: Fix typos. * config/picochip/ucmpsi2.S: Fix typos. * config/picochip/udivmodhi4.S: Fix typos. * config/picochip/udivmodsi4.S: Fix typos. * config/spu/divv2df3.c: Fix typos. * config/spu/mfc_multi_tag_release.c: Fix typos. * config/spu/mfc_tag_release.c: Fix typos. * configure.ac: Fix typos. * configure: Regenerate. From-SVN: r187967
134 lines
3.3 KiB
ArmAsm
134 lines
3.3 KiB
ArmAsm
.text
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.macro do_call fn
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#ifdef _TMS320C6400_PLUS
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callp .s2 (\fn), B3
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#elif defined(_TMS320C6400)
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call .s2 (\fn)
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addkpc .s2 9f, B3, 0
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nop 4
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9f:
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#else
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call .s2 (\fn)
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mhkl .s2 9f, B3
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mhkh .s2 9f, B3
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nop 3
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9f:
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#endif
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.endm
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.align 2
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.global restore_core_regs
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.type restore_core_regs, STT_FUNC
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restore_core_regs:
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mv .s2x A4, B4
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ldw .d1t1 *+A4[0], A0
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|| ldw .d2t2 *++B4[16], B0
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ldw .d1t1 *+A4[1], A1
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|| ldw .d2t2 *+B4[1], B1
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ldw .d1t1 *+A4[2], A2
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|| ldw .d2t2 *+B4[2], B2
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ldw .d1t1 *+A4[3], A3
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|| ldw .d2t2 *+B4[3], B3
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;; Base registers are loaded later
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ldw .d1t1 *+A4[5], A5
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|| ldw .d2t2 *+B4[5], B5
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ldw .d1t1 *+A4[6], A6
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|| ldw .d2t2 *+B4[6], B6
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ldw .d1t1 *+A4[7], A7
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|| ldw .d2t2 *+B4[7], B7
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ldw .d1t1 *+A4[8], A8
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|| ldw .d2t2 *+B4[8], B8
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ldw .d1t1 *+A4[9], A9
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|| ldw .d2t2 *+B4[9], B9
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;; load PC into B10 so that it is ready for the branch
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ldw .d2t2 *+B4[16], B10
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ldw .d1t1 *+A4[11], A11
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|| ldw .d2t2 *+B4[11], B11
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ldw .d1t1 *+A4[12], A12
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|| ldw .d2t2 *+B4[12], B12
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ldw .d1t1 *+A4[13], A13
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|| ldw .d2t2 *+B4[13], B13
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ldw .d1t1 *+A4[14], A14
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|| ldw .d2t2 *+B4[14], B14
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;; Loads have 4 delay slots. Take advantage of this to restore the
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;; scratch registers and stack pointer before the base registers
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;; disappear. We also need to make sure no interrupts occur,
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;; so put the whole thing in the delay slots of a dummy branch
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;; We can not move the ret earlier as that would cause it to occur
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;; before the last load completes
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b .s1 (1f)
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ldw .d1t1 *+A4[4], A4
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|| ldw .d2t2 *+B4[4], B4
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ldw .d1t1 *+A4[15], A15
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|| ldw .d2t2 *+B4[15], B15
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ret .s2 B10
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ldw .d1t1 *+A4[10], A10
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|| ldw .d2t2 *+B4[10], B10
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nop 1
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1:
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nop 3
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.size restore_core_regs, . - restore_core_regs
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.macro UNWIND_WRAPPER name argreg argside
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.global \name
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.type \name, STT_FUNC
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\name:
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# Create saved register state: flags,A0-A15,B0-B15,PC = 136 bytes.
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# Plus 4 (rounded to 8) for saving return.
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addk .s2 -144, B15
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stw .d2t1 A0, *+B15[2]
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stw .d2t1 A1, *+B15[3]
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stw .d2t1 A2, *+B15[4]
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stw .d2t1 A3, *+B15[5]
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stw .d2t1 A4, *+B15[6]
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stw .d2t1 A5, *+B15[7]
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stw .d2t1 A6, *+B15[8]
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stw .d2t1 A7, *+B15[9]
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stw .d2t1 A8, *+B15[10]
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stw .d2t1 A9, *+B15[11]
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stw .d2t1 A10, *+B15[12]
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stw .d2t1 A11, *+B15[13]
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stw .d2t1 A12, *+B15[14]
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stw .d2t1 A13, *+B15[15]
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stw .d2t1 A14, *+B15[16]
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stw .d2t1 A15, *+B15[17]
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mv .s1x B15, A0
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addk .s1 144, A0
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stw .d2t2 B0, *+B15[18]
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stw .d2t2 B1, *+B15[19]
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stw .d2t2 B2, *+B15[20]
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stw .d2t2 B3, *+B15[21]
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stw .d2t2 B4, *+B15[22]
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stw .d2t2 B5, *+B15[23]
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stw .d2t2 B6, *+B15[24]
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stw .d2t2 B7, *+B15[25]
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stw .d2t2 B8, *+B15[26]
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stw .d2t2 B9, *+B15[27]
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stw .d2t2 B10, *+B15[28]
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stw .d2t2 B11, *+B15[29]
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stw .d2t2 B12, *+B15[30]
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stw .d2t2 B13, *+B15[31]
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stw .d2t2 B14, *+B15[32]
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stw .d2t1 A0, *+B15[33]
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stw .d2t1 A0, *+B15[34]
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# Zero demand saved flags
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mvk .s1 0, A0
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stw .d2t1 A0, *+B15[1]
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# Save return address, setup additional argument and call function
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stw .d2t2 B3, *+B15[35]
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add .d\argside B15, 4, \argreg
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do_call __gnu\name
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# Restore stack and return
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ldw .d2t2 *+B15[35], B3
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addk .s2 144, B15
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nop 3
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ret .s2 B3
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nop 5
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.size \name, . - \name
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.endm
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UNWIND_WRAPPER _Unwind_RaiseException B4 2
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UNWIND_WRAPPER _Unwind_Resume B4 2
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UNWIND_WRAPPER _Unwind_Resume_or_Rethrow B4 2
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UNWIND_WRAPPER _Unwind_ForcedUnwind B6 2
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UNWIND_WRAPPER _Unwind_Backtrace A6 1x
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