b667dd7017
2019-08-14 Martin Liska <mliska@suse.cz> PR sanitizer/89832 PR sanitizer/91325 * All source files: Merge from upstream 368656. From-SVN: r274426
956 lines
26 KiB
C++
956 lines
26 KiB
C++
//===-- tsan_interface_atomic.cpp -----------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file is a part of ThreadSanitizer (TSan), a race detector.
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//
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//===----------------------------------------------------------------------===//
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// ThreadSanitizer atomic operations are based on C++11/C1x standards.
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// For background see C++11 standard. A slightly older, publicly
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// available draft of the standard (not entirely up-to-date, but close enough
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// for casual browsing) is available here:
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// http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2011/n3242.pdf
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// The following page contains more background information:
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// http://www.hpl.hp.com/personal/Hans_Boehm/c++mm/
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#include "sanitizer_common/sanitizer_placement_new.h"
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#include "sanitizer_common/sanitizer_stacktrace.h"
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#include "sanitizer_common/sanitizer_mutex.h"
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#include "tsan_flags.h"
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#include "tsan_interface.h"
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#include "tsan_rtl.h"
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using namespace __tsan; // NOLINT
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#if !SANITIZER_GO && __TSAN_HAS_INT128
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// Protects emulation of 128-bit atomic operations.
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static StaticSpinMutex mutex128;
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#endif
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static bool IsLoadOrder(morder mo) {
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return mo == mo_relaxed || mo == mo_consume
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|| mo == mo_acquire || mo == mo_seq_cst;
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}
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static bool IsStoreOrder(morder mo) {
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return mo == mo_relaxed || mo == mo_release || mo == mo_seq_cst;
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}
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static bool IsReleaseOrder(morder mo) {
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return mo == mo_release || mo == mo_acq_rel || mo == mo_seq_cst;
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}
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static bool IsAcquireOrder(morder mo) {
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return mo == mo_consume || mo == mo_acquire
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|| mo == mo_acq_rel || mo == mo_seq_cst;
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}
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static bool IsAcqRelOrder(morder mo) {
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return mo == mo_acq_rel || mo == mo_seq_cst;
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}
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template<typename T> T func_xchg(volatile T *v, T op) {
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T res = __sync_lock_test_and_set(v, op);
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// __sync_lock_test_and_set does not contain full barrier.
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__sync_synchronize();
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return res;
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}
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template<typename T> T func_add(volatile T *v, T op) {
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return __sync_fetch_and_add(v, op);
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}
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template<typename T> T func_sub(volatile T *v, T op) {
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return __sync_fetch_and_sub(v, op);
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}
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template<typename T> T func_and(volatile T *v, T op) {
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return __sync_fetch_and_and(v, op);
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}
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template<typename T> T func_or(volatile T *v, T op) {
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return __sync_fetch_and_or(v, op);
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}
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template<typename T> T func_xor(volatile T *v, T op) {
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return __sync_fetch_and_xor(v, op);
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}
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template<typename T> T func_nand(volatile T *v, T op) {
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// clang does not support __sync_fetch_and_nand.
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T cmp = *v;
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for (;;) {
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T newv = ~(cmp & op);
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T cur = __sync_val_compare_and_swap(v, cmp, newv);
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if (cmp == cur)
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return cmp;
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cmp = cur;
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}
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}
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template<typename T> T func_cas(volatile T *v, T cmp, T xch) {
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return __sync_val_compare_and_swap(v, cmp, xch);
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}
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// clang does not support 128-bit atomic ops.
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// Atomic ops are executed under tsan internal mutex,
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// here we assume that the atomic variables are not accessed
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// from non-instrumented code.
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#if !defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16) && !SANITIZER_GO \
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&& __TSAN_HAS_INT128
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a128 func_xchg(volatile a128 *v, a128 op) {
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SpinMutexLock lock(&mutex128);
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a128 cmp = *v;
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*v = op;
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return cmp;
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}
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a128 func_add(volatile a128 *v, a128 op) {
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SpinMutexLock lock(&mutex128);
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a128 cmp = *v;
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*v = cmp + op;
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return cmp;
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}
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a128 func_sub(volatile a128 *v, a128 op) {
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SpinMutexLock lock(&mutex128);
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a128 cmp = *v;
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*v = cmp - op;
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return cmp;
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}
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a128 func_and(volatile a128 *v, a128 op) {
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SpinMutexLock lock(&mutex128);
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a128 cmp = *v;
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*v = cmp & op;
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return cmp;
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}
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a128 func_or(volatile a128 *v, a128 op) {
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SpinMutexLock lock(&mutex128);
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a128 cmp = *v;
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*v = cmp | op;
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return cmp;
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}
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a128 func_xor(volatile a128 *v, a128 op) {
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SpinMutexLock lock(&mutex128);
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a128 cmp = *v;
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*v = cmp ^ op;
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return cmp;
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}
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a128 func_nand(volatile a128 *v, a128 op) {
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SpinMutexLock lock(&mutex128);
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a128 cmp = *v;
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*v = ~(cmp & op);
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return cmp;
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}
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a128 func_cas(volatile a128 *v, a128 cmp, a128 xch) {
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SpinMutexLock lock(&mutex128);
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a128 cur = *v;
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if (cur == cmp)
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*v = xch;
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return cur;
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}
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#endif
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template<typename T>
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static int SizeLog() {
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if (sizeof(T) <= 1)
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return kSizeLog1;
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else if (sizeof(T) <= 2)
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return kSizeLog2;
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else if (sizeof(T) <= 4)
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return kSizeLog4;
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else
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return kSizeLog8;
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// For 16-byte atomics we also use 8-byte memory access,
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// this leads to false negatives only in very obscure cases.
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}
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#if !SANITIZER_GO
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static atomic_uint8_t *to_atomic(const volatile a8 *a) {
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return reinterpret_cast<atomic_uint8_t *>(const_cast<a8 *>(a));
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}
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static atomic_uint16_t *to_atomic(const volatile a16 *a) {
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return reinterpret_cast<atomic_uint16_t *>(const_cast<a16 *>(a));
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}
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#endif
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static atomic_uint32_t *to_atomic(const volatile a32 *a) {
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return reinterpret_cast<atomic_uint32_t *>(const_cast<a32 *>(a));
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}
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static atomic_uint64_t *to_atomic(const volatile a64 *a) {
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return reinterpret_cast<atomic_uint64_t *>(const_cast<a64 *>(a));
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}
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static memory_order to_mo(morder mo) {
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switch (mo) {
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case mo_relaxed: return memory_order_relaxed;
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case mo_consume: return memory_order_consume;
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case mo_acquire: return memory_order_acquire;
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case mo_release: return memory_order_release;
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case mo_acq_rel: return memory_order_acq_rel;
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case mo_seq_cst: return memory_order_seq_cst;
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}
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CHECK(0);
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return memory_order_seq_cst;
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}
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template<typename T>
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static T NoTsanAtomicLoad(const volatile T *a, morder mo) {
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return atomic_load(to_atomic(a), to_mo(mo));
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}
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#if __TSAN_HAS_INT128 && !SANITIZER_GO
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static a128 NoTsanAtomicLoad(const volatile a128 *a, morder mo) {
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SpinMutexLock lock(&mutex128);
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return *a;
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}
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#endif
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template<typename T>
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static T AtomicLoad(ThreadState *thr, uptr pc, const volatile T *a, morder mo) {
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CHECK(IsLoadOrder(mo));
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// This fast-path is critical for performance.
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// Assume the access is atomic.
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if (!IsAcquireOrder(mo)) {
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MemoryReadAtomic(thr, pc, (uptr)a, SizeLog<T>());
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return NoTsanAtomicLoad(a, mo);
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}
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// Don't create sync object if it does not exist yet. For example, an atomic
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// pointer is initialized to nullptr and then periodically acquire-loaded.
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T v = NoTsanAtomicLoad(a, mo);
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SyncVar *s = ctx->metamap.GetIfExistsAndLock((uptr)a, false);
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if (s) {
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AcquireImpl(thr, pc, &s->clock);
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// Re-read under sync mutex because we need a consistent snapshot
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// of the value and the clock we acquire.
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v = NoTsanAtomicLoad(a, mo);
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s->mtx.ReadUnlock();
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}
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MemoryReadAtomic(thr, pc, (uptr)a, SizeLog<T>());
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return v;
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}
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template<typename T>
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static void NoTsanAtomicStore(volatile T *a, T v, morder mo) {
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atomic_store(to_atomic(a), v, to_mo(mo));
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}
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#if __TSAN_HAS_INT128 && !SANITIZER_GO
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static void NoTsanAtomicStore(volatile a128 *a, a128 v, morder mo) {
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SpinMutexLock lock(&mutex128);
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*a = v;
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}
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#endif
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template<typename T>
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static void AtomicStore(ThreadState *thr, uptr pc, volatile T *a, T v,
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morder mo) {
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CHECK(IsStoreOrder(mo));
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MemoryWriteAtomic(thr, pc, (uptr)a, SizeLog<T>());
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// This fast-path is critical for performance.
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// Assume the access is atomic.
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// Strictly saying even relaxed store cuts off release sequence,
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// so must reset the clock.
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if (!IsReleaseOrder(mo)) {
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NoTsanAtomicStore(a, v, mo);
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return;
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}
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__sync_synchronize();
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SyncVar *s = ctx->metamap.GetOrCreateAndLock(thr, pc, (uptr)a, true);
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thr->fast_state.IncrementEpoch();
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// Can't increment epoch w/o writing to the trace as well.
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TraceAddEvent(thr, thr->fast_state, EventTypeMop, 0);
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ReleaseStoreImpl(thr, pc, &s->clock);
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NoTsanAtomicStore(a, v, mo);
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s->mtx.Unlock();
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}
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template<typename T, T (*F)(volatile T *v, T op)>
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static T AtomicRMW(ThreadState *thr, uptr pc, volatile T *a, T v, morder mo) {
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MemoryWriteAtomic(thr, pc, (uptr)a, SizeLog<T>());
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SyncVar *s = 0;
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if (mo != mo_relaxed) {
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s = ctx->metamap.GetOrCreateAndLock(thr, pc, (uptr)a, true);
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thr->fast_state.IncrementEpoch();
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// Can't increment epoch w/o writing to the trace as well.
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TraceAddEvent(thr, thr->fast_state, EventTypeMop, 0);
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if (IsAcqRelOrder(mo))
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AcquireReleaseImpl(thr, pc, &s->clock);
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else if (IsReleaseOrder(mo))
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ReleaseImpl(thr, pc, &s->clock);
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else if (IsAcquireOrder(mo))
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AcquireImpl(thr, pc, &s->clock);
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}
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v = F(a, v);
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if (s)
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s->mtx.Unlock();
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return v;
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}
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template<typename T>
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static T NoTsanAtomicExchange(volatile T *a, T v, morder mo) {
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return func_xchg(a, v);
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}
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template<typename T>
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static T NoTsanAtomicFetchAdd(volatile T *a, T v, morder mo) {
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return func_add(a, v);
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}
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template<typename T>
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static T NoTsanAtomicFetchSub(volatile T *a, T v, morder mo) {
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return func_sub(a, v);
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}
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template<typename T>
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static T NoTsanAtomicFetchAnd(volatile T *a, T v, morder mo) {
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return func_and(a, v);
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}
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template<typename T>
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static T NoTsanAtomicFetchOr(volatile T *a, T v, morder mo) {
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return func_or(a, v);
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}
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template<typename T>
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static T NoTsanAtomicFetchXor(volatile T *a, T v, morder mo) {
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return func_xor(a, v);
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}
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template<typename T>
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static T NoTsanAtomicFetchNand(volatile T *a, T v, morder mo) {
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return func_nand(a, v);
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}
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template<typename T>
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static T AtomicExchange(ThreadState *thr, uptr pc, volatile T *a, T v,
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morder mo) {
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return AtomicRMW<T, func_xchg>(thr, pc, a, v, mo);
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}
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template<typename T>
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static T AtomicFetchAdd(ThreadState *thr, uptr pc, volatile T *a, T v,
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morder mo) {
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return AtomicRMW<T, func_add>(thr, pc, a, v, mo);
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}
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template<typename T>
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static T AtomicFetchSub(ThreadState *thr, uptr pc, volatile T *a, T v,
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morder mo) {
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return AtomicRMW<T, func_sub>(thr, pc, a, v, mo);
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}
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template<typename T>
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static T AtomicFetchAnd(ThreadState *thr, uptr pc, volatile T *a, T v,
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morder mo) {
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return AtomicRMW<T, func_and>(thr, pc, a, v, mo);
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}
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template<typename T>
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static T AtomicFetchOr(ThreadState *thr, uptr pc, volatile T *a, T v,
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morder mo) {
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return AtomicRMW<T, func_or>(thr, pc, a, v, mo);
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}
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template<typename T>
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static T AtomicFetchXor(ThreadState *thr, uptr pc, volatile T *a, T v,
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morder mo) {
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return AtomicRMW<T, func_xor>(thr, pc, a, v, mo);
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}
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template<typename T>
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static T AtomicFetchNand(ThreadState *thr, uptr pc, volatile T *a, T v,
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morder mo) {
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return AtomicRMW<T, func_nand>(thr, pc, a, v, mo);
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}
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template<typename T>
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static bool NoTsanAtomicCAS(volatile T *a, T *c, T v, morder mo, morder fmo) {
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return atomic_compare_exchange_strong(to_atomic(a), c, v, to_mo(mo));
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}
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#if __TSAN_HAS_INT128
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static bool NoTsanAtomicCAS(volatile a128 *a, a128 *c, a128 v,
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morder mo, morder fmo) {
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a128 old = *c;
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a128 cur = func_cas(a, old, v);
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if (cur == old)
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return true;
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*c = cur;
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return false;
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}
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#endif
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template<typename T>
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static T NoTsanAtomicCAS(volatile T *a, T c, T v, morder mo, morder fmo) {
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NoTsanAtomicCAS(a, &c, v, mo, fmo);
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return c;
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}
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template<typename T>
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static bool AtomicCAS(ThreadState *thr, uptr pc,
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volatile T *a, T *c, T v, morder mo, morder fmo) {
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(void)fmo; // Unused because llvm does not pass it yet.
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MemoryWriteAtomic(thr, pc, (uptr)a, SizeLog<T>());
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SyncVar *s = 0;
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bool write_lock = mo != mo_acquire && mo != mo_consume;
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if (mo != mo_relaxed) {
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s = ctx->metamap.GetOrCreateAndLock(thr, pc, (uptr)a, write_lock);
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thr->fast_state.IncrementEpoch();
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// Can't increment epoch w/o writing to the trace as well.
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TraceAddEvent(thr, thr->fast_state, EventTypeMop, 0);
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if (IsAcqRelOrder(mo))
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AcquireReleaseImpl(thr, pc, &s->clock);
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else if (IsReleaseOrder(mo))
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ReleaseImpl(thr, pc, &s->clock);
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else if (IsAcquireOrder(mo))
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AcquireImpl(thr, pc, &s->clock);
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}
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T cc = *c;
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T pr = func_cas(a, cc, v);
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if (s) {
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if (write_lock)
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s->mtx.Unlock();
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else
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s->mtx.ReadUnlock();
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}
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if (pr == cc)
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return true;
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*c = pr;
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return false;
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}
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template<typename T>
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static T AtomicCAS(ThreadState *thr, uptr pc,
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volatile T *a, T c, T v, morder mo, morder fmo) {
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AtomicCAS(thr, pc, a, &c, v, mo, fmo);
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return c;
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}
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#if !SANITIZER_GO
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static void NoTsanAtomicFence(morder mo) {
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__sync_synchronize();
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}
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static void AtomicFence(ThreadState *thr, uptr pc, morder mo) {
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// FIXME(dvyukov): not implemented.
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__sync_synchronize();
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}
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#endif
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// Interface functions follow.
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#if !SANITIZER_GO
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// C/C++
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static morder convert_morder(morder mo) {
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if (flags()->force_seq_cst_atomics)
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return (morder)mo_seq_cst;
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// Filter out additional memory order flags:
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// MEMMODEL_SYNC = 1 << 15
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// __ATOMIC_HLE_ACQUIRE = 1 << 16
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// __ATOMIC_HLE_RELEASE = 1 << 17
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//
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// HLE is an optimization, and we pretend that elision always fails.
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// MEMMODEL_SYNC is used when lowering __sync_ atomics,
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// since we use __sync_ atomics for actual atomic operations,
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// we can safely ignore it as well. It also subtly affects semantics,
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// but we don't model the difference.
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return (morder)(mo & 0x7fff);
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}
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#define SCOPED_ATOMIC(func, ...) \
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ThreadState *const thr = cur_thread(); \
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if (UNLIKELY(thr->ignore_sync || thr->ignore_interceptors)) { \
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ProcessPendingSignals(thr); \
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return NoTsanAtomic##func(__VA_ARGS__); \
|
|
} \
|
|
const uptr callpc = (uptr)__builtin_return_address(0); \
|
|
uptr pc = StackTrace::GetCurrentPc(); \
|
|
mo = convert_morder(mo); \
|
|
AtomicStatInc(thr, sizeof(*a), mo, StatAtomic##func); \
|
|
ScopedAtomic sa(thr, callpc, a, mo, __func__); \
|
|
return Atomic##func(thr, pc, __VA_ARGS__); \
|
|
/**/
|
|
|
|
class ScopedAtomic {
|
|
public:
|
|
ScopedAtomic(ThreadState *thr, uptr pc, const volatile void *a,
|
|
morder mo, const char *func)
|
|
: thr_(thr) {
|
|
FuncEntry(thr_, pc);
|
|
DPrintf("#%d: %s(%p, %d)\n", thr_->tid, func, a, mo);
|
|
}
|
|
~ScopedAtomic() {
|
|
ProcessPendingSignals(thr_);
|
|
FuncExit(thr_);
|
|
}
|
|
private:
|
|
ThreadState *thr_;
|
|
};
|
|
|
|
static void AtomicStatInc(ThreadState *thr, uptr size, morder mo, StatType t) {
|
|
StatInc(thr, StatAtomic);
|
|
StatInc(thr, t);
|
|
StatInc(thr, size == 1 ? StatAtomic1
|
|
: size == 2 ? StatAtomic2
|
|
: size == 4 ? StatAtomic4
|
|
: size == 8 ? StatAtomic8
|
|
: StatAtomic16);
|
|
StatInc(thr, mo == mo_relaxed ? StatAtomicRelaxed
|
|
: mo == mo_consume ? StatAtomicConsume
|
|
: mo == mo_acquire ? StatAtomicAcquire
|
|
: mo == mo_release ? StatAtomicRelease
|
|
: mo == mo_acq_rel ? StatAtomicAcq_Rel
|
|
: StatAtomicSeq_Cst);
|
|
}
|
|
|
|
extern "C" {
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a8 __tsan_atomic8_load(const volatile a8 *a, morder mo) {
|
|
SCOPED_ATOMIC(Load, a, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a16 __tsan_atomic16_load(const volatile a16 *a, morder mo) {
|
|
SCOPED_ATOMIC(Load, a, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a32 __tsan_atomic32_load(const volatile a32 *a, morder mo) {
|
|
SCOPED_ATOMIC(Load, a, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a64 __tsan_atomic64_load(const volatile a64 *a, morder mo) {
|
|
SCOPED_ATOMIC(Load, a, mo);
|
|
}
|
|
|
|
#if __TSAN_HAS_INT128
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a128 __tsan_atomic128_load(const volatile a128 *a, morder mo) {
|
|
SCOPED_ATOMIC(Load, a, mo);
|
|
}
|
|
#endif
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
void __tsan_atomic8_store(volatile a8 *a, a8 v, morder mo) {
|
|
SCOPED_ATOMIC(Store, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
void __tsan_atomic16_store(volatile a16 *a, a16 v, morder mo) {
|
|
SCOPED_ATOMIC(Store, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
void __tsan_atomic32_store(volatile a32 *a, a32 v, morder mo) {
|
|
SCOPED_ATOMIC(Store, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
void __tsan_atomic64_store(volatile a64 *a, a64 v, morder mo) {
|
|
SCOPED_ATOMIC(Store, a, v, mo);
|
|
}
|
|
|
|
#if __TSAN_HAS_INT128
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
void __tsan_atomic128_store(volatile a128 *a, a128 v, morder mo) {
|
|
SCOPED_ATOMIC(Store, a, v, mo);
|
|
}
|
|
#endif
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a8 __tsan_atomic8_exchange(volatile a8 *a, a8 v, morder mo) {
|
|
SCOPED_ATOMIC(Exchange, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a16 __tsan_atomic16_exchange(volatile a16 *a, a16 v, morder mo) {
|
|
SCOPED_ATOMIC(Exchange, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a32 __tsan_atomic32_exchange(volatile a32 *a, a32 v, morder mo) {
|
|
SCOPED_ATOMIC(Exchange, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a64 __tsan_atomic64_exchange(volatile a64 *a, a64 v, morder mo) {
|
|
SCOPED_ATOMIC(Exchange, a, v, mo);
|
|
}
|
|
|
|
#if __TSAN_HAS_INT128
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a128 __tsan_atomic128_exchange(volatile a128 *a, a128 v, morder mo) {
|
|
SCOPED_ATOMIC(Exchange, a, v, mo);
|
|
}
|
|
#endif
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a8 __tsan_atomic8_fetch_add(volatile a8 *a, a8 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchAdd, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a16 __tsan_atomic16_fetch_add(volatile a16 *a, a16 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchAdd, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a32 __tsan_atomic32_fetch_add(volatile a32 *a, a32 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchAdd, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a64 __tsan_atomic64_fetch_add(volatile a64 *a, a64 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchAdd, a, v, mo);
|
|
}
|
|
|
|
#if __TSAN_HAS_INT128
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a128 __tsan_atomic128_fetch_add(volatile a128 *a, a128 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchAdd, a, v, mo);
|
|
}
|
|
#endif
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a8 __tsan_atomic8_fetch_sub(volatile a8 *a, a8 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchSub, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a16 __tsan_atomic16_fetch_sub(volatile a16 *a, a16 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchSub, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a32 __tsan_atomic32_fetch_sub(volatile a32 *a, a32 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchSub, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a64 __tsan_atomic64_fetch_sub(volatile a64 *a, a64 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchSub, a, v, mo);
|
|
}
|
|
|
|
#if __TSAN_HAS_INT128
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a128 __tsan_atomic128_fetch_sub(volatile a128 *a, a128 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchSub, a, v, mo);
|
|
}
|
|
#endif
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a8 __tsan_atomic8_fetch_and(volatile a8 *a, a8 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchAnd, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a16 __tsan_atomic16_fetch_and(volatile a16 *a, a16 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchAnd, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a32 __tsan_atomic32_fetch_and(volatile a32 *a, a32 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchAnd, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a64 __tsan_atomic64_fetch_and(volatile a64 *a, a64 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchAnd, a, v, mo);
|
|
}
|
|
|
|
#if __TSAN_HAS_INT128
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a128 __tsan_atomic128_fetch_and(volatile a128 *a, a128 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchAnd, a, v, mo);
|
|
}
|
|
#endif
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a8 __tsan_atomic8_fetch_or(volatile a8 *a, a8 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchOr, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a16 __tsan_atomic16_fetch_or(volatile a16 *a, a16 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchOr, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a32 __tsan_atomic32_fetch_or(volatile a32 *a, a32 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchOr, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a64 __tsan_atomic64_fetch_or(volatile a64 *a, a64 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchOr, a, v, mo);
|
|
}
|
|
|
|
#if __TSAN_HAS_INT128
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a128 __tsan_atomic128_fetch_or(volatile a128 *a, a128 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchOr, a, v, mo);
|
|
}
|
|
#endif
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a8 __tsan_atomic8_fetch_xor(volatile a8 *a, a8 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchXor, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a16 __tsan_atomic16_fetch_xor(volatile a16 *a, a16 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchXor, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a32 __tsan_atomic32_fetch_xor(volatile a32 *a, a32 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchXor, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a64 __tsan_atomic64_fetch_xor(volatile a64 *a, a64 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchXor, a, v, mo);
|
|
}
|
|
|
|
#if __TSAN_HAS_INT128
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a128 __tsan_atomic128_fetch_xor(volatile a128 *a, a128 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchXor, a, v, mo);
|
|
}
|
|
#endif
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a8 __tsan_atomic8_fetch_nand(volatile a8 *a, a8 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchNand, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a16 __tsan_atomic16_fetch_nand(volatile a16 *a, a16 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchNand, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a32 __tsan_atomic32_fetch_nand(volatile a32 *a, a32 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchNand, a, v, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a64 __tsan_atomic64_fetch_nand(volatile a64 *a, a64 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchNand, a, v, mo);
|
|
}
|
|
|
|
#if __TSAN_HAS_INT128
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a128 __tsan_atomic128_fetch_nand(volatile a128 *a, a128 v, morder mo) {
|
|
SCOPED_ATOMIC(FetchNand, a, v, mo);
|
|
}
|
|
#endif
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
int __tsan_atomic8_compare_exchange_strong(volatile a8 *a, a8 *c, a8 v,
|
|
morder mo, morder fmo) {
|
|
SCOPED_ATOMIC(CAS, a, c, v, mo, fmo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
int __tsan_atomic16_compare_exchange_strong(volatile a16 *a, a16 *c, a16 v,
|
|
morder mo, morder fmo) {
|
|
SCOPED_ATOMIC(CAS, a, c, v, mo, fmo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
int __tsan_atomic32_compare_exchange_strong(volatile a32 *a, a32 *c, a32 v,
|
|
morder mo, morder fmo) {
|
|
SCOPED_ATOMIC(CAS, a, c, v, mo, fmo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
int __tsan_atomic64_compare_exchange_strong(volatile a64 *a, a64 *c, a64 v,
|
|
morder mo, morder fmo) {
|
|
SCOPED_ATOMIC(CAS, a, c, v, mo, fmo);
|
|
}
|
|
|
|
#if __TSAN_HAS_INT128
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
int __tsan_atomic128_compare_exchange_strong(volatile a128 *a, a128 *c, a128 v,
|
|
morder mo, morder fmo) {
|
|
SCOPED_ATOMIC(CAS, a, c, v, mo, fmo);
|
|
}
|
|
#endif
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
int __tsan_atomic8_compare_exchange_weak(volatile a8 *a, a8 *c, a8 v,
|
|
morder mo, morder fmo) {
|
|
SCOPED_ATOMIC(CAS, a, c, v, mo, fmo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
int __tsan_atomic16_compare_exchange_weak(volatile a16 *a, a16 *c, a16 v,
|
|
morder mo, morder fmo) {
|
|
SCOPED_ATOMIC(CAS, a, c, v, mo, fmo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
int __tsan_atomic32_compare_exchange_weak(volatile a32 *a, a32 *c, a32 v,
|
|
morder mo, morder fmo) {
|
|
SCOPED_ATOMIC(CAS, a, c, v, mo, fmo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
int __tsan_atomic64_compare_exchange_weak(volatile a64 *a, a64 *c, a64 v,
|
|
morder mo, morder fmo) {
|
|
SCOPED_ATOMIC(CAS, a, c, v, mo, fmo);
|
|
}
|
|
|
|
#if __TSAN_HAS_INT128
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
int __tsan_atomic128_compare_exchange_weak(volatile a128 *a, a128 *c, a128 v,
|
|
morder mo, morder fmo) {
|
|
SCOPED_ATOMIC(CAS, a, c, v, mo, fmo);
|
|
}
|
|
#endif
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a8 __tsan_atomic8_compare_exchange_val(volatile a8 *a, a8 c, a8 v,
|
|
morder mo, morder fmo) {
|
|
SCOPED_ATOMIC(CAS, a, c, v, mo, fmo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a16 __tsan_atomic16_compare_exchange_val(volatile a16 *a, a16 c, a16 v,
|
|
morder mo, morder fmo) {
|
|
SCOPED_ATOMIC(CAS, a, c, v, mo, fmo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a32 __tsan_atomic32_compare_exchange_val(volatile a32 *a, a32 c, a32 v,
|
|
morder mo, morder fmo) {
|
|
SCOPED_ATOMIC(CAS, a, c, v, mo, fmo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a64 __tsan_atomic64_compare_exchange_val(volatile a64 *a, a64 c, a64 v,
|
|
morder mo, morder fmo) {
|
|
SCOPED_ATOMIC(CAS, a, c, v, mo, fmo);
|
|
}
|
|
|
|
#if __TSAN_HAS_INT128
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
a128 __tsan_atomic128_compare_exchange_val(volatile a128 *a, a128 c, a128 v,
|
|
morder mo, morder fmo) {
|
|
SCOPED_ATOMIC(CAS, a, c, v, mo, fmo);
|
|
}
|
|
#endif
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
void __tsan_atomic_thread_fence(morder mo) {
|
|
char* a = 0;
|
|
SCOPED_ATOMIC(Fence, mo);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
void __tsan_atomic_signal_fence(morder mo) {
|
|
}
|
|
} // extern "C"
|
|
|
|
#else // #if !SANITIZER_GO
|
|
|
|
// Go
|
|
|
|
#define ATOMIC(func, ...) \
|
|
if (thr->ignore_sync) { \
|
|
NoTsanAtomic##func(__VA_ARGS__); \
|
|
} else { \
|
|
FuncEntry(thr, cpc); \
|
|
Atomic##func(thr, pc, __VA_ARGS__); \
|
|
FuncExit(thr); \
|
|
} \
|
|
/**/
|
|
|
|
#define ATOMIC_RET(func, ret, ...) \
|
|
if (thr->ignore_sync) { \
|
|
(ret) = NoTsanAtomic##func(__VA_ARGS__); \
|
|
} else { \
|
|
FuncEntry(thr, cpc); \
|
|
(ret) = Atomic##func(thr, pc, __VA_ARGS__); \
|
|
FuncExit(thr); \
|
|
} \
|
|
/**/
|
|
|
|
extern "C" {
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
void __tsan_go_atomic32_load(ThreadState *thr, uptr cpc, uptr pc, u8 *a) {
|
|
ATOMIC_RET(Load, *(a32*)(a+8), *(a32**)a, mo_acquire);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
void __tsan_go_atomic64_load(ThreadState *thr, uptr cpc, uptr pc, u8 *a) {
|
|
ATOMIC_RET(Load, *(a64*)(a+8), *(a64**)a, mo_acquire);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
void __tsan_go_atomic32_store(ThreadState *thr, uptr cpc, uptr pc, u8 *a) {
|
|
ATOMIC(Store, *(a32**)a, *(a32*)(a+8), mo_release);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
void __tsan_go_atomic64_store(ThreadState *thr, uptr cpc, uptr pc, u8 *a) {
|
|
ATOMIC(Store, *(a64**)a, *(a64*)(a+8), mo_release);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
void __tsan_go_atomic32_fetch_add(ThreadState *thr, uptr cpc, uptr pc, u8 *a) {
|
|
ATOMIC_RET(FetchAdd, *(a32*)(a+16), *(a32**)a, *(a32*)(a+8), mo_acq_rel);
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|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
void __tsan_go_atomic64_fetch_add(ThreadState *thr, uptr cpc, uptr pc, u8 *a) {
|
|
ATOMIC_RET(FetchAdd, *(a64*)(a+16), *(a64**)a, *(a64*)(a+8), mo_acq_rel);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
void __tsan_go_atomic32_exchange(ThreadState *thr, uptr cpc, uptr pc, u8 *a) {
|
|
ATOMIC_RET(Exchange, *(a32*)(a+16), *(a32**)a, *(a32*)(a+8), mo_acq_rel);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
void __tsan_go_atomic64_exchange(ThreadState *thr, uptr cpc, uptr pc, u8 *a) {
|
|
ATOMIC_RET(Exchange, *(a64*)(a+16), *(a64**)a, *(a64*)(a+8), mo_acq_rel);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
void __tsan_go_atomic32_compare_exchange(
|
|
ThreadState *thr, uptr cpc, uptr pc, u8 *a) {
|
|
a32 cur = 0;
|
|
a32 cmp = *(a32*)(a+8);
|
|
ATOMIC_RET(CAS, cur, *(a32**)a, cmp, *(a32*)(a+12), mo_acq_rel, mo_acquire);
|
|
*(bool*)(a+16) = (cur == cmp);
|
|
}
|
|
|
|
SANITIZER_INTERFACE_ATTRIBUTE
|
|
void __tsan_go_atomic64_compare_exchange(
|
|
ThreadState *thr, uptr cpc, uptr pc, u8 *a) {
|
|
a64 cur = 0;
|
|
a64 cmp = *(a64*)(a+8);
|
|
ATOMIC_RET(CAS, cur, *(a64**)a, cmp, *(a64*)(a+16), mo_acq_rel, mo_acquire);
|
|
*(bool*)(a+24) = (cur == cmp);
|
|
}
|
|
} // extern "C"
|
|
#endif // #if !SANITIZER_GO
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