954 lines
26 KiB
Plaintext
954 lines
26 KiB
Plaintext
; Options for the IA-32 and AMD64 ports of the compiler.
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; Copyright (C) 2005-2017 Free Software Foundation, Inc.
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;
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; This file is part of GCC.
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;
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; GCC is free software; you can redistribute it and/or modify it under
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; the terms of the GNU General Public License as published by the Free
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; Software Foundation; either version 3, or (at your option) any later
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; version.
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;
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; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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; WARRANTY; without even the implied warranty of MERCHANTABILITY or
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; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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; for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with GCC; see the file COPYING3. If not see
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; <http://www.gnu.org/licenses/>.
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HeaderInclude
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config/i386/i386-opts.h
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; Bit flags that specify the ISA we are compiling for.
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Variable
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HOST_WIDE_INT ix86_isa_flags = TARGET_64BIT_DEFAULT | TARGET_SUBTARGET_ISA_DEFAULT
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Variable
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HOST_WIDE_INT ix86_isa_flags2 = 0
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; A mask of ix86_isa_flags that includes bit X if X was set or cleared
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; on the command line.
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Variable
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HOST_WIDE_INT ix86_isa_flags_explicit
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Variable
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HOST_WIDE_INT ix86_isa_flags2_explicit
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; Additional target flags
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Variable
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int ix86_target_flags
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TargetVariable
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int recip_mask = RECIP_MASK_DEFAULT
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Variable
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int recip_mask_explicit
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TargetSave
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int x_recip_mask_explicit
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;; Definitions to add to the cl_target_option structure
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;; -march= processor
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TargetSave
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unsigned char arch
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;; -mtune= processor
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TargetSave
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unsigned char tune
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;; -march= processor-string
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TargetSave
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const char *x_ix86_arch_string
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;; -mtune= processor-string
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TargetSave
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const char *x_ix86_tune_string
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;; CPU schedule model
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TargetSave
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unsigned char schedule
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;; True if processor has SSE prefetch instruction.
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TargetSave
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unsigned char prefetch_sse
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;; branch cost
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TargetSave
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unsigned char branch_cost
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;; which flags were passed by the user
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TargetSave
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HOST_WIDE_INT x_ix86_isa_flags2_explicit
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;; which flags were passed by the user
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TargetSave
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HOST_WIDE_INT x_ix86_isa_flags_explicit
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;; whether -mtune was not specified
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TargetSave
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unsigned char tune_defaulted
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;; whether -march was specified
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TargetSave
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unsigned char arch_specified
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;; -mcmodel= model
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TargetSave
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enum cmodel x_ix86_cmodel
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;; -mabi=
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TargetSave
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enum calling_abi x_ix86_abi
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;; -masm=
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TargetSave
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enum asm_dialect x_ix86_asm_dialect
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;; -mbranch-cost=
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TargetSave
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int x_ix86_branch_cost
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;; -mdump-tune-features=
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TargetSave
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int x_ix86_dump_tunes
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;; -mstackrealign=
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TargetSave
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int x_ix86_force_align_arg_pointer
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;; -mforce-drap=
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TargetSave
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int x_ix86_force_drap
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;; -mincoming-stack-boundary=
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TargetSave
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int x_ix86_incoming_stack_boundary_arg
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;; -maddress-mode=
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TargetSave
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enum pmode x_ix86_pmode
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;; -mpreferred-stack-boundary=
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TargetSave
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int x_ix86_preferred_stack_boundary_arg
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;; -mrecip=
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TargetSave
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const char *x_ix86_recip_name
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;; -mregparm=
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TargetSave
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int x_ix86_regparm
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;; -mlarge-data-threshold=
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TargetSave
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int x_ix86_section_threshold
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;; -msse2avx=
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TargetSave
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int x_ix86_sse2avx
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;; -mstack-protector-guard=
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TargetSave
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enum stack_protector_guard x_ix86_stack_protector_guard
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;; -mstringop-strategy=
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TargetSave
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enum stringop_alg x_ix86_stringop_alg
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;; -mtls-dialect=
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TargetSave
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enum tls_dialect x_ix86_tls_dialect
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;; -mtune-ctrl=
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TargetSave
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const char *x_ix86_tune_ctrl_string
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;; -mmemcpy-strategy=
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TargetSave
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const char *x_ix86_tune_memcpy_strategy
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;; -mmemset-strategy=
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TargetSave
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const char *x_ix86_tune_memset_strategy
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;; -mno-default=
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TargetSave
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int x_ix86_tune_no_default
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;; -mveclibabi=
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TargetSave
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enum ix86_veclibabi x_ix86_veclibabi_type
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;; x86 options
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m128bit-long-double
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Target RejectNegative Report Mask(128BIT_LONG_DOUBLE) Save
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sizeof(long double) is 16.
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m80387
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Target Report Mask(80387) Save
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Use hardware fp.
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m96bit-long-double
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Target RejectNegative Report InverseMask(128BIT_LONG_DOUBLE) Save
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sizeof(long double) is 12.
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mlong-double-80
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Target Report RejectNegative Negative(mlong-double-64) InverseMask(LONG_DOUBLE_64) Save
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Use 80-bit long double.
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mlong-double-64
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Target Report RejectNegative Negative(mlong-double-128) Mask(LONG_DOUBLE_64) InverseMask(LONG_DOUBLE_128) Save
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Use 64-bit long double.
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mlong-double-128
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Target Report RejectNegative Negative(mlong-double-80) Mask(LONG_DOUBLE_128) InverseMask(LONG_DOUBLE_64) Save
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Use 128-bit long double.
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maccumulate-outgoing-args
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Target Report Mask(ACCUMULATE_OUTGOING_ARGS) Save
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Reserve space for outgoing arguments in the function prologue.
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malign-double
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Target Report Mask(ALIGN_DOUBLE) Save
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Align some doubles on dword boundary.
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malign-functions=
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Target RejectNegative Joined UInteger
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Function starts are aligned to this power of 2.
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malign-jumps=
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Target RejectNegative Joined UInteger
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Jump targets are aligned to this power of 2.
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malign-loops=
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Target RejectNegative Joined UInteger
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Loop code aligned to this power of 2.
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malign-stringops
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Target RejectNegative Report InverseMask(NO_ALIGN_STRINGOPS, ALIGN_STRINGOPS) Save
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Align destination of the string operations.
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malign-data=
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Target RejectNegative Joined Var(ix86_align_data_type) Enum(ix86_align_data) Init(ix86_align_data_type_compat)
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Use the given data alignment.
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Enum
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Name(ix86_align_data) Type(enum ix86_align_data)
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Known data alignment choices (for use with the -malign-data= option):
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EnumValue
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Enum(ix86_align_data) String(compat) Value(ix86_align_data_type_compat)
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EnumValue
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Enum(ix86_align_data) String(abi) Value(ix86_align_data_type_abi)
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EnumValue
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Enum(ix86_align_data) String(cacheline) Value(ix86_align_data_type_cacheline)
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march=
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Target RejectNegative Joined Var(ix86_arch_string)
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Generate code for given CPU.
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masm=
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Target RejectNegative Joined Enum(asm_dialect) Var(ix86_asm_dialect) Init(ASM_ATT)
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Use given assembler dialect.
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Enum
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Name(asm_dialect) Type(enum asm_dialect)
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Known assembler dialects (for use with the -masm= option):
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EnumValue
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Enum(asm_dialect) String(intel) Value(ASM_INTEL)
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EnumValue
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Enum(asm_dialect) String(att) Value(ASM_ATT)
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mbranch-cost=
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Target RejectNegative Joined UInteger Var(ix86_branch_cost)
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Branches are this expensive (1-5, arbitrary units).
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mlarge-data-threshold=
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Target RejectNegative Joined UInteger Var(ix86_section_threshold) Init(DEFAULT_LARGE_SECTION_THRESHOLD)
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-mlarge-data-threshold=<number> Data greater than given threshold will go into .ldata section in x86-64 medium model.
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mcmodel=
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Target RejectNegative Joined Enum(cmodel) Var(ix86_cmodel) Init(CM_32)
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Use given x86-64 code model.
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Enum
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Name(cmodel) Type(enum cmodel)
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Known code models (for use with the -mcmodel= option):
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EnumValue
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Enum(cmodel) String(small) Value(CM_SMALL)
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EnumValue
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Enum(cmodel) String(medium) Value(CM_MEDIUM)
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EnumValue
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Enum(cmodel) String(large) Value(CM_LARGE)
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EnumValue
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Enum(cmodel) String(32) Value(CM_32)
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EnumValue
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Enum(cmodel) String(kernel) Value(CM_KERNEL)
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maddress-mode=
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Target RejectNegative Joined Enum(pmode) Var(ix86_pmode) Init(PMODE_SI)
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Use given address mode.
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Enum
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Name(pmode) Type(enum pmode)
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Known address mode (for use with the -maddress-mode= option):
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EnumValue
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Enum(pmode) String(short) Value(PMODE_SI)
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EnumValue
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Enum(pmode) String(long) Value(PMODE_DI)
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mcpu=
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Target RejectNegative Joined Undocumented Alias(mtune=) Warn(%<-mcpu=%> is deprecated; use %<-mtune=%> or %<-march=%> instead)
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mfancy-math-387
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Target RejectNegative Report InverseMask(NO_FANCY_MATH_387, USE_FANCY_MATH_387) Save
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Generate sin, cos, sqrt for FPU.
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mforce-drap
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Target Report Var(ix86_force_drap)
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Always use Dynamic Realigned Argument Pointer (DRAP) to realign stack.
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mfp-ret-in-387
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Target Report Mask(FLOAT_RETURNS) Save
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Return values of functions in FPU registers.
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mfpmath=
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Target RejectNegative Joined Var(ix86_fpmath) Enum(fpmath_unit) Init(FPMATH_387) Save
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Generate floating point mathematics using given instruction set.
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Enum
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Name(fpmath_unit) Type(enum fpmath_unit)
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Valid arguments to -mfpmath=:
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EnumValue
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Enum(fpmath_unit) String(387) Value(FPMATH_387)
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EnumValue
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Enum(fpmath_unit) String(sse) Value(FPMATH_SSE)
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EnumValue
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Enum(fpmath_unit) String(387,sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
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EnumValue
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Enum(fpmath_unit) String(387+sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
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EnumValue
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Enum(fpmath_unit) String(sse,387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
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EnumValue
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Enum(fpmath_unit) String(sse+387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
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EnumValue
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Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
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mhard-float
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Target RejectNegative Mask(80387) Save
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Use hardware fp.
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mieee-fp
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Target Report Mask(IEEE_FP) Save
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Use IEEE math for fp comparisons.
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minline-all-stringops
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Target Report Mask(INLINE_ALL_STRINGOPS) Save
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Inline all known string operations.
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minline-stringops-dynamically
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Target Report Mask(INLINE_STRINGOPS_DYNAMICALLY) Save
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Inline memset/memcpy string operations, but perform inline version only for small blocks.
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mintel-syntax
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Target Undocumented Alias(masm=, intel, att) Warn(%<-mintel-syntax%> and %<-mno-intel-syntax%> are deprecated; use %<-masm=intel%> and %<-masm=att%> instead)
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;; Deprecated
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mms-bitfields
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Target Report Mask(MS_BITFIELD_LAYOUT) Save
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Use native (MS) bitfield layout.
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mno-align-stringops
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Target RejectNegative Report Mask(NO_ALIGN_STRINGOPS) Undocumented Save
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mno-fancy-math-387
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Target RejectNegative Report Mask(NO_FANCY_MATH_387) Undocumented Save
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mno-push-args
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Target RejectNegative Report Mask(NO_PUSH_ARGS) Undocumented Save
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mno-red-zone
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Target RejectNegative Report Mask(NO_RED_ZONE) Undocumented Save
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momit-leaf-frame-pointer
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Target Report Mask(OMIT_LEAF_FRAME_POINTER) Save
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Omit the frame pointer in leaf functions.
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mpc32
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Target RejectNegative Report
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Set 80387 floating-point precision to 32-bit.
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mpc64
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Target RejectNegative Report
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Set 80387 floating-point precision to 64-bit.
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mpc80
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Target RejectNegative Report
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Set 80387 floating-point precision to 80-bit.
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mpreferred-stack-boundary=
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Target RejectNegative Joined UInteger Var(ix86_preferred_stack_boundary_arg)
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Attempt to keep stack aligned to this power of 2.
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mincoming-stack-boundary=
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Target RejectNegative Joined UInteger Var(ix86_incoming_stack_boundary_arg)
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Assume incoming stack aligned to this power of 2.
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mpush-args
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Target Report InverseMask(NO_PUSH_ARGS, PUSH_ARGS) Save
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Use push instructions to save outgoing arguments.
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mred-zone
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Target RejectNegative Report InverseMask(NO_RED_ZONE, RED_ZONE) Save
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Use red-zone in the x86-64 code.
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mregparm=
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Target RejectNegative Joined UInteger Var(ix86_regparm)
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Number of registers used to pass integer arguments.
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mrtd
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Target Report Mask(RTD) Save
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Alternate calling convention.
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msoft-float
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Target InverseMask(80387) Save
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Do not use hardware fp.
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msseregparm
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Target RejectNegative Mask(SSEREGPARM) Save
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Use SSE register passing conventions for SF and DF mode.
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mstackrealign
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Target Report Var(ix86_force_align_arg_pointer) Init(-1)
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Realign stack in prologue.
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mstack-arg-probe
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Target Report Mask(STACK_PROBE) Save
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Enable stack probing.
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mmemcpy-strategy=
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Target RejectNegative Joined Var(ix86_tune_memcpy_strategy)
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Specify memcpy expansion strategy when expected size is known.
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mmemset-strategy=
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Target RejectNegative Joined Var(ix86_tune_memset_strategy)
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Specify memset expansion strategy when expected size is known.
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mstringop-strategy=
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Target RejectNegative Joined Enum(stringop_alg) Var(ix86_stringop_alg) Init(no_stringop)
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Chose strategy to generate stringop using.
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Enum
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Name(stringop_alg) Type(enum stringop_alg)
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Valid arguments to -mstringop-strategy=:
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EnumValue
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Enum(stringop_alg) String(rep_byte) Value(rep_prefix_1_byte)
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EnumValue
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Enum(stringop_alg) String(libcall) Value(libcall)
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EnumValue
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Enum(stringop_alg) String(rep_4byte) Value(rep_prefix_4_byte)
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EnumValue
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Enum(stringop_alg) String(rep_8byte) Value(rep_prefix_8_byte)
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EnumValue
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Enum(stringop_alg) String(byte_loop) Value(loop_1_byte)
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EnumValue
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Enum(stringop_alg) String(loop) Value(loop)
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EnumValue
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Enum(stringop_alg) String(unrolled_loop) Value(unrolled_loop)
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EnumValue
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Enum(stringop_alg) String(vector_loop) Value(vector_loop)
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mtls-dialect=
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Target RejectNegative Joined Var(ix86_tls_dialect) Enum(tls_dialect) Init(TLS_DIALECT_GNU)
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Use given thread-local storage dialect.
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Enum
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Name(tls_dialect) Type(enum tls_dialect)
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Known TLS dialects (for use with the -mtls-dialect= option):
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EnumValue
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Enum(tls_dialect) String(gnu) Value(TLS_DIALECT_GNU)
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EnumValue
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Enum(tls_dialect) String(gnu2) Value(TLS_DIALECT_GNU2)
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mtls-direct-seg-refs
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Target Report Mask(TLS_DIRECT_SEG_REFS)
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Use direct references against %gs when accessing tls data.
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mtune=
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Target RejectNegative Joined Var(ix86_tune_string)
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Schedule code for given CPU.
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mtune-ctrl=
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Target RejectNegative Joined Var(ix86_tune_ctrl_string)
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Fine grain control of tune features.
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mno-default
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Target RejectNegative Var(ix86_tune_no_default) Init(0)
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Clear all tune features.
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mdump-tune-features
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Target RejectNegative Var(ix86_dump_tunes) Init(0)
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miamcu
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Target Report Mask(IAMCU)
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Generate code that conforms to Intel MCU psABI.
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mabi=
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Target RejectNegative Joined Var(ix86_abi) Enum(calling_abi) Init(SYSV_ABI)
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Generate code that conforms to the given ABI.
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Enum
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Name(calling_abi) Type(enum calling_abi)
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Known ABIs (for use with the -mabi= option):
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EnumValue
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Enum(calling_abi) String(sysv) Value(SYSV_ABI)
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EnumValue
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Enum(calling_abi) String(ms) Value(MS_ABI)
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mveclibabi=
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Target RejectNegative Joined Var(ix86_veclibabi_type) Enum(ix86_veclibabi) Init(ix86_veclibabi_type_none)
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Vector library ABI to use.
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Enum
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Name(ix86_veclibabi) Type(enum ix86_veclibabi)
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Known vectorization library ABIs (for use with the -mveclibabi= option):
|
|
|
|
EnumValue
|
|
Enum(ix86_veclibabi) String(svml) Value(ix86_veclibabi_type_svml)
|
|
|
|
EnumValue
|
|
Enum(ix86_veclibabi) String(acml) Value(ix86_veclibabi_type_acml)
|
|
|
|
mvect8-ret-in-mem
|
|
Target Report Mask(VECT8_RETURNS) Save
|
|
Return 8-byte vectors in memory.
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|
|
|
mrecip
|
|
Target Report Mask(RECIP) Save
|
|
Generate reciprocals instead of divss and sqrtss.
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|
|
|
mrecip=
|
|
Target Report RejectNegative Joined Var(ix86_recip_name)
|
|
Control generation of reciprocal estimates.
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|
|
|
mcld
|
|
Target Report Mask(CLD) Save
|
|
Generate cld instruction in the function prologue.
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|
|
|
mvzeroupper
|
|
Target Report Mask(VZEROUPPER) Save
|
|
Generate vzeroupper instruction before a transfer of control flow out of
|
|
the function.
|
|
|
|
mstv
|
|
Target Report Mask(STV) Save
|
|
Disable Scalar to Vector optimization pass transforming 64-bit integer
|
|
computations into a vector ones.
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|
|
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mdispatch-scheduler
|
|
Target RejectNegative Var(flag_dispatch_scheduler)
|
|
Do dispatch scheduling if processor is bdver1, bdver2, bdver3, bdver4
|
|
or znver1 and Haifa scheduling is selected.
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|
|
|
mprefer-avx128
|
|
Target Report Mask(PREFER_AVX128) SAVE
|
|
Use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer.
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|
|
|
;; ISA support
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|
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m32
|
|
Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save
|
|
Generate 32bit i386 code.
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|
|
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m64
|
|
Target RejectNegative Negative(mx32) Report Mask(ABI_64) Var(ix86_isa_flags) Save
|
|
Generate 64bit x86-64 code.
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|
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|
mx32
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Target RejectNegative Negative(m16) Report Mask(ABI_X32) Var(ix86_isa_flags) Save
|
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Generate 32bit x86-64 code.
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|
m16
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Target RejectNegative Negative(m32) Report Mask(CODE16) InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save
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Generate 16bit i386 code.
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mmmx
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Target Report Mask(ISA_MMX) Var(ix86_isa_flags) Save
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Support MMX built-in functions.
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m3dnow
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Target Report Mask(ISA_3DNOW) Var(ix86_isa_flags) Save
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Support 3DNow! built-in functions.
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m3dnowa
|
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Target Report Mask(ISA_3DNOW_A) Var(ix86_isa_flags) Save
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Support Athlon 3Dnow! built-in functions.
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msse
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Target Report Mask(ISA_SSE) Var(ix86_isa_flags) Save
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Support MMX and SSE built-in functions and code generation.
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msse2
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Target Report Mask(ISA_SSE2) Var(ix86_isa_flags) Save
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Support MMX, SSE and SSE2 built-in functions and code generation.
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msse3
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Target Report Mask(ISA_SSE3) Var(ix86_isa_flags) Save
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Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation.
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mssse3
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Target Report Mask(ISA_SSSE3) Var(ix86_isa_flags) Save
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Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation.
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msse4.1
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Target Report Mask(ISA_SSE4_1) Var(ix86_isa_flags) Save
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|
Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1 built-in functions and code generation.
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|
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msse4.2
|
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Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
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|
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation.
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|
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msse4
|
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Target RejectNegative Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
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|
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation.
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|
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|
mno-sse4
|
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Target RejectNegative Report InverseMask(ISA_SSE4_1) Var(ix86_isa_flags) Save
|
|
Do not support SSE4.1 and SSE4.2 built-in functions and code generation.
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|
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|
msse5
|
|
Target Undocumented Alias(mavx) Warn(%<-msse5%> was removed)
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|
;; Deprecated
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|
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mavx
|
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Target Report Mask(ISA_AVX) Var(ix86_isa_flags) Save
|
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Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions and code generation.
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|
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mavx2
|
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Target Report Mask(ISA_AVX2) Var(ix86_isa_flags) Save
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Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and AVX2 built-in functions and code generation.
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|
|
|
mavx512f
|
|
Target Report Mask(ISA_AVX512F) Var(ix86_isa_flags) Save
|
|
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation.
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|
|
|
mavx512pf
|
|
Target Report Mask(ISA_AVX512PF) Var(ix86_isa_flags) Save
|
|
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512PF built-in functions and code generation.
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|
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|
mavx512er
|
|
Target Report Mask(ISA_AVX512ER) Var(ix86_isa_flags) Save
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|
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512ER built-in functions and code generation.
|
|
|
|
mavx512cd
|
|
Target Report Mask(ISA_AVX512CD) Var(ix86_isa_flags) Save
|
|
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512CD built-in functions and code generation.
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|
|
|
mavx512dq
|
|
Target Report Mask(ISA_AVX512DQ) Var(ix86_isa_flags) Save
|
|
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512DQ built-in functions and code generation.
|
|
|
|
mavx512bw
|
|
Target Report Mask(ISA_AVX512BW) Var(ix86_isa_flags) Save
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|
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512BW built-in functions and code generation.
|
|
|
|
mavx512vl
|
|
Target Report Mask(ISA_AVX512VL) Var(ix86_isa_flags) Save
|
|
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VL built-in functions and code generation.
|
|
|
|
mavx512ifma
|
|
Target Report Mask(ISA_AVX512IFMA) Var(ix86_isa_flags) Save
|
|
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512IFMA built-in functions and code generation.
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|
|
|
mavx512vbmi
|
|
Target Report Mask(ISA_AVX512VBMI) Var(ix86_isa_flags) Save
|
|
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VBMI built-in functions and code generation.
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|
|
|
mavx5124fmaps
|
|
Target Report Mask(ISA_AVX5124FMAPS) Var(ix86_isa_flags2) Save
|
|
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX5124FMAPS built-in functions and code generation.
|
|
|
|
mavx5124vnniw
|
|
Target Report Mask(ISA_AVX5124VNNIW) Var(ix86_isa_flags2) Save
|
|
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX5124VNNIW built-in functions and code generation.
|
|
|
|
mavx512vpopcntdq
|
|
Target Report Mask(ISA_AVX512VPOPCNTDQ) Var(ix86_isa_flags2) Save
|
|
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VPOPCNTDQ built-in functions and code generation.
|
|
|
|
mfma
|
|
Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save
|
|
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation.
|
|
|
|
msse4a
|
|
Target Report Mask(ISA_SSE4A) Var(ix86_isa_flags) Save
|
|
Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code generation.
|
|
|
|
mfma4
|
|
Target Report Mask(ISA_FMA4) Var(ix86_isa_flags) Save
|
|
Support FMA4 built-in functions and code generation.
|
|
|
|
mxop
|
|
Target Report Mask(ISA_XOP) Var(ix86_isa_flags) Save
|
|
Support XOP built-in functions and code generation.
|
|
|
|
mlwp
|
|
Target Report Mask(ISA_LWP) Var(ix86_isa_flags) Save
|
|
Support LWP built-in functions and code generation.
|
|
|
|
mabm
|
|
Target Report Mask(ISA_ABM) Var(ix86_isa_flags) Save
|
|
Support code generation of Advanced Bit Manipulation (ABM) instructions.
|
|
|
|
mpopcnt
|
|
Target Report Mask(ISA_POPCNT) Var(ix86_isa_flags) Save
|
|
Support code generation of popcnt instruction.
|
|
|
|
msgx
|
|
Target Report Mask(ISA_SGX) Var(ix86_isa_flags2) Save
|
|
Support SGX built-in functions and code generation.
|
|
|
|
mrdpid
|
|
Target Report Mask(ISA_RDPID) Var(ix86_isa_flags2) Save
|
|
Support RDPID built-in functions and code generation.
|
|
|
|
mbmi
|
|
Target Report Mask(ISA_BMI) Var(ix86_isa_flags) Save
|
|
Support BMI built-in functions and code generation.
|
|
|
|
mbmi2
|
|
Target Report Mask(ISA_BMI2) Var(ix86_isa_flags) Save
|
|
Support BMI2 built-in functions and code generation.
|
|
|
|
mlzcnt
|
|
Target Report Mask(ISA_LZCNT) Var(ix86_isa_flags) Save
|
|
Support LZCNT built-in function and code generation.
|
|
|
|
mhle
|
|
Target Report Mask(ISA_HLE) Var(ix86_isa_flags) Save
|
|
Support Hardware Lock Elision prefixes.
|
|
|
|
mrdseed
|
|
Target Report Mask(ISA_RDSEED) Var(ix86_isa_flags) Save
|
|
Support RDSEED instruction.
|
|
|
|
mprfchw
|
|
Target Report Mask(ISA_PRFCHW) Var(ix86_isa_flags) Save
|
|
Support PREFETCHW instruction.
|
|
|
|
madx
|
|
Target Report Mask(ISA_ADX) Var(ix86_isa_flags) Save
|
|
Support flag-preserving add-carry instructions.
|
|
|
|
mclflushopt
|
|
Target Report Mask(ISA_CLFLUSHOPT) Var(ix86_isa_flags) Save
|
|
Support CLFLUSHOPT instructions.
|
|
|
|
mclwb
|
|
Target Report Mask(ISA_CLWB) Var(ix86_isa_flags) Save
|
|
Support CLWB instruction.
|
|
|
|
mpcommit
|
|
Target Undocumented Warn(%<-mpcommit%> was deprecated)
|
|
;; Deprecated
|
|
|
|
mfxsr
|
|
Target Report Mask(ISA_FXSR) Var(ix86_isa_flags) Save
|
|
Support FXSAVE and FXRSTOR instructions.
|
|
|
|
mxsave
|
|
Target Report Mask(ISA_XSAVE) Var(ix86_isa_flags) Save
|
|
Support XSAVE and XRSTOR instructions.
|
|
|
|
mxsaveopt
|
|
Target Report Mask(ISA_XSAVEOPT) Var(ix86_isa_flags) Save
|
|
Support XSAVEOPT instruction.
|
|
|
|
mxsavec
|
|
Target Report Mask(ISA_XSAVEC) Var(ix86_isa_flags) Save
|
|
Support XSAVEC instructions.
|
|
|
|
mxsaves
|
|
Target Report Mask(ISA_XSAVES) Var(ix86_isa_flags) Save
|
|
Support XSAVES and XRSTORS instructions.
|
|
|
|
mtbm
|
|
Target Report Mask(ISA_TBM) Var(ix86_isa_flags) Save
|
|
Support TBM built-in functions and code generation.
|
|
|
|
mcx16
|
|
Target Report Mask(ISA_CX16) Var(ix86_isa_flags) Save
|
|
Support code generation of cmpxchg16b instruction.
|
|
|
|
msahf
|
|
Target Report Mask(ISA_SAHF) Var(ix86_isa_flags) Save
|
|
Support code generation of sahf instruction in 64bit x86-64 code.
|
|
|
|
mmovbe
|
|
Target Report Mask(ISA_MOVBE) Var(ix86_isa_flags) Save
|
|
Support code generation of movbe instruction.
|
|
|
|
mcrc32
|
|
Target Report Mask(ISA_CRC32) Var(ix86_isa_flags) Save
|
|
Support code generation of crc32 instruction.
|
|
|
|
maes
|
|
Target Report Mask(ISA_AES) Var(ix86_isa_flags) Save
|
|
Support AES built-in functions and code generation.
|
|
|
|
msha
|
|
Target Report Mask(ISA_SHA) Var(ix86_isa_flags) Save
|
|
Support SHA1 and SHA256 built-in functions and code generation.
|
|
|
|
mpclmul
|
|
Target Report Mask(ISA_PCLMUL) Var(ix86_isa_flags) Save
|
|
Support PCLMUL built-in functions and code generation.
|
|
|
|
msse2avx
|
|
Target Report Var(ix86_sse2avx)
|
|
Encode SSE instructions with VEX prefix.
|
|
|
|
mfsgsbase
|
|
Target Report Mask(ISA_FSGSBASE) Var(ix86_isa_flags) Save
|
|
Support FSGSBASE built-in functions and code generation.
|
|
|
|
mrdrnd
|
|
Target Report Mask(ISA_RDRND) Var(ix86_isa_flags) Save
|
|
Support RDRND built-in functions and code generation.
|
|
|
|
mf16c
|
|
Target Report Mask(ISA_F16C) Var(ix86_isa_flags) Save
|
|
Support F16C built-in functions and code generation.
|
|
|
|
mprefetchwt1
|
|
Target Report Mask(ISA_PREFETCHWT1) Var(ix86_isa_flags) Save
|
|
Support PREFETCHWT1 built-in functions and code generation.
|
|
|
|
mfentry
|
|
Target Report Var(flag_fentry) Init(-1)
|
|
Emit profiling counter call at function entry before prologue.
|
|
|
|
mrecord-mcount
|
|
Target Report Var(flag_record_mcount) Init(0)
|
|
Generate __mcount_loc section with all mcount or __fentry__ calls.
|
|
|
|
mnop-mcount
|
|
Target Report Var(flag_nop_mcount) Init(0)
|
|
Generate mcount/__fentry__ calls as nops. To activate they need to be
|
|
patched in.
|
|
|
|
mskip-rax-setup
|
|
Target Report Var(flag_skip_rax_setup) Init(0)
|
|
Skip setting up RAX register when passing variable arguments.
|
|
|
|
m8bit-idiv
|
|
Target Report Mask(USE_8BIT_IDIV) Save
|
|
Expand 32bit/64bit integer divide into 8bit unsigned integer divide with run-time check.
|
|
|
|
mavx256-split-unaligned-load
|
|
Target Report Mask(AVX256_SPLIT_UNALIGNED_LOAD) Save
|
|
Split 32-byte AVX unaligned load.
|
|
|
|
mavx256-split-unaligned-store
|
|
Target Report Mask(AVX256_SPLIT_UNALIGNED_STORE) Save
|
|
Split 32-byte AVX unaligned store.
|
|
|
|
mrtm
|
|
Target Report Mask(ISA_RTM) Var(ix86_isa_flags) Save
|
|
Support RTM built-in functions and code generation.
|
|
|
|
mmpx
|
|
Target Report Mask(ISA_MPX) Var(ix86_isa_flags) Save
|
|
Support MPX code generation.
|
|
|
|
mmwaitx
|
|
Target Report Mask(ISA_MWAITX) Var(ix86_isa_flags) Save
|
|
Support MWAITX and MONITORX built-in functions and code generation.
|
|
|
|
mclzero
|
|
Target Report Mask(ISA_CLZERO) Var(ix86_isa_flags) Save
|
|
Support CLZERO built-in functions and code generation.
|
|
|
|
mpku
|
|
Target Report Mask(ISA_PKU) Var(ix86_isa_flags) Save
|
|
Support PKU built-in functions and code generation.
|
|
|
|
mstack-protector-guard=
|
|
Target RejectNegative Joined Enum(stack_protector_guard) Var(ix86_stack_protector_guard) Init(SSP_TLS)
|
|
Use given stack-protector guard.
|
|
|
|
Enum
|
|
Name(stack_protector_guard) Type(enum stack_protector_guard)
|
|
Known stack protector guard (for use with the -mstack-protector-guard= option):
|
|
|
|
EnumValue
|
|
Enum(stack_protector_guard) String(tls) Value(SSP_TLS)
|
|
|
|
EnumValue
|
|
Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL)
|
|
|
|
mmitigate-rop
|
|
Target Var(flag_mitigate_rop) Init(0)
|
|
Attempt to avoid generating instruction sequences containing ret bytes.
|
|
|
|
mgeneral-regs-only
|
|
Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Var(ix86_target_flags) Save
|
|
Generate code which uses only the general registers.
|
|
|
|
mindirect-branch=
|
|
Target Report RejectNegative Joined Enum(indirect_branch) Var(ix86_indirect_branch) Init(indirect_branch_keep)
|
|
Convert indirect call and jump to call and return thunks.
|
|
|
|
mfunction-return=
|
|
Target Report RejectNegative Joined Enum(indirect_branch) Var(ix86_function_return) Init(indirect_branch_keep)
|
|
Convert function return to call and return thunk.
|
|
|
|
Enum
|
|
Name(indirect_branch) Type(enum indirect_branch)
|
|
Known indirect branch choices (for use with the -mindirect-branch=/-mfunction-return= options):
|
|
|
|
EnumValue
|
|
Enum(indirect_branch) String(keep) Value(indirect_branch_keep)
|
|
|
|
EnumValue
|
|
Enum(indirect_branch) String(thunk) Value(indirect_branch_thunk)
|
|
|
|
EnumValue
|
|
Enum(indirect_branch) String(thunk-inline) Value(indirect_branch_thunk_inline)
|
|
|
|
EnumValue
|
|
Enum(indirect_branch) String(thunk-extern) Value(indirect_branch_thunk_extern)
|