115 lines
3.6 KiB
C
115 lines
3.6 KiB
C
/* Copyright (C) 2012-2020 Free Software Foundation, Inc.
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Contributed by Richard Henderson <rth@redhat.com>.
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This file is part of the GNU Atomic Library (libatomic).
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Libatomic is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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Libatomic is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#include <libatomic_i.h>
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#include <arm-config.h>
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/* When using STREX to implement sub-word exchange, we can do much better
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than the compiler by using the APSR.GE and APSR.C flags. */
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#if !DONE && __ARM_FEATURE_SIMD32 && HAVE_STREX && !HAVE_STREXBH && N == 2
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UTYPE
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SIZE(libat_exchange) (UTYPE *mptr, UTYPE newval, int smodel)
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{
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UWORD t1, t2;
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UTYPE oldval;
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__atomic_thread_fence (__ATOMIC_SEQ_CST);
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/* In the N=2 case, there are only two cases for MPTR: mptr % 4 == {0,2}.
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Rather than computing a variable shift for this, we can store the one
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bit of misalignment in the carry flag, and use conditional constant
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shifts instead. This saves a register. */
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#ifdef __ARMEB__
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# define HI "cc" /* iff value is in high half */
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# define LO "cs" /* iff value is in low half */
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#else
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# define HI "cs"
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# define LO "cc"
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#endif
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asm volatile (
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"lsrs %[t2],%[ptr],#2\n" /* carry = mptr & 2 */
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" bic %[ptr],%[ptr],#3\n" /* align mptr */
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" itt "HI"\n"
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" lsl"HI" %[t1],%[t1],#16\n" /* shift mask into place */
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" lsl"HI" %[new],%[new],#16\n" /* shift newval into place */
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" uadd16 %[t1],%[t1],%[t1]\n" /* copy mask into APSR.GE */
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"0: ldrex %[t2],[%[ptr]]\n"
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" ite "LO"\n"
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" uxth"LO" %[old],%[t2]\n" /* return old value */
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" uxth"HI" %[old],%[t2], ror #16\n"
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" sel %[t1],%[new],%[t2]\n" /* merge newval */
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" strex %[t2],%[t1],[%[ptr]]\n"
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" tst %[t2],%[t2]\n" /* dont clobber carry */
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" bne 0b"
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: [old] "=&r"(oldval), [t1] "=&r"(t1), [t2] "=&r"(t2),
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[ptr] "+r"(mptr), [new] "+r"(newval)
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: "1"(0xffff)
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: "memory");
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__atomic_thread_fence (__ATOMIC_SEQ_CST);
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return oldval;
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}
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#define DONE 1
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#endif /* !HAVE_STREXBH && N == 2 */
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#if !DONE && __ARM_FEATURE_SIMD32 && HAVE_STREX && !HAVE_STREXBH && N == 1
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UTYPE
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SIZE(libat_exchange) (UTYPE *mptr, UTYPE newval, int smodel)
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{
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UWORD *wptr, woldval, wnewval, shift, mask, t1, t2;
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__atomic_thread_fence (__ATOMIC_SEQ_CST);
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wptr = (UWORD *)((uintptr_t)mptr & -WORDSIZE);
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shift = (((uintptr_t)mptr % WORDSIZE) * CHAR_BIT) ^ INVERT_MASK_1;
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mask = MASK_1 << shift;
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wnewval = newval << shift;
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asm volatile (
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"uadd8 %[t1],%[t1],%[t1]\n" /* move mask to APSR.GE */
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"0: ldrex %[old],[%[wptr]]\n"
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" sel %[t1],%[new],%[old]\n" /* merge newval */
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" strex %[t2],%[t1],[%[wptr]]\n"
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" cmp %[t2],#0\n"
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" bne 0b"
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: [old] "=&r"(woldval), [t1] "=&r"(t1), [t2] "=&r"(t2)
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: [new] "r"(wnewval), [wptr] "r"(wptr), "1"(mask)
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: "memory");
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__atomic_thread_fence (__ATOMIC_SEQ_CST);
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return woldval >> shift;
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}
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#define DONE 1
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#endif /* !HAVE_STREXBH && N == 1 */
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#include "../../exch_n.c"
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