c7f1ff01a2
The vmovn_high* intrinsics are supposed to map to XTN2 instructions that narrow their source vector and instert it into the top half of the destination vector. This patch reimplements them away from inline assembly to an RTL builtin that performs a vec_concat with a truncate. gcc/ * config/aarch64/aarch64-simd.md (aarch64_xtn2<mode>_le): Define. (aarch64_xtn2<mode>_be): Likewise. (aarch64_xtn2<mode>): Likewise. * config/aarch64/aarch64-simd-builtins.def (xtn2): Define builtins. * config/aarch64/arm_neon.h (vmovn_high_s16): Reimplement using builtins. (vmovn_high_s32): Likewise. (vmovn_high_s64): Likewise. (vmovn_high_u16): Likewise. (vmovn_high_u32): Likewise. (vmovn_high_u64): Likewise. gcc/testsuite/ * gcc.target/aarch64/narrow_high-intrinsics.c: Adjust scan-assembler-times for xtn2.
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