253 lines
6.0 KiB
ArmAsm
253 lines
6.0 KiB
ArmAsm
/* This file contains the exception-handling save_world and
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* restore_world routines, which need to do a run-time check to see if
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* they should save and restore the vector registers.
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*
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* Copyright (C) 2004-2019 Free Software Foundation, Inc.
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*
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* This file is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 3, or (at your option) any
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* later version.
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*
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* This file is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* Under Section 7 of GPL version 3, you are granted additional
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* permissions described in the GCC Runtime Library Exception, version
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* 3.1, as published by the Free Software Foundation.
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*
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* You should have received a copy of the GNU General Public License and
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* a copy of the GCC Runtime Library Exception along with this program;
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* see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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* <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ppc64__
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.machine ppc7400
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.data
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.align 2
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#ifdef __DYNAMIC__
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.non_lazy_symbol_pointer
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L_has_vec$non_lazy_ptr:
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.indirect_symbol __cpu_has_altivec
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.long 0
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#else
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/* For static, "pretend" we have a non-lazy-pointer. */
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L_has_vec$non_lazy_ptr:
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.long __cpu_has_altivec
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#endif
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.text
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.align 2
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/* save_world and rest_world save/restore F14-F31 and possibly V20-V31
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(assuming you have a CPU with vector registers; we use a global var
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provided by the System Framework to determine this.)
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SAVE_WORLD takes R0 (the caller`s caller`s return address) and R11
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(the stack frame size) as parameters. It returns the updated VRsave
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in R0 if we`re on a CPU with vector regs.
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For gcc3 onward, we need to save and restore CR as well, since scheduled
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prologs can cause comparisons to be moved before calls to save_world.
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USES: R0 R11 R12 */
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.private_extern save_world
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save_world:
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stw r0,8(r1)
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mflr r0
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bcl 20,31,Ls$pb
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Ls$pb: mflr r12
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addis r12,r12,ha16(L_has_vec$non_lazy_ptr-Ls$pb)
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lwz r12,lo16(L_has_vec$non_lazy_ptr-Ls$pb)(r12)
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mtlr r0
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lwz r12,0(r12)
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/* grab CR */
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mfcr r0
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/* test HAS_VEC */
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cmpwi r12,0
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stfd f14,-144(r1)
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stfd f15,-136(r1)
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stfd f16,-128(r1)
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stfd f17,-120(r1)
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stfd f18,-112(r1)
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stfd f19,-104(r1)
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stfd f20,-96(r1)
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stfd f21,-88(r1)
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stfd f22,-80(r1)
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stfd f23,-72(r1)
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stfd f24,-64(r1)
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stfd f25,-56(r1)
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stfd f26,-48(r1)
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stfd f27,-40(r1)
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stfd f28,-32(r1)
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stfd f29,-24(r1)
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stfd f30,-16(r1)
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stfd f31,-8(r1)
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stmw r13,-220(r1)
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/* stash CR */
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stw r0,4(r1)
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/* set R12 pointing at Vector Reg save area */
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addi r12,r1,-224
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/* allocate stack frame */
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stwux r1,r1,r11
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/* ...but return if HAS_VEC is zero */
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bne+ L$saveVMX
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/* Not forgetting to restore CR. */
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mtcr r0
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blr
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L$saveVMX:
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/* We're saving Vector regs too. */
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/* Restore CR from R0. No More Branches! */
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mtcr r0
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/* We should really use VRSAVE to figure out which vector regs
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we actually need to save and restore. Some other time :-/ */
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li r11,-192
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stvx v20,r11,r12
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li r11,-176
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stvx v21,r11,r12
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li r11,-160
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stvx v22,r11,r12
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li r11,-144
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stvx v23,r11,r12
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li r11,-128
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stvx v24,r11,r12
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li r11,-112
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stvx v25,r11,r12
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li r11,-96
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stvx v26,r11,r12
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li r11,-80
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stvx v27,r11,r12
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li r11,-64
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stvx v28,r11,r12
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li r11,-48
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stvx v29,r11,r12
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li r11,-32
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stvx v30,r11,r12
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mfspr r0,VRsave
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li r11,-16
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stvx v31,r11,r12
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stw r0,0(r12) /* VRsave lives at -224(R1). */
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ori r0,r0,0xfff /* We just saved these. */
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mtspr VRsave,r0
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blr
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/* rest_world is jumped to, not called, so no need to worry about LR.
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clobbers R0, R7, R11 and R12. This just undoes the work done above. */
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.private_extern rest_world
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rest_world:
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lwz r11, 0(r1) /* Pickup previous SP */
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li r7, 0 /* Stack offset is zero, r10 is ignored. */
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b Lrest_world_eh_r7
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/* eh_rest_world_r10 is jumped to, not called, so no need to worry about LR.
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R10 is the C++ EH stack adjust parameter, we return to the caller`s caller.
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clobbers: R0, R7, R11 and R12
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uses : R10
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RETURNS : C++ EH Data registers (R3 - R6). */
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.private_extern eh_rest_world_r10
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eh_rest_world_r10:
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lwz r11, 0(r1) /* Pickup previous SP */
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mr r7,r10 /* Stack offset. */
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/* pickup the C++ EH data regs (R3 - R6.) */
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lwz r6,-420(r11)
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lwz r5,-424(r11)
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lwz r4,-428(r11)
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lwz r3,-432(r11)
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/* Fall through to Lrest_world_eh_r7. */
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/* When we are doing the exception-handling epilog, R7 contains the offset to
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add to the SP.
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clobbers: R0, R11 and R12
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uses : R7. */
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Lrest_world_eh_r7:
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/* See if we have Altivec. */
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bcl 20,31,Lr7$pb
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Lr7$pb: mflr r12
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addis r12,r12,ha16(L_has_vec$non_lazy_ptr-Lr7$pb)
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lwz r12,lo16(L_has_vec$non_lazy_ptr-Lr7$pb)(r12)
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lwz r12,0(r12) /* R12 := HAS_VEC */
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cmpwi r12,0
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lmw r13,-220(r11)
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beq L.rest_world_fp_eh
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/* We have Altivec, restore VRsave and V20..V31 */
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lwz r0,-224(r11)
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li r12,-416
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mtspr VRsave,r0
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lvx v20,r11,r12
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li r12,-400
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lvx v21,r11,r12
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li r12,-384
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lvx v22,r11,r12
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li r12,-368
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lvx v23,r11,r12
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li r12,-352
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lvx v24,r11,r12
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li r12,-336
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lvx v25,r11,r12
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li r12,-320
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lvx v26,r11,r12
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li r12,-304
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lvx v27,r11,r12
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li r12,-288
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lvx v28,r11,r12
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li r12,-272
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lvx v29,r11,r12
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li r12,-256
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lvx v30,r11,r12
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li r12,-240
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lvx v31,r11,r12
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L.rest_world_fp_eh:
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lwz r0,4(r11) /* recover saved CR */
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lfd f14,-144(r11)
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lfd f15,-136(r11)
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lfd f16,-128(r11)
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lfd f17,-120(r11)
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lfd f18,-112(r11)
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lfd f19,-104(r11)
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lfd f20,-96(r11)
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lfd f21,-88(r11)
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lfd f22,-80(r11)
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lfd f23,-72(r11)
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lfd f24,-64(r11)
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lfd f25,-56(r11)
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lfd f26,-48(r11)
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lfd f27,-40(r11)
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lfd f28,-32(r11)
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lfd f29,-24(r11)
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lfd f30,-16(r11)
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mtcr r0 /* restore the saved cr. */
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lwz r0, 8(r11) /* Pick up the 'real' return address. */
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lfd f31,-8(r11)
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mtctr r0 /* exception-handler ret. address */
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add r1,r11,r7 /* set SP to original value + R7 offset */
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bctr
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#endif
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/* we should never be called on ppc64 for this ... */
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/* Done. */
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