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James Greenhalgh cc4d934fa0 [AARCH64] Add zip{1, 2}, uzp{1, 2}, trn{1, 2} support
for vector permute.

gcc/

	* config/aarch64/aarch64-simd-builtins.def: Add new builtins.
	* config/aarch64/aarch64-simd.md (simd_type): Add uzp.
	(aarch64_<PERMUTE:perm_insn><PERMUTE:perm_hilo><mode>): New.
	* config/aarch64/aarch64.c (aarch64_evpc_trn): New.
	(aarch64_evpc_uzp): Likewise.
	(aarch64_evpc_zip): Likewise.
	(aarch64_expand_vec_perm_const_1): Check for trn, zip, uzp patterns.
	* config/aarch64/iterators.md (unspec): Add neccessary unspecs.
	(PERMUTE): New.
	(perm_insn): Likewise.
	(perm_hilo): Likewise.

From-SVN: r194219
2012-12-05 11:42:37 +00:00
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contrib validate_failures.py: also ignore .git 2012-12-05 08:34:17 +01:00
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gcc [AARCH64] Add zip{1, 2}, uzp{1, 2}, trn{1, 2} support 2012-12-05 11:42:37 +00:00
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libgcc re PR bootstrap/55571 (PR48076 fix broke bootstrap on armv5tel-linux-gnueabi) 2012-12-04 11:08:18 -08:00
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