137 lines
4.1 KiB
C
137 lines
4.1 KiB
C
/* FPU-related code for x86 and x86_64 processors.
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Copyright 2005, 2007, 2009, 2010 Free Software Foundation, Inc.
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Contributed by Francois-Xavier Coudert <coudert@clipper.ens.fr>
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This file is part of the GNU Fortran 95 runtime library (libgfortran).
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Libgfortran is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public
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License as published by the Free Software Foundation; either
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version 3 of the License, or (at your option) any later version.
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Libgfortran is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#ifndef __x86_64__
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#include "cpuid.h"
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#endif
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#if defined(__sun__) && defined(__svr4__)
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#include <signal.h>
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#include <ucontext.h>
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static volatile sig_atomic_t sigill_caught;
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static void
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sigill_hdlr (int sig __attribute((unused)),
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siginfo_t *sip __attribute__((unused)),
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ucontext_t *ucp)
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{
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sigill_caught = 1;
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/* Set PC to the instruction after the faulting one to skip over it,
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otherwise we enter an infinite loop. 4 is the size of the stmxcsr
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instruction. */
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ucp->uc_mcontext.gregs[EIP] += 4;
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setcontext (ucp);
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}
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#endif
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static int
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has_sse (void)
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{
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#ifndef __x86_64__
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unsigned int eax, ebx, ecx, edx;
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if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
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return 0;
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#if defined(__sun__) && defined(__svr4__)
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/* Solaris 2 before Solaris 9 4/04 cannot execute SSE instructions even
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if the CPU supports them. Programs receive SIGILL instead, so check
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for that at runtime. */
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if (edx & bit_SSE)
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{
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struct sigaction act, oact;
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act.sa_handler = sigill_hdlr;
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sigemptyset (&act.sa_mask);
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/* Need to set SA_SIGINFO so a ucontext_t * is passed to the handler. */
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act.sa_flags = SA_SIGINFO;
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sigaction (SIGILL, &act, &oact);
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/* We need a single SSE instruction here so the handler can safely skip
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over it. */
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__asm__ volatile ("movss %xmm2,%xmm1");
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sigaction (SIGILL, &oact, NULL);
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if (sigill_caught)
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return 0;
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}
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#endif /* __sun__ && __svr4__ */
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return edx & bit_SSE;
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#else
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return 1;
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#endif
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}
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/* i387 -- see linux <fpu_control.h> header file for details. */
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#define _FPU_MASK_IM 0x01
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#define _FPU_MASK_DM 0x02
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#define _FPU_MASK_ZM 0x04
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#define _FPU_MASK_OM 0x08
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#define _FPU_MASK_UM 0x10
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#define _FPU_MASK_PM 0x20
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void set_fpu (void)
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{
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unsigned short cw;
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asm volatile ("fnstcw %0" : "=m" (cw));
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cw |= (_FPU_MASK_IM | _FPU_MASK_DM | _FPU_MASK_ZM | _FPU_MASK_OM
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| _FPU_MASK_UM | _FPU_MASK_PM);
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if (options.fpe & GFC_FPE_INVALID) cw &= ~_FPU_MASK_IM;
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if (options.fpe & GFC_FPE_DENORMAL) cw &= ~_FPU_MASK_DM;
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if (options.fpe & GFC_FPE_ZERO) cw &= ~_FPU_MASK_ZM;
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if (options.fpe & GFC_FPE_OVERFLOW) cw &= ~_FPU_MASK_OM;
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if (options.fpe & GFC_FPE_UNDERFLOW) cw &= ~_FPU_MASK_UM;
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if (options.fpe & GFC_FPE_INEXACT) cw &= ~_FPU_MASK_PM;
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asm volatile ("fldcw %0" : : "m" (cw));
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if (has_sse())
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{
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unsigned int cw_sse;
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asm volatile ("stmxcsr %0" : "=m" (cw_sse));
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cw_sse &= 0xffff0000;
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cw_sse |= (_FPU_MASK_IM | _FPU_MASK_DM | _FPU_MASK_ZM | _FPU_MASK_OM
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| _FPU_MASK_UM | _FPU_MASK_PM ) << 7;
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if (options.fpe & GFC_FPE_INVALID) cw_sse &= ~(_FPU_MASK_IM << 7);
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if (options.fpe & GFC_FPE_DENORMAL) cw_sse &= ~(_FPU_MASK_DM << 7);
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if (options.fpe & GFC_FPE_ZERO) cw_sse &= ~(_FPU_MASK_ZM << 7);
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if (options.fpe & GFC_FPE_OVERFLOW) cw_sse &= ~(_FPU_MASK_OM << 7);
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if (options.fpe & GFC_FPE_UNDERFLOW) cw_sse &= ~(_FPU_MASK_UM << 7);
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if (options.fpe & GFC_FPE_INEXACT) cw_sse &= ~(_FPU_MASK_PM << 7);
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asm volatile ("ldmxcsr %0" : : "m" (cw_sse));
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}
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}
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