gcc/libgcc/config/nds32/isr-library
Chung-Ju Wu a493174524 [NDS32] Implement more C ISR extension.
gcc/
	* config.gcc (nds32*): Add nds32_isr.h and nds32_init.inc in
	extra_headers.
	* common/config/nds32/nds32-common.c (nds32_handle_option): Handle
	OPT_misr_secure_ case.
	* config/nds32/nds32-isr.c: Implementation of backward compatibility.
	* config/nds32/nds32-protos.h (nds32_isr_function_critical_p): New.
	* config/nds32/nds32.c (nds32_attribute_table): Add critical and
	secure attribute.
	* config/nds32/nds32.h (nds32_isr_nested_type): Add NDS32_CRITICAL.
	(nds32_isr_info): New field security_level.
	(TARGET_ISR_VECTOR_SIZE_4_BYTE): New macro.
	* config/nds32/nds32.md (return_internal): Consider critical attribute.
	* config/nds32/nds32.opt (misr-secure): New option.
	* config/nds32/nds32_init.inc: New file.
	* config/nds32/nds32_isr.h: New file.

libgcc/
	* config/nds32/t-nds32-isr: Rearrange object dependency.
	* config/nds32/initfini.c: Add dwarf2 unwinding support.
	* config/nds32/isr-library/adj_intr_lvl.inc: Consider new extensions
	and registers usage.
	* config/nds32/isr-library/excp_isr.S: Ditto.
	* config/nds32/isr-library/intr_isr.S: Ditto.
	* config/nds32/isr-library/reset.S: Ditto.
	* config/nds32/isr-library/restore_all.inc: Ditto.
	* config/nds32/isr-library/restore_mac_regs.inc: Ditto.
	* config/nds32/isr-library/restore_partial.inc: Ditto.
	* config/nds32/isr-library/restore_usr_regs.inc: Ditto.
	* config/nds32/isr-library/save_all.inc: Ditto.
	* config/nds32/isr-library/save_mac_regs.inc: Ditto.
	* config/nds32/isr-library/save_partial.inc: Ditto.
	* config/nds32/isr-library/save_usr_regs.inc: Ditto.
	* config/nds32/isr-library/vec_vid*.S: Consider 4-byte vector size.

From-SVN: r263493
2018-08-12 07:38:40 +00:00
..
adj_intr_lvl.inc
excp_isr_4b.S
excp_isr.S
intr_isr_4b.S
intr_isr.S
jmptbl_vid00.S
jmptbl_vid01.S
jmptbl_vid02.S
jmptbl_vid03.S
jmptbl_vid04.S
jmptbl_vid05.S
jmptbl_vid06.S
jmptbl_vid07.S
jmptbl_vid08.S
jmptbl_vid09.S
jmptbl_vid10.S
jmptbl_vid11.S
jmptbl_vid12.S
jmptbl_vid13.S
jmptbl_vid14.S
jmptbl_vid15.S
jmptbl_vid16.S
jmptbl_vid17.S
jmptbl_vid18.S
jmptbl_vid19.S
jmptbl_vid20.S
jmptbl_vid21.S
jmptbl_vid22.S
jmptbl_vid23.S
jmptbl_vid24.S
jmptbl_vid25.S
jmptbl_vid26.S
jmptbl_vid27.S
jmptbl_vid28.S
jmptbl_vid29.S
jmptbl_vid30.S
jmptbl_vid31.S
jmptbl_vid32.S
jmptbl_vid33.S
jmptbl_vid34.S
jmptbl_vid35.S
jmptbl_vid36.S
jmptbl_vid37.S
jmptbl_vid38.S
jmptbl_vid39.S
jmptbl_vid40.S
jmptbl_vid41.S
jmptbl_vid42.S
jmptbl_vid43.S
jmptbl_vid44.S
jmptbl_vid45.S
jmptbl_vid46.S
jmptbl_vid47.S
jmptbl_vid48.S
jmptbl_vid49.S
jmptbl_vid50.S
jmptbl_vid51.S
jmptbl_vid52.S
jmptbl_vid53.S
jmptbl_vid54.S
jmptbl_vid55.S
jmptbl_vid56.S
jmptbl_vid57.S
jmptbl_vid58.S
jmptbl_vid59.S
jmptbl_vid60.S
jmptbl_vid61.S
jmptbl_vid62.S
jmptbl_vid63.S
jmptbl_vid64.S
jmptbl_vid65.S
jmptbl_vid66.S
jmptbl_vid67.S
jmptbl_vid68.S
jmptbl_vid69.S
jmptbl_vid70.S
jmptbl_vid71.S
jmptbl_vid72.S
nmih.S
reset_4b.S
reset.S
restore_all.inc
restore_fpu_regs_00.inc
restore_fpu_regs_01.inc
restore_fpu_regs_02.inc
restore_fpu_regs_03.inc
restore_fpu_regs.inc
restore_mac_regs.inc
restore_partial.inc
restore_usr_regs.inc
save_all.inc
save_fpu_regs_00.inc
save_fpu_regs_01.inc
save_fpu_regs_02.inc
save_fpu_regs_03.inc
save_fpu_regs.inc
save_mac_regs.inc
save_partial.inc
save_usr_regs.inc
vec_vid00_4b.S
vec_vid00.S
vec_vid01_4b.S
vec_vid01.S
vec_vid02_4b.S
vec_vid02.S
vec_vid03_4b.S
vec_vid03.S
vec_vid04_4b.S
vec_vid04.S
vec_vid05_4b.S
vec_vid05.S
vec_vid06_4b.S
vec_vid06.S
vec_vid07_4b.S
vec_vid07.S
vec_vid08_4b.S
vec_vid08.S
vec_vid09_4b.S
vec_vid09.S
vec_vid10_4b.S
vec_vid10.S
vec_vid11_4b.S
vec_vid11.S
vec_vid12_4b.S
vec_vid12.S
vec_vid13_4b.S
vec_vid13.S
vec_vid14_4b.S
vec_vid14.S
vec_vid15_4b.S
vec_vid15.S
vec_vid16_4b.S
vec_vid16.S
vec_vid17_4b.S
vec_vid17.S
vec_vid18_4b.S
vec_vid18.S
vec_vid19_4b.S
vec_vid19.S
vec_vid20_4b.S
vec_vid20.S
vec_vid21_4b.S
vec_vid21.S
vec_vid22_4b.S
vec_vid22.S
vec_vid23_4b.S
vec_vid23.S
vec_vid24_4b.S
vec_vid24.S
vec_vid25_4b.S
vec_vid25.S
vec_vid26_4b.S
vec_vid26.S
vec_vid27_4b.S
vec_vid27.S
vec_vid28_4b.S
vec_vid28.S
vec_vid29_4b.S
vec_vid29.S
vec_vid30_4b.S
vec_vid30.S
vec_vid31_4b.S
vec_vid31.S
vec_vid32_4b.S
vec_vid32.S
vec_vid33_4b.S
vec_vid33.S
vec_vid34_4b.S
vec_vid34.S
vec_vid35_4b.S
vec_vid35.S
vec_vid36_4b.S
vec_vid36.S
vec_vid37_4b.S
vec_vid37.S
vec_vid38_4b.S
vec_vid38.S
vec_vid39_4b.S
vec_vid39.S
vec_vid40_4b.S
vec_vid40.S
vec_vid41_4b.S
vec_vid41.S
vec_vid42_4b.S
vec_vid42.S
vec_vid43_4b.S
vec_vid43.S
vec_vid44_4b.S
vec_vid44.S
vec_vid45_4b.S
vec_vid45.S
vec_vid46_4b.S
vec_vid46.S
vec_vid47_4b.S
vec_vid47.S
vec_vid48_4b.S
vec_vid48.S
vec_vid49_4b.S
vec_vid49.S
vec_vid50_4b.S
vec_vid50.S
vec_vid51_4b.S
vec_vid51.S
vec_vid52_4b.S
vec_vid52.S
vec_vid53_4b.S
vec_vid53.S
vec_vid54_4b.S
vec_vid54.S
vec_vid55_4b.S
vec_vid55.S
vec_vid56_4b.S
vec_vid56.S
vec_vid57_4b.S
vec_vid57.S
vec_vid58_4b.S
vec_vid58.S
vec_vid59_4b.S
vec_vid59.S
vec_vid60_4b.S
vec_vid60.S
vec_vid61_4b.S
vec_vid61.S
vec_vid62_4b.S
vec_vid62.S
vec_vid63_4b.S
vec_vid63.S
vec_vid64_4b.S
vec_vid64.S
vec_vid65_4b.S
vec_vid65.S
vec_vid66_4b.S
vec_vid66.S
vec_vid67_4b.S
vec_vid67.S
vec_vid68_4b.S
vec_vid68.S
vec_vid69_4b.S
vec_vid69.S
vec_vid70_4b.S
vec_vid70.S
vec_vid71_4b.S
vec_vid71.S
vec_vid72_4b.S
vec_vid72.S
wrh.S