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Jakub Jelinek dad5ed2eb1 sse.md (avx512f_load<mode>_mask): Emit vmovup{s,d} or vmovdqu* for misaligned_operand.
* config/i386/sse.md (avx512f_load<mode>_mask): Emit vmovup{s,d}
	or vmovdqu* for misaligned_operand.
	(<sse>_loadu<ssemodesuffix><avxsizesuffix><mask_name>,
	<sse2_avx_avx512f>_loaddqu<mode><mask_name>): Handle <mask_applied>.
	* config/i386/i386.c (ix86_expand_special_args_builtin): Set
	aligned_mem for AVX512F masked aligned load and store builtins and for
	non-temporal moves.

	* gcc.target/i386/avx512f-vmovdqu32-1.c: Allow vmovdqu64 instead of
	vmovdqu32.

From-SVN: r206332
2014-01-04 10:57:36 +01:00
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gcc sse.md (avx512f_load<mode>_mask): Emit vmovup{s,d} or vmovdqu* for misaligned_operand. 2014-01-04 10:57:36 +01:00
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