439 lines
9.4 KiB
ArmAsm
439 lines
9.4 KiB
ArmAsm
/* Copyright (C) 2010-2019 Free Software Foundation, Inc.
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Contributed by Bernd Schmidt <bernds@codesourcery.com>.
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This file is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 3, or (at your option) any
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later version.
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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;; ABI considerations for the divide functions
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;; The following registers are call-used:
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;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
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;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
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;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
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;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
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;;
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;; In our implementation, divu and remu are leaf functions,
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;; while both divi and remi call into divu.
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;; A0 is not clobbered by any of the functions.
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;; divu does not clobber B2 either, which is taken advantage of
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;; in remi.
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;; divi uses B5 to hold the original return address during
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;; the call to divu.
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;; remi uses B2 and A5 to hold the input values during the
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;; call to divu. It stores B3 in on the stack.
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#ifdef L_divsi3
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.text
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.align 2
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.global __c6xabi_divi
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.hidden __c6xabi_divi
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.type __c6xabi_divi, STT_FUNC
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__c6xabi_divi:
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call .s2 __c6xabi_divu
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|| mv .d2 B3, B5
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|| cmpgt .l1 0, A4, A1
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|| cmpgt .l2 0, B4, B1
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[A1] neg .l1 A4, A4
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|| [B1] neg .l2 B4, B4
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|| xor .s1x A1, B1, A1
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#ifdef _TMS320C6400
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[A1] addkpc .s2 1f, B3, 4
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#else
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[A1] mvkl .s2 1f, B3
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[A1] mvkh .s2 1f, B3
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nop 2
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#endif
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1:
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neg .l1 A4, A4
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|| mv .l2 B3,B5
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|| ret .s2 B5
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nop 5
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#endif
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#if defined L_modsi3 || defined L_divmodsi4
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.align 2
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#ifdef L_modsi3
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#define MOD_OUTPUT_REG A4
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.global __c6xabi_remi
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.hidden __c6xabi_remi
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.type __c6xabi_remi, STT_FUNC
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#else
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#define MOD_OUTPUT_REG A5
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.global __c6xabi_divremi
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.hidden __c6xabi_divremi
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.type __c6xabi_divremi, STT_FUNC
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__c6xabi_divremi:
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#endif
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__c6xabi_remi:
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stw .d2t2 B3, *B15--[2]
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|| cmpgt .l1 0, A4, A1
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|| cmpgt .l2 0, B4, B2
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|| mv .s1 A4, A5
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|| call .s2 __c6xabi_divu
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[A1] neg .l1 A4, A4
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|| [B2] neg .l2 B4, B4
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|| xor .s2x B2, A1, B0
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|| mv .d2 B4, B2
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#ifdef _TMS320C6400
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[B0] addkpc .s2 1f, B3, 1
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[!B0] addkpc .s2 2f, B3, 1
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nop 2
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#else
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[B0] mvkl .s2 1f,B3
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[!B0] mvkl .s2 2f,B3
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[B0] mvkh .s2 1f,B3
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[!B0] mvkh .s2 2f,B3
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#endif
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1:
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neg .l1 A4, A4
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2:
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ldw .d2t2 *++B15[2], B3
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#ifdef _TMS320C6400_PLUS
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mpy32 .m1x A4, B2, A6
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nop 3
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ret .s2 B3
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sub .l1 A5, A6, MOD_OUTPUT_REG
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nop 4
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#else
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mpyu .m1x A4, B2, A1
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nop 1
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mpylhu .m1x A4, B2, A6
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|| mpylhu .m2x B2, A4, B2
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nop 1
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add .l1x A6, B2, A6
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|| ret .s2 B3
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shl .s1 A6, 16, A6
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add .d1 A6, A1, A6
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sub .l1 A5, A6, MOD_OUTPUT_REG
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nop 2
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#endif
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#endif
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#if defined L_udivsi3 || defined L_udivmodsi4
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.align 2
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#ifdef L_udivsi3
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.global __c6xabi_divu
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.hidden __c6xabi_divu
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.type __c6xabi_divu, STT_FUNC
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__c6xabi_divu:
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#else
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.global __c6xabi_divremu
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.hidden __c6xabi_divremu
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.type __c6xabi_divremu, STT_FUNC
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__c6xabi_divremu:
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#endif
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;; We use a series of up to 31 subc instructions. First, we find
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;; out how many leading zero bits there are in the divisor. This
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;; gives us both a shift count for aligning (shifting) the divisor
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;; to the, and the number of times we have to execute subc.
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;; At the end, we have both the remainder and most of the quotient
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;; in A4. The top bit of the quotient is computed first and is
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;; placed in A2.
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;; Return immediately if the dividend is zero. Setting B4 to 1
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;; is a trick to allow us to leave the following insns in the jump
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;; delay slot without affecting the result.
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mv .s2x A4, B1
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#ifndef _TMS320C6400
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[!b1] mvk .s2 1, B4
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#endif
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[b1] lmbd .l2 1, B4, B1
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||[!b1] b .s2 B3 ; RETURN A
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#ifdef _TMS320C6400
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||[!b1] mvk .d2 1, B4
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#endif
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#ifdef L_udivmodsi4
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||[!b1] zero .s1 A5
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#endif
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mv .l1x B1, A6
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|| shl .s2 B4, B1, B4
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;; The loop performs a maximum of 28 steps, so we do the
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;; first 3 here.
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cmpltu .l1x A4, B4, A2
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[!A2] sub .l1x A4, B4, A4
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|| shru .s2 B4, 1, B4
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|| xor .s1 1, A2, A2
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shl .s1 A2, 31, A2
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|| [b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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;; RETURN A may happen here (note: must happen before the next branch)
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0:
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cmpgt .l2 B1, 7, B0
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|| [b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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|| [b0] b .s1 0b
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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;; loop backwards branch happens here
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ret .s2 B3
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|| mvk .s1 32, A1
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sub .l1 A1, A6, A6
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#ifdef L_udivmodsi4
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|| extu .s1 A4, A6, A5
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#endif
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shl .s1 A4, A6, A4
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shru .s1 A4, 1, A4
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|| sub .l1 A6, 1, A6
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or .l1 A2, A4, A4
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shru .s1 A4, A6, A4
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nop
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#endif
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#ifdef L_umodsi3
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.align 2
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.global __c6xabi_remu
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.hidden __c6xabi_remu
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.type __c6xabi_remu, STT_FUNC
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__c6xabi_remu:
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;; The ABI seems designed to prevent these functions calling each other,
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;; so we duplicate most of the divsi3 code here.
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mv .s2x A4, B1
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#ifndef _TMS320C6400
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[!b1] mvk .s2 1, B4
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#endif
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lmbd .l2 1, B4, B1
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||[!b1] b .s2 B3 ; RETURN A
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#ifdef _TMS320C6400
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||[!b1] mvk .d2 1, B4
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#endif
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mv .l1x B1, A7
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|| shl .s2 B4, B1, B4
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cmpltu .l1x A4, B4, A1
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[!a1] sub .l1x A4, B4, A4
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shru .s2 B4, 1, B4
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0:
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cmpgt .l2 B1, 7, B0
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|| [b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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;; RETURN A may happen here (note: must happen before the next branch)
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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|| [b0] b .s1 0b
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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;; loop backwards branch happens here
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ret .s2 B3
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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[b1] subc .l1x A4,B4,A4
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extu .s1 A4, A7, A4
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nop 2
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#endif
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#if defined L_strasgi_64plus && defined _TMS320C6400_PLUS
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.align 2
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.global __c6xabi_strasgi_64plus
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.hidden __c6xabi_strasgi_64plus
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.type __c6xabi_strasgi_64plus, STT_FUNC
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__c6xabi_strasgi_64plus:
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shru .s2x a6, 2, b31
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|| mv .s1 a4, a30
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|| mv .d2 b4, b30
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add .s2 -4, b31, b31
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sploopd 1
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|| mvc .s2 b31, ilc
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ldw .d2t2 *b30++, b31
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nop 4
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mv .s1x b31,a31
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spkernel 6, 0
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|| stw .d1t1 a31, *a30++
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ret .s2 b3
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nop 5
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#endif
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#ifdef L_strasgi
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.global __c6xabi_strasgi
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.type __c6xabi_strasgi, STT_FUNC
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__c6xabi_strasgi:
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;; This is essentially memcpy, with alignment known to be at least
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;; 4, and the size a multiple of 4 greater than or equal to 28.
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ldw .d2t1 *B4++, A0
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|| mvk .s2 16, B1
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ldw .d2t1 *B4++, A1
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|| mvk .s2 20, B2
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|| sub .d1 A6, 24, A6
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ldw .d2t1 *B4++, A5
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ldw .d2t1 *B4++, A7
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|| mv .l2x A6, B7
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ldw .d2t1 *B4++, A8
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ldw .d2t1 *B4++, A9
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|| mv .s2x A0, B5
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|| cmpltu .l2 B2, B7, B0
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0:
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stw .d1t2 B5, *A4++
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||[b0] ldw .d2t1 *B4++, A0
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|| mv .s2x A1, B5
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|| mv .l2 B7, B6
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[b0] sub .d2 B6, 24, B7
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||[b0] b .s2 0b
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|| cmpltu .l2 B1, B6, B0
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[b0] ldw .d2t1 *B4++, A1
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|| stw .d1t2 B5, *A4++
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|| mv .s2x A5, B5
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|| cmpltu .l2 12, B6, B0
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[b0] ldw .d2t1 *B4++, A5
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|| stw .d1t2 B5, *A4++
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|| mv .s2x A7, B5
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|| cmpltu .l2 8, B6, B0
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[b0] ldw .d2t1 *B4++, A7
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|| stw .d1t2 B5, *A4++
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|| mv .s2x A8, B5
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|| cmpltu .l2 4, B6, B0
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[b0] ldw .d2t1 *B4++, A8
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|| stw .d1t2 B5, *A4++
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|| mv .s2x A9, B5
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|| cmpltu .l2 0, B6, B0
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[b0] ldw .d2t1 *B4++, A9
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|| stw .d1t2 B5, *A4++
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|| mv .s2x A0, B5
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|| cmpltu .l2 B2, B7, B0
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;; loop back branch happens here
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cmpltu .l2 B1, B6, B0
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|| ret .s2 b3
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[b0] stw .d1t1 A1, *A4++
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|| cmpltu .l2 12, B6, B0
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[b0] stw .d1t1 A5, *A4++
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|| cmpltu .l2 8, B6, B0
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[b0] stw .d1t1 A7, *A4++
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|| cmpltu .l2 4, B6, B0
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[b0] stw .d1t1 A8, *A4++
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|| cmpltu .l2 0, B6, B0
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[b0] stw .d1t1 A9, *A4++
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;; return happens here
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#endif
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#ifdef _TMS320C6400_PLUS
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#ifdef L_push_rts
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.align 2
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.global __c6xabi_push_rts
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.hidden __c6xabi_push_rts
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.type __c6xabi_push_rts, STT_FUNC
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__c6xabi_push_rts:
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stw .d2t2 B14, *B15--[2]
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stdw .d2t1 A15:A14, *B15--
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|| b .s2x A3
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stdw .d2t2 B13:B12, *B15--
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stdw .d2t1 A13:A12, *B15--
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stdw .d2t2 B11:B10, *B15--
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stdw .d2t1 A11:A10, *B15--
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stdw .d2t2 B3:B2, *B15--
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#endif
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#ifdef L_pop_rts
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.align 2
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.global __c6xabi_pop_rts
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.hidden __c6xabi_pop_rts
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.type __c6xabi_pop_rts, STT_FUNC
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__c6xabi_pop_rts:
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lddw .d2t2 *++B15, B3:B2
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lddw .d2t1 *++B15, A11:A10
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lddw .d2t2 *++B15, B11:B10
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lddw .d2t1 *++B15, A13:A12
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lddw .d2t2 *++B15, B13:B12
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lddw .d2t1 *++B15, A15:A14
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|| b .s2 B3
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ldw .d2t2 *++B15[2], B14
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nop 4
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#endif
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#ifdef L_call_stub
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.align 2
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.global __c6xabi_call_stub
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.type __c6xabi_call_stub, STT_FUNC
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__c6xabi_call_stub:
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stw .d2t1 A2, *B15--[2]
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stdw .d2t1 A7:A6, *B15--
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|| call .s2 B31
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stdw .d2t1 A1:A0, *B15--
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stdw .d2t2 B7:B6, *B15--
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stdw .d2t2 B5:B4, *B15--
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stdw .d2t2 B1:B0, *B15--
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stdw .d2t2 B3:B2, *B15--
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|| addkpc .s2 1f, B3, 0
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1:
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lddw .d2t2 *++B15, B3:B2
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lddw .d2t2 *++B15, B1:B0
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lddw .d2t2 *++B15, B5:B4
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lddw .d2t2 *++B15, B7:B6
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lddw .d2t1 *++B15, A1:A0
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lddw .d2t1 *++B15, A7:A6
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|| b .s2 B3
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ldw .d2t1 *++B15[2], A2
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nop 4
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#endif
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#endif
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