4ed3092ff8
Many targets do not have both rotate and rotatert. Of the 47 targets in the tree, 17 have both, 9 have only rotate, 2 have only rotatert, and 19 have neither (this is based on "grep -wil" so it can be slightly off). rs6000 has only rotate, and mips has only rotatert. For such targets simplifying rotate to rotatert and vice versa is not simplifying things at all. rs6000 has already way too many rotate patterns (some days it seems like two thousand, but it is somewhat less in reality still); I would prefer not to double that again. So, this patch makes genrecog define HAVE_rotate and HAVE_rotatert if those RTL codes are mentioned anywhere in the machine description, and then does the transformation in simplify-rtx.c only if both these flags are set. From-SVN: r212239
383 lines
9.6 KiB
C
383 lines
9.6 KiB
C
/* Generate from machine description:
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- some #define configuration flags.
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Copyright (C) 1987-2014 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#include "bconfig.h"
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#include "system.h"
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#include "coretypes.h"
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#include "tm.h"
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#include "rtl.h"
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#include "errors.h"
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#include "gensupport.h"
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/* flags to determine output of machine description dependent #define's. */
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static int max_recog_operands; /* Largest operand number seen. */
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static int max_dup_operands; /* Largest number of match_dup in any insn. */
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static int max_clobbers_per_insn;
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static int have_cc0_flag;
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static int have_cmove_flag;
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static int have_cond_exec_flag;
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static int have_lo_sum_flag;
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static int have_rotate_flag;
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static int have_rotatert_flag;
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static int have_peephole_flag;
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static int have_peephole2_flag;
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/* Maximum number of insns seen in a split. */
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static int max_insns_per_split = 1;
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/* Maximum number of input insns for peephole2. */
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static int max_insns_per_peep2;
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static int clobbers_seen_this_insn;
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static int dup_operands_seen_this_insn;
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static void walk_insn_part (rtx, int, int);
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static void gen_insn (rtx);
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static void gen_expand (rtx);
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static void gen_split (rtx);
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static void gen_peephole (rtx);
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static void gen_peephole2 (rtx);
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/* RECOG_P will be nonzero if this pattern was seen in a context where it will
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be used to recognize, rather than just generate an insn.
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NON_PC_SET_SRC will be nonzero if this pattern was seen in a SET_SRC
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of a SET whose destination is not (pc). */
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static void
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walk_insn_part (rtx part, int recog_p, int non_pc_set_src)
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{
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int i, j;
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RTX_CODE code;
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const char *format_ptr;
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if (part == 0)
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return;
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code = GET_CODE (part);
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switch (code)
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{
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case CLOBBER:
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clobbers_seen_this_insn++;
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break;
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case MATCH_OPERAND:
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if (XINT (part, 0) > max_recog_operands)
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max_recog_operands = XINT (part, 0);
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return;
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case MATCH_OP_DUP:
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case MATCH_PAR_DUP:
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++dup_operands_seen_this_insn;
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case MATCH_SCRATCH:
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case MATCH_PARALLEL:
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case MATCH_OPERATOR:
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if (XINT (part, 0) > max_recog_operands)
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max_recog_operands = XINT (part, 0);
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/* Now scan the rtl's in the vector inside the MATCH_OPERATOR or
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MATCH_PARALLEL. */
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break;
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case LABEL_REF:
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if (GET_CODE (XEXP (part, 0)) == MATCH_OPERAND
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|| GET_CODE (XEXP (part, 0)) == MATCH_DUP)
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break;
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return;
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case MATCH_DUP:
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++dup_operands_seen_this_insn;
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if (XINT (part, 0) > max_recog_operands)
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max_recog_operands = XINT (part, 0);
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return;
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case CC0:
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if (recog_p)
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have_cc0_flag = 1;
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return;
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case LO_SUM:
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if (recog_p)
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have_lo_sum_flag = 1;
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return;
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case ROTATE:
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if (recog_p)
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have_rotate_flag = 1;
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return;
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case ROTATERT:
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if (recog_p)
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have_rotatert_flag = 1;
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return;
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case SET:
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walk_insn_part (SET_DEST (part), 0, recog_p);
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walk_insn_part (SET_SRC (part), recog_p,
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GET_CODE (SET_DEST (part)) != PC);
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return;
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case IF_THEN_ELSE:
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/* Only consider this machine as having a conditional move if the
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two arms of the IF_THEN_ELSE are both MATCH_OPERAND. Otherwise,
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we have some specific IF_THEN_ELSE construct (like the doz
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instruction on the RS/6000) that can't be used in the general
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context we want it for. */
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if (recog_p && non_pc_set_src
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&& GET_CODE (XEXP (part, 1)) == MATCH_OPERAND
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&& GET_CODE (XEXP (part, 2)) == MATCH_OPERAND)
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have_cmove_flag = 1;
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break;
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case COND_EXEC:
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if (recog_p)
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have_cond_exec_flag = 1;
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break;
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case REG: case CONST_INT: case SYMBOL_REF:
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case PC:
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return;
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default:
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break;
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}
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format_ptr = GET_RTX_FORMAT (GET_CODE (part));
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for (i = 0; i < GET_RTX_LENGTH (GET_CODE (part)); i++)
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switch (*format_ptr++)
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{
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case 'e':
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case 'u':
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walk_insn_part (XEXP (part, i), recog_p, non_pc_set_src);
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break;
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case 'E':
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if (XVEC (part, i) != NULL)
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for (j = 0; j < XVECLEN (part, i); j++)
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walk_insn_part (XVECEXP (part, i, j), recog_p, non_pc_set_src);
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break;
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}
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}
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static void
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gen_insn (rtx insn)
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{
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int i;
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/* Walk the insn pattern to gather the #define's status. */
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clobbers_seen_this_insn = 0;
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dup_operands_seen_this_insn = 0;
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if (XVEC (insn, 1) != 0)
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for (i = 0; i < XVECLEN (insn, 1); i++)
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walk_insn_part (XVECEXP (insn, 1, i), 1, 0);
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if (clobbers_seen_this_insn > max_clobbers_per_insn)
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max_clobbers_per_insn = clobbers_seen_this_insn;
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if (dup_operands_seen_this_insn > max_dup_operands)
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max_dup_operands = dup_operands_seen_this_insn;
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}
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/* Similar but scan a define_expand. */
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static void
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gen_expand (rtx insn)
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{
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int i;
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/* Walk the insn pattern to gather the #define's status. */
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/* Note that we don't bother recording the number of MATCH_DUPs
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that occur in a gen_expand, because only reload cares about that. */
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if (XVEC (insn, 1) != 0)
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for (i = 0; i < XVECLEN (insn, 1); i++)
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{
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/* Compute the maximum SETs and CLOBBERS
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in any one of the sub-insns;
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don't sum across all of them. */
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clobbers_seen_this_insn = 0;
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walk_insn_part (XVECEXP (insn, 1, i), 0, 0);
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if (clobbers_seen_this_insn > max_clobbers_per_insn)
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max_clobbers_per_insn = clobbers_seen_this_insn;
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}
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}
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/* Similar but scan a define_split. */
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static void
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gen_split (rtx split)
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{
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int i;
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/* Look through the patterns that are matched
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to compute the maximum operand number. */
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for (i = 0; i < XVECLEN (split, 0); i++)
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walk_insn_part (XVECEXP (split, 0, i), 1, 0);
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/* Look at the number of insns this insn could split into. */
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if (XVECLEN (split, 2) > max_insns_per_split)
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max_insns_per_split = XVECLEN (split, 2);
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}
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static void
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gen_peephole (rtx peep)
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{
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int i;
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/* Look through the patterns that are matched
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to compute the maximum operand number. */
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for (i = 0; i < XVECLEN (peep, 0); i++)
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walk_insn_part (XVECEXP (peep, 0, i), 1, 0);
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}
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static void
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gen_peephole2 (rtx peep)
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{
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int i, n;
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/* Look through the patterns that are matched
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to compute the maximum operand number. */
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for (i = XVECLEN (peep, 0) - 1; i >= 0; --i)
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walk_insn_part (XVECEXP (peep, 0, i), 1, 0);
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/* Look at the number of insns this insn can be matched from. */
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for (i = XVECLEN (peep, 0) - 1, n = 0; i >= 0; --i)
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if (GET_CODE (XVECEXP (peep, 0, i)) != MATCH_DUP
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&& GET_CODE (XVECEXP (peep, 0, i)) != MATCH_SCRATCH)
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n++;
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if (n > max_insns_per_peep2)
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max_insns_per_peep2 = n;
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}
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int
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main (int argc, char **argv)
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{
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rtx desc;
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progname = "genconfig";
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if (!init_rtx_reader_args (argc, argv))
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return (FATAL_EXIT_CODE);
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puts ("/* Generated automatically by the program `genconfig'");
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puts (" from the machine description file `md'. */\n");
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puts ("#ifndef GCC_INSN_CONFIG_H");
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puts ("#define GCC_INSN_CONFIG_H\n");
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/* Allow at least 30 operands for the sake of asm constructs. */
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/* ??? We *really* ought to reorganize things such that there
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is no fixed upper bound. */
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max_recog_operands = 29; /* We will add 1 later. */
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max_dup_operands = 1;
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/* Read the machine description. */
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while (1)
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{
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int line_no, insn_code_number = 0;
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desc = read_md_rtx (&line_no, &insn_code_number);
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if (desc == NULL)
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break;
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switch (GET_CODE (desc))
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{
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case DEFINE_INSN:
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gen_insn (desc);
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break;
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case DEFINE_EXPAND:
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gen_expand (desc);
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break;
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case DEFINE_SPLIT:
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gen_split (desc);
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break;
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case DEFINE_PEEPHOLE2:
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have_peephole2_flag = 1;
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gen_peephole2 (desc);
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break;
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case DEFINE_PEEPHOLE:
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have_peephole_flag = 1;
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gen_peephole (desc);
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break;
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default:
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break;
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}
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}
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printf ("#define MAX_RECOG_OPERANDS %d\n", max_recog_operands + 1);
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printf ("#define MAX_DUP_OPERANDS %d\n", max_dup_operands);
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/* This is conditionally defined, in case the user writes code which emits
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more splits than we can readily see (and knows s/he does it). */
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printf ("#ifndef MAX_INSNS_PER_SPLIT\n");
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printf ("#define MAX_INSNS_PER_SPLIT %d\n", max_insns_per_split);
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printf ("#endif\n");
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if (have_cc0_flag)
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{
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printf ("#define HAVE_cc0 1\n");
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printf ("#define CC0_P(X) ((X) == cc0_rtx)\n");
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}
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else
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{
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/* We output CC0_P this way to make sure that X is declared
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somewhere. */
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printf ("#define CC0_P(X) ((X) ? 0 : 0)\n");
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}
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if (have_cmove_flag)
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printf ("#define HAVE_conditional_move 1\n");
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if (have_cond_exec_flag)
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printf ("#define HAVE_conditional_execution 1\n");
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if (have_lo_sum_flag)
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printf ("#define HAVE_lo_sum 1\n");
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if (have_rotate_flag)
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printf ("#define HAVE_rotate 1\n");
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if (have_rotatert_flag)
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printf ("#define HAVE_rotatert 1\n");
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if (have_peephole_flag)
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printf ("#define HAVE_peephole 1\n");
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if (have_peephole2_flag)
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{
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printf ("#define HAVE_peephole2 1\n");
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printf ("#define MAX_INSNS_PER_PEEP2 %d\n", max_insns_per_peep2);
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}
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puts ("\n#endif /* GCC_INSN_CONFIG_H */");
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if (ferror (stdout) || fflush (stdout) || fclose (stdout))
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return FATAL_EXIT_CODE;
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return SUCCESS_EXIT_CODE;
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}
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