eb7062cf84
* configure.ac (aarch64-*-*): Don't disable java. * configure: Regenerate. libjava/: * configure.host: Add support for aarch64. * sysdep/aarch64/locks.h: New file. libjava/classpath/: * native/fdlibm/ieeefp.h: Add support for aarch64. From-SVN: r197997
58 lines
1.6 KiB
C
58 lines
1.6 KiB
C
// locks.h - Thread synchronization primitives. AArch64 implementation.
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#ifndef __SYSDEP_LOCKS_H__
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#define __SYSDEP_LOCKS_H__
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typedef size_t obj_addr_t; /* Integer type big enough for object */
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/* address. */
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// Atomically replace *addr by new_val if it was initially equal to old.
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// Return true if the comparison succeeded.
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// Assumed to have acquire semantics, i.e. later memory operations
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// cannot execute before the compare_and_swap finishes.
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inline static bool
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compare_and_swap(volatile obj_addr_t *addr,
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obj_addr_t old,
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obj_addr_t new_val)
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{
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return __sync_bool_compare_and_swap(addr, old, new_val);
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}
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// Set *addr to new_val with release semantics, i.e. making sure
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// that prior loads and stores complete before this
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// assignment.
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inline static void
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release_set(volatile obj_addr_t *addr, obj_addr_t new_val)
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{
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__sync_synchronize();
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*addr = new_val;
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}
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// Compare_and_swap with release semantics instead of acquire semantics.
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// On many architecture, the operation makes both guarantees, so the
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// implementation can be the same.
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inline static bool
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compare_and_swap_release(volatile obj_addr_t *addr,
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obj_addr_t old,
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obj_addr_t new_val)
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{
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return __sync_bool_compare_and_swap(addr, old, new_val);
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}
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// Ensure that subsequent instructions do not execute on stale
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// data that was loaded from memory before the barrier.
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inline static void
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read_barrier()
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{
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__sync_synchronize();
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}
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// Ensure that prior stores to memory are completed with respect to other
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// processors.
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inline static void
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write_barrier()
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{
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__sync_synchronize();
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}
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#endif
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