42 lines
1.6 KiB
C
42 lines
1.6 KiB
C
/* Store register values as _Unwind_Word type in DWARF2 EH unwind context.
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Copyright (C) 2017-2020 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published
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by the Free Software Foundation; either version 3, or (at your
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option) any later version.
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GCC is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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/* Define this macro if the target stores register values as _Unwind_Word
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type in unwind context. Only enable it for ilp32. */
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#if defined __aarch64__ && !defined __LP64__
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# define REG_VALUE_IN_UNWIND_CONTEXT
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#endif
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/* Return the value of the pseudo VG register. This should only be
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called if we know this is an SVE host. */
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static inline int
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aarch64_vg (void)
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{
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register int vg asm ("x0");
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/* CNTD X0. */
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asm (".inst 0x04e0e3e0" : "=r" (vg));
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return vg;
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}
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/* Lazily provide a value for VG, so that we don't try to execute SVE
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instructions unless we know they're needed. */
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#define DWARF_LAZY_REGISTER_VALUE(REGNO, VALUE) \
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((REGNO) == AARCH64_DWARF_VG && ((*VALUE) = aarch64_vg (), 1))
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