84 lines
2.2 KiB
ArmAsm
84 lines
2.2 KiB
ArmAsm
/* Unsigned 32 bit division optimized for Epiphany.
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Copyright (C) 2009-2020 Free Software Foundation, Inc.
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Contributed by Embecosm on behalf of Adapteva, Inc.
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This file is part of GCC.
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This file is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 3, or (at your option) any
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later version.
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#include "epiphany-asm.h"
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FSTAB (__udivsi3,T_UINT)
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.global SYM(__udivsi3)
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.balign 4
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HIDDEN_FUNC(__udivsi3)
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SYM(__udivsi3):
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sub TMP0,r0,r1
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bltu .Lret0
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float TMP2,r0
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mov TMP1,%low(0xb0800000) ; ??? this would be faster with small data
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float TMP3,r1
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movt TMP1,%high(0xb0800000)
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asr TMP0,r0,8
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sub TMP0,TMP0,TMP1
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movt TMP1,%high(0x00810000)
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movgteu TMP2,TMP0
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bblt .Lret1
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sub TMP2,TMP2,TMP1
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sub TMP2,TMP2,TMP3
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mov TMP3,0
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movltu TMP2,TMP3
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lsr TMP2,TMP2,23
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lsl r1,r1,TMP2
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mov TMP0,1
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lsl TMP0,TMP0,TMP2
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sub r0,r0,r1
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bltu .Ladd_back
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add TMP3,TMP3,TMP0
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sub r0,r0,r1
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bltu .Ladd_back
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.Lsub_loop:; More than two iterations are rare, so it makes sense to leave
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; this label here to reduce average branch penalties.
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add TMP3,TMP3,TMP0
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sub r0,r0,r1
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bgteu .Lsub_loop
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.Ladd_back:
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add r0,r0,r1
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sub TMP1,r1,1
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mov r1,%low(.L0step)
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movt r1,%high(.L0step)
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lsl TMP2,TMP2,3
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sub r1,r1,TMP2
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jr r1
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.rep 30
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lsl r0,r0,1
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sub.l r1,r0,TMP1
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movgteu r0,r1
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.endr
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.L0step:sub r1,TMP0,1 ; mask result bits from steps ...
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and r0,r0,r1
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orr r0,r0,TMP3 ; ... and combine with first bits.
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rts
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.Lret0: mov r0,0
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rts
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.Lret1: mov r0,1
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rts
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ENDFUNC(__udivsi3)
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