672 lines
22 KiB
C++
672 lines
22 KiB
C++
/* Definitions of target machine for GNU compiler, for the pdp-11
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Copyright (C) 1994-2017 Free Software Foundation, Inc.
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Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at).
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#define CONSTANT_POOL_BEFORE_FUNCTION 0
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/* check whether load_fpu_reg or not */
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#define LOAD_FPU_REG_P(x) ((x) >= AC0_REGNUM && (x) <= AC3_REGNUM)
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#define NO_LOAD_FPU_REG_P(x) ((x) == AC4_REGNUM || (x) == AC5_REGNUM)
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#define FPU_REG_P(x) (LOAD_FPU_REG_P(x) || NO_LOAD_FPU_REG_P(x))
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#define CPU_REG_P(x) ((x) <= PC_REGNUM)
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/* Names to predefine in the preprocessor for this target machine. */
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#define TARGET_CPU_CPP_BUILTINS() \
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do \
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{ \
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builtin_define_std ("pdp11"); \
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} \
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while (0)
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/* Generate DBX debugging information. */
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#define DBX_DEBUGGING_INFO
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#define TARGET_40_PLUS (TARGET_40 || TARGET_45)
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#define TARGET_10 (! TARGET_40_PLUS)
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#define TARGET_UNIX_ASM_DEFAULT 0
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#define ASSEMBLER_DIALECT (TARGET_UNIX_ASM ? 1 : 0)
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/* TYPE SIZES */
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#define SHORT_TYPE_SIZE 16
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#define INT_TYPE_SIZE (TARGET_INT16 ? 16 : 32)
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#define LONG_TYPE_SIZE 32
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#define LONG_LONG_TYPE_SIZE 64
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/* if we set FLOAT_TYPE_SIZE to 32, we could have the benefit
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of saving core for huge arrays - the definitions are
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already in md - but floats can never reside in
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an FPU register - we keep the FPU in double float mode
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all the time !! */
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#define FLOAT_TYPE_SIZE (TARGET_FLOAT32 ? 32 : 64)
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#define DOUBLE_TYPE_SIZE 64
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#define LONG_DOUBLE_TYPE_SIZE 64
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/* machine types from ansi */
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#define SIZE_TYPE "unsigned int" /* definition of size_t */
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#define WCHAR_TYPE "int" /* or long int???? */
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#define WCHAR_TYPE_SIZE 16
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#define PTRDIFF_TYPE "int"
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/* target machine storage layout */
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/* Define this if most significant bit is lowest numbered
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in instructions that operate on numbered bit-fields. */
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#define BITS_BIG_ENDIAN 0
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/* Define this if most significant byte of a word is the lowest numbered. */
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#define BYTES_BIG_ENDIAN 0
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/* Define this if most significant word of a multiword number is first. */
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#define WORDS_BIG_ENDIAN 1
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/* Define that floats are in VAX order, not high word first as for ints. */
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#define FLOAT_WORDS_BIG_ENDIAN 0
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/* Width of a word, in units (bytes).
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UNITS OR BYTES - seems like units */
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#define UNITS_PER_WORD 2
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/* This machine doesn't use IEEE floats. */
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/* Because the pdp11 (at least Unix) convention for 32-bit ints is
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big endian, opposite for what you need for float, the vax float
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conversion routines aren't actually used directly. But the underlying
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format is indeed the vax/pdp11 float format. */
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extern const struct real_format pdp11_f_format;
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extern const struct real_format pdp11_d_format;
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/* Maximum sized of reasonable data type
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DImode or Dfmode ...*/
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#define MAX_FIXED_MODE_SIZE 64
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/* Allocation boundary (in *bits*) for storing pointers in memory. */
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#define POINTER_BOUNDARY 16
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/* Allocation boundary (in *bits*) for storing arguments in argument list. */
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#define PARM_BOUNDARY 16
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/* Boundary (in *bits*) on which stack pointer should be aligned. */
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#define STACK_BOUNDARY 16
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/* Allocation boundary (in *bits*) for the code of a function. */
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#define FUNCTION_BOUNDARY 16
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/* Alignment of field after `int : 0' in a structure. */
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#define EMPTY_FIELD_BOUNDARY 16
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/* No data type wants to be aligned rounder than this. */
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#define BIGGEST_ALIGNMENT 16
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/* Define this if move instructions will actually fail to work
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when given unaligned data. */
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#define STRICT_ALIGNMENT 1
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/* Standard register usage. */
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/* Number of actual hardware registers.
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The hardware registers are assigned numbers for the compiler
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from 0 to just below FIRST_PSEUDO_REGISTER.
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All registers that the compiler knows about must be given numbers,
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even those that are not normally considered general registers.
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we have 8 integer registers, plus 6 float
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(don't use scratch float !) */
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/* 1 for registers that have pervasive standard uses
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and are not available for the register allocator.
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On the pdp, these are:
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Reg 7 = pc;
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reg 6 = sp;
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reg 5 = fp; not necessarily!
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*/
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#define FIXED_REGISTERS \
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{0, 0, 0, 0, 0, 0, 1, 1, \
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0, 0, 0, 0, 0, 0, 1, 1 }
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/* 1 for registers not available across function calls.
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These must include the FIXED_REGISTERS and also any
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registers that can be used without being saved.
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The latter must include the registers where values are returned
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and the register where structure-value addresses are passed.
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Aside from that, you can include as many other registers as you like. */
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/* don't know about fp */
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#define CALL_USED_REGISTERS \
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{1, 1, 0, 0, 0, 0, 1, 1, \
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0, 0, 0, 0, 0, 0, 1, 1 }
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/* Return number of consecutive hard regs needed starting at reg REGNO
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to hold something of mode MODE.
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This is ordinarily the length in words of a value of mode MODE
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but can be less for certain modes in special long registers.
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*/
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#define HARD_REGNO_NREGS(REGNO, MODE) \
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((REGNO <= PC_REGNUM)? \
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((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \
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:1)
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/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
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On the pdp, the cpu registers can hold any mode other than float
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(because otherwise we may end up being asked to move from CPU to FPU
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register, which isn't a valid operation on the PDP11).
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For CPU registers, check alignment.
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FPU accepts SF and DF but actually holds a DF - simplifies life!
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*/
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#define HARD_REGNO_MODE_OK(REGNO, MODE) \
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(((REGNO) <= PC_REGNUM)? \
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((GET_MODE_BITSIZE(MODE) <= 16) \
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|| (GET_MODE_BITSIZE(MODE) >= 32 && \
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!((REGNO) & 1) && !FLOAT_MODE_P (MODE))) \
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:FLOAT_MODE_P (MODE))
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/* Value is 1 if it is a good idea to tie two pseudo registers
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when one has mode MODE1 and one has mode MODE2.
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If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
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for any hard reg, then this must be 0 for correct output. */
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#define MODES_TIEABLE_P(MODE1, MODE2) 0
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/* Specify the registers used for certain standard purposes.
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The values of these macros are register numbers. */
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/* Register in which static-chain is passed to a function. */
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/* ??? - i don't want to give up a reg for this! */
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#define STATIC_CHAIN_REGNUM 4
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/* Define the classes of registers for register constraints in the
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machine description. Also define ranges of constants.
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One of the classes must always be named ALL_REGS and include all hard regs.
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If there is more than one class, another class must be named NO_REGS
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and contain no registers.
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The name GENERAL_REGS must be the name of a class (or an alias for
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another name such as ALL_REGS). This is the class of registers
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that is allowed by "g" or "r" in a register constraint.
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Also, registers outside this class are allocated only when
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instructions express preferences for them.
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The classes must be numbered in nondecreasing order; that is,
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a larger-numbered class must never be contained completely
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in a smaller-numbered class.
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For any two classes, it is very desirable that there be another
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class that represents their union. */
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/* The pdp has a couple of classes:
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MUL_REGS are used for odd numbered regs, to use in 16-bit multiplication
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(even numbered do 32-bit multiply)
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LMUL_REGS long multiply registers (even numbered regs )
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(don't need them, all 32-bit regs are even numbered!)
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GENERAL_REGS is all cpu
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LOAD_FPU_REGS is the first four cpu regs, they are easier to load
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NO_LOAD_FPU_REGS is ac4 and ac5, currently - difficult to load them
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FPU_REGS is all fpu regs
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*/
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enum reg_class { NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES };
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#define N_REG_CLASSES (int) LIM_REG_CLASSES
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/* have to allow this till cmpsi/tstsi are fixed in a better way !! */
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#define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
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/* Since GENERAL_REGS is the same class as ALL_REGS,
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don't give it a different class number; just make it an alias. */
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/* #define GENERAL_REGS ALL_REGS */
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/* Give names of register classes as strings for dump file. */
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#define REG_CLASS_NAMES {"NO_REGS", "MUL_REGS", "GENERAL_REGS", "LOAD_FPU_REGS", "NO_LOAD_FPU_REGS", "FPU_REGS", "ALL_REGS" }
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/* Define which registers fit in which classes.
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This is an initializer for a vector of HARD_REG_SET
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of length N_REG_CLASSES. */
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#define REG_CLASS_CONTENTS {{0}, {0x00aa}, {0xc0ff}, {0x0f00}, {0x3000}, {0x3f00}, {0xffff}}
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/* The same information, inverted:
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Return the class number of the smallest class containing
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reg number REGNO. This could be a conditional expression
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or could index an array. */
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#define REGNO_REG_CLASS(REGNO) pdp11_regno_reg_class (REGNO)
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/* The class value for index registers, and the one for base regs. */
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#define INDEX_REG_CLASS GENERAL_REGS
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#define BASE_REG_CLASS GENERAL_REGS
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/* Hook for testing if memory is needed for moving between registers. */
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#define SECONDARY_MEMORY_NEEDED(class1, class2, m) \
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pdp11_secondary_memory_needed (class1, class2, m)
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/* Return the maximum number of consecutive registers
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needed to represent mode MODE in a register of class CLASS. */
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#define CLASS_MAX_NREGS(CLASS, MODE) \
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((CLASS == GENERAL_REGS || CLASS == MUL_REGS)? \
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((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD): \
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1 \
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)
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#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
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pdp11_cannot_change_mode_class (FROM, TO, CLASS)
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/* Stack layout; function entry, exit and calling. */
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/* Define this if pushing a word on the stack
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makes the stack pointer a smaller address. */
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#define STACK_GROWS_DOWNWARD 1
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/* Define this to nonzero if the nominal address of the stack frame
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is at the high-address end of the local variables;
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that is, each additional local variable allocated
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goes at a more negative offset in the frame.
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*/
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#define FRAME_GROWS_DOWNWARD 1
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/* Offset within stack frame to start allocating local variables at.
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If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
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first local allocated. Otherwise, it is the offset to the BEGINNING
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of the first local allocated. */
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#define STARTING_FRAME_OFFSET 0
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/* If we generate an insn to push BYTES bytes,
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this says how many the stack pointer really advances by.
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On the pdp11, the stack is on an even boundary */
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#define PUSH_ROUNDING(BYTES) ((BYTES + 1) & ~1)
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/* current_first_parm_offset stores the # of registers pushed on the
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stack */
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extern int current_first_parm_offset;
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/* Offset of first parameter from the argument pointer register value. */
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#define FIRST_PARM_OFFSET(FNDECL) 0
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/* Define how to find the value returned by a function.
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VALTYPE is the data type of the value (as a tree).
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If the precise function being called is known, FUNC is its FUNCTION_DECL;
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otherwise, FUNC is 0. */
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#define BASE_RETURN_VALUE_REG(MODE) \
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(FLOAT_MODE_P (MODE) ? AC0_REGNUM : RETVAL_REGNUM)
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/* 1 if N is a possible register number for function argument passing.
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- not used on pdp */
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#define FUNCTION_ARG_REGNO_P(N) 0
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/* Define a data type for recording info about an argument list
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during the scan of that argument list. This data type should
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hold all necessary information about the function itself
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and about the args processed so far, enough to enable macros
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such as FUNCTION_ARG to determine where the next arg should go.
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*/
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#define CUMULATIVE_ARGS int
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/* Initialize a variable CUM of type CUMULATIVE_ARGS
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for a call to a function whose data type is FNTYPE.
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For a library call, FNTYPE is 0.
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...., the offset normally starts at 0, but starts at 1 word
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when the function gets a structure-value-address as an
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invisible first argument. */
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#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
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((CUM) = 0)
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/* Output assembler code to FILE to increment profiler label # LABELNO
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for profiling a function entry. */
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#define FUNCTION_PROFILER(FILE, LABELNO) \
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gcc_unreachable ();
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/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
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the stack pointer does not matter. The value is tested only in
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functions that have frame pointers.
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No definition is equivalent to always zero. */
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extern int may_call_alloca;
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#define EXIT_IGNORE_STACK 1
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/* Definitions for register eliminations.
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This is an array of structures. Each structure initializes one pair
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of eliminable registers. The "from" register number is given first,
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followed by "to". Eliminations of the same "from" register are listed
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in order of preference.
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There are two registers that can always be eliminated on the pdp11.
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The frame pointer and the arg pointer can be replaced by either the
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hard frame pointer or to the stack pointer, depending upon the
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circumstances. The hard frame pointer is not used before reload and
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so it is not eligible for elimination. */
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#define ELIMINABLE_REGS \
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{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
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{ ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
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{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
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{ FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} \
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#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
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((OFFSET) = pdp11_initial_elimination_offset ((FROM), (TO)))
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/* Addressing modes, and classification of registers for them. */
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#define HAVE_POST_INCREMENT 1
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#define HAVE_PRE_DECREMENT 1
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/* Macros to check register numbers against specific register classes. */
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/* These assume that REGNO is a hard or pseudo reg number.
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They give nonzero only if REGNO is a hard reg of the suitable class
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or a pseudo reg currently allocated to a suitable hard reg.
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Since they use reg_renumber, they are safe only once reg_renumber
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has been allocated, which happens in reginfo.c during register
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allocation. */
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#define REGNO_OK_FOR_BASE_P(REGNO) \
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((REGNO) <= PC_REGNUM || (unsigned) reg_renumber[REGNO] <= PC_REGNUM || \
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(REGNO) == ARG_POINTER_REGNUM || (REGNO) == FRAME_POINTER_REGNUM)
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#define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P (REGNO)
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/* Now macros that check whether X is a register and also,
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strictly, whether it is in a specified class.
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*/
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/* Maximum number of registers that can appear in a valid memory address. */
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#define MAX_REGS_PER_ADDRESS 1
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/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
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and check its validity for a certain class.
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We have two alternate definitions for each of them.
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The usual definition accepts all pseudo regs; the other rejects
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them unless they have been allocated suitable hard regs.
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The symbol REG_OK_STRICT causes the latter definition to be used.
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Most source files want to accept pseudo regs in the hope that
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they will get allocated to the class that the insn wants them to be in.
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Source files for reload pass need to be strict.
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After reload, it makes no difference, since pseudo regs have
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been eliminated by then. */
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#ifndef REG_OK_STRICT
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/* Nonzero if X is a hard reg that can be used as an index
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or if it is a pseudo reg. */
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#define REG_OK_FOR_INDEX_P(X) (1)
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/* Nonzero if X is a hard reg that can be used as a base reg
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or if it is a pseudo reg. */
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#define REG_OK_FOR_BASE_P(X) (1)
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#else
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/* Nonzero if X is a hard reg that can be used as an index. */
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#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
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/* Nonzero if X is a hard reg that can be used as a base reg. */
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#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
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#endif
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/* Specify the machine mode that this machine uses
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for the index in the tablejump instruction. */
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#define CASE_VECTOR_MODE HImode
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/* Define this if a raw index is all that is needed for a
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`tablejump' insn. */
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#define CASE_TAKES_INDEX_RAW
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/* Define this as 1 if `char' should by default be signed; else as 0. */
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#define DEFAULT_SIGNED_CHAR 1
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/* Max number of bytes we can move from memory to memory
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in one reasonably fast instruction.
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*/
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#define MOVE_MAX 2
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/* Nonzero if access to memory by byte is slow and undesirable. -
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*/
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#define SLOW_BYTE_ACCESS 0
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/* Do not break .stabs pseudos into continuations. */
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#define DBX_CONTIN_LENGTH 0
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/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
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is done just by pretending it is already truncated. */
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#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
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/* Give a comparison code (EQ, NE etc) and the first operand of a COMPARE,
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return the mode to be used for the comparison. For floating-point, CCFPmode
|
||
should be used. */
|
||
|
||
#define SELECT_CC_MODE(OP,X,Y) \
|
||
(GET_MODE_CLASS(GET_MODE(X)) == MODE_FLOAT? CCFPmode : CCmode)
|
||
|
||
/* Specify the machine mode that pointers have.
|
||
After generation of rtl, the compiler makes no further distinction
|
||
between pointers and any other objects of this machine mode. */
|
||
#define Pmode HImode
|
||
|
||
/* A function address in a call instruction
|
||
is a word address (for indexing purposes)
|
||
so give the MEM rtx a word's mode. */
|
||
#define FUNCTION_MODE HImode
|
||
|
||
/* Define this if addresses of constant functions
|
||
shouldn't be put through pseudo regs where they can be cse'd.
|
||
Desirable on machines where ordinary constants are expensive
|
||
but a CALL with constant address is cheap. */
|
||
/* #define NO_FUNCTION_CSE */
|
||
|
||
|
||
/* Tell emit-rtl.c how to initialize special values on a per-function base. */
|
||
extern rtx cc0_reg_rtx;
|
||
|
||
#define CC_STATUS_MDEP rtx
|
||
|
||
#define CC_STATUS_MDEP_INIT (cc_status.mdep = 0)
|
||
|
||
/* Tell final.c how to eliminate redundant test instructions. */
|
||
|
||
/* Here we define machine-dependent flags and fields in cc_status
|
||
(see `conditions.h'). */
|
||
|
||
#define CC_IN_FPU 04000
|
||
|
||
/* Do UPDATE_CC if EXP is a set, used in
|
||
NOTICE_UPDATE_CC
|
||
|
||
floats only do compare correctly, else nullify ...
|
||
|
||
get cc0 out soon ...
|
||
*/
|
||
|
||
/* Store in cc_status the expressions
|
||
that the condition codes will describe
|
||
after execution of an instruction whose pattern is EXP.
|
||
Do not alter them if the instruction would not alter the cc's. */
|
||
|
||
#define NOTICE_UPDATE_CC(EXP, INSN) \
|
||
{ if (GET_CODE (EXP) == SET) \
|
||
{ \
|
||
notice_update_cc_on_set(EXP, INSN); \
|
||
} \
|
||
else if (GET_CODE (EXP) == PARALLEL \
|
||
&& GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
|
||
{ \
|
||
notice_update_cc_on_set(XVECEXP (EXP, 0, 0), INSN); \
|
||
} \
|
||
else if (GET_CODE (EXP) == CALL) \
|
||
{ /* all bets are off */ CC_STATUS_INIT; } \
|
||
if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \
|
||
&& cc_status.value2 \
|
||
&& reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \
|
||
{ \
|
||
printf ("here!\n"); \
|
||
cc_status.value2 = 0; \
|
||
} \
|
||
}
|
||
|
||
/* Control the assembler format that we output. */
|
||
|
||
/* Output to assembler file text saying following lines
|
||
may contain character constants, extra white space, comments, etc. */
|
||
|
||
#define ASM_APP_ON ""
|
||
|
||
/* Output to assembler file text saying following lines
|
||
no longer contain unusual constructs. */
|
||
|
||
#define ASM_APP_OFF ""
|
||
|
||
/* Output before read-only data. */
|
||
|
||
#define TEXT_SECTION_ASM_OP "\t.text\n"
|
||
|
||
/* Output before writable data. */
|
||
|
||
#define DATA_SECTION_ASM_OP "\t.data\n"
|
||
|
||
/* How to refer to registers in assembler output.
|
||
This sequence is indexed by compiler's hard-register-number (see above). */
|
||
|
||
#define REGISTER_NAMES \
|
||
{"r0", "r1", "r2", "r3", "r4", "r5", "sp", "pc", \
|
||
"ac0", "ac1", "ac2", "ac3", "ac4", "ac5", "fp", "ap" }
|
||
|
||
/* Globalizing directive for a label. */
|
||
#define GLOBAL_ASM_OP "\t.globl "
|
||
|
||
/* The prefix to add to user-visible assembler symbols. */
|
||
|
||
#define USER_LABEL_PREFIX "_"
|
||
|
||
/* This is how to store into the string LABEL
|
||
the symbol_ref name of an internal numbered label where
|
||
PREFIX is the class of label and NUM is the number within the class.
|
||
This is suitable for output with `assemble_name'. */
|
||
|
||
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
|
||
sprintf (LABEL, "*%s_%lu", PREFIX, (unsigned long)(NUM))
|
||
|
||
#define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
|
||
output_ascii (FILE, P, SIZE)
|
||
|
||
/* This is how to output an element of a case-vector that is absolute. */
|
||
|
||
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
|
||
fprintf (FILE, "\t%sL_%d\n", TARGET_UNIX_ASM ? "" : ".word ", VALUE)
|
||
|
||
/* This is how to output an element of a case-vector that is relative.
|
||
Don't define this if it is not supported. */
|
||
|
||
/* #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) */
|
||
|
||
/* This is how to output an assembler line
|
||
that says to advance the location counter
|
||
to a multiple of 2**LOG bytes.
|
||
|
||
who needs this????
|
||
*/
|
||
|
||
#define ASM_OUTPUT_ALIGN(FILE,LOG) \
|
||
switch (LOG) \
|
||
{ \
|
||
case 0: \
|
||
break; \
|
||
case 1: \
|
||
fprintf (FILE, "\t.even\n"); \
|
||
break; \
|
||
default: \
|
||
gcc_unreachable (); \
|
||
}
|
||
|
||
#define ASM_OUTPUT_SKIP(FILE,SIZE) \
|
||
fprintf (FILE, "\t.=.+ %#ho\n", (unsigned short)(SIZE))
|
||
|
||
/* This says how to output an assembler line
|
||
to define a global common symbol. */
|
||
|
||
#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
|
||
pdp11_asm_output_var (FILE, NAME, SIZE, ALIGN, true)
|
||
|
||
|
||
/* This says how to output an assembler line
|
||
to define a local common symbol. */
|
||
|
||
#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
|
||
pdp11_asm_output_var (FILE, NAME, SIZE, ALIGN, false)
|
||
|
||
/* Print a memory address as an operand to reference that memory location. */
|
||
|
||
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
|
||
print_operand_address (FILE, ADDR)
|
||
|
||
#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
|
||
( \
|
||
fprintf (FILE, "\tmov %s, -(sp)\n", reg_names[REGNO]) \
|
||
)
|
||
|
||
#define ASM_OUTPUT_REG_POP(FILE,REGNO) \
|
||
( \
|
||
fprintf (FILE, "\tmov (sp)+, %s\n", reg_names[REGNO]) \
|
||
)
|
||
|
||
#define TRAMPOLINE_SIZE 8
|
||
#define TRAMPOLINE_ALIGNMENT 16
|
||
|
||
/* there is no point in avoiding branches on a pdp,
|
||
since branches are really cheap - I just want to find out
|
||
how much difference the BRANCH_COST macro makes in code */
|
||
#define BRANCH_COST(speed_p, predictable_p) pdp11_branch_cost ()
|
||
|
||
#define COMPARE_FLAG_MODE HImode
|
||
|
||
#define TARGET_HAVE_NAMED_SECTIONS false
|
||
|
||
/* pdp11-unknown-aout target has no support of C99 runtime */
|
||
#undef TARGET_LIBC_HAS_FUNCTION
|
||
#define TARGET_LIBC_HAS_FUNCTION no_c99_libc_has_function
|