fa3ca6151c
The tuning structures have an sve_width field that specifies the number of bits in an SVE vector (or SVE_NOT_IMPLEMENTED if not applicable). This patch turns the field into a bitmask so that it can specify multiple widths at the same time. For now we always treat the mininum width as the likely width. An alternative would have been to add extra fields, which would have coped correctly with non-power-of-2 widths. However, we're very far from supporting constant non-power-of-2 vectors in GCC, so I think the non-power-of-2 case will in reality always have to be hidden behind VLA. gcc/ * config/aarch64/aarch64-protos.h (tune_params::sve_width): Turn into a bitmask. * config/aarch64/aarch64.c (aarch64_cmp_autovec_modes): Update accordingly. (aarch64_estimated_poly_value): Likewise. Use the least significant set bit for the minimum and likely values. Use the most significant set bit for the maximum value.
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