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gcc: * Makefile.in (LIB1ASMSRC): Don't export. (libgcc.mvars): Don't emit LIB1ASMFUNCS, LIB1ASMSRC. * config/arm/arm.c: Update lib1funcs.asm filename. * config/arm/linux-eabi.h: Likewise. * config/arm/bpabi-v6m.S, config/arm/bpabi.S, config/arm/ieee754-df.S, config/arm/ieee754-sf.S: Move to ../libgcc/config/arm. * config/arm/lib1funcs.asm: Move to ../libgcc/config/arm/lib1funcs.S. * config/arm/t-arm (LIB1ASMSRC, LIB1ASMFUNCS): Remove. * config/arm/t-arm-elf (LIB1ASMFUNCS): Remove. * config/arm/t-bpabi: Likewise. * config/arm/t-linux (LIB1ASMSRC, LIB1ASMFUNCS): Remove. * config/arm/t-linux-eabi (LIB1ASMFUNCS): Remove. * config/arm/t-strongarm-elf: Likewise. * config/arm/t-symbian: Likewise. * config/arm/t-vxworks: Likewise. * config/arm/t-wince-pe: Likewise. * config/avr/libgcc.S: Move to ../libgcc/config/avr. * config/avr/t-avr (LIB1ASMSRC, LIB1ASMFUNCS): Remove. * config/bfin/lib1funcs.asm: Move to ../libgcc/config/bfin/lib1funcs.S. * config/bfin/t-bfin: Remove. * config/bfin/t-bfin-elf (LIB1ASMSRC, LIB1ASMFUNCS): Remove. * config/bfin/t-bfin-linux: Likewise. * config/bfin/t-bfin-uclinux: Likewise. * config/c6x/lib1funcs.asm: Move to ../libgcc/config/c6x/lib1funcs.S. * config/c6x/t-c6x-elf (LIB1ASMSRC, LIB1ASMFUNCS): Remove. * config/fr30/lib1funcs.asm: Move to ../libgcc/config/fr30/lib1funcs.S. * config/fr30/t-fr30 (LIB1ASMSRC, LIB1ASMFUNCS): Remove. * config/frv/lib1funcs.asm: Move to ../libgcc/config/frv/lib1funcs.S. * config/frv/t-frv (CROSS_LIBGCC1, LIB1ASMSRC, LIB1ASMFUNCS): Remove. * config/h8300/fixunssfsi.c: Update lib1funcs.asm filename. * config/h8300/lib1funcs.asm: Move to ../libgcc/config/h8300/lib1funcs.S. * config/h8300/t-h8300 (LIB1ASMSRC, LIB1ASMFUNCS): Remove. * config/i386/cygwin.asm: Move to ../libgcc/config/i386/cygwin.S. * config/i386/t-cygming (LIB1ASMSRC, LIB1ASMFUNCS): Remove. * config/i386/t-interix: Likewise. * config/ia64/lib1funcs.asm: Move to ../libgcc/config/ia64/lib1funcs.S. * config/ia64/t-hpux (LIB1ASMFUNCS, LIBGCC1_TEST): Remove. * config/ia64/t-ia64 (LIB1ASMSRC, LIB1ASMFUNCS): Remove. * config/iq2000/t-iq2000 (LIBGCC1, CROSS_LIBGCC1): Remove. * config/m32c/m32c.c: Update m32c-lib1.S filename. * config/m32c/m32c-lib1.S: Move to ../libgcc/config/m32c/lib1funcs.S. * config/m32c/t-m32c (LIB1ASMSRC, LIB1ASMFUNCS): Remove. * config/m32r/t-linux (CROSS_LIBGCC1, LIBGCC1, LIBGCC1_TEST): Remove. * config/m68k/lb1sf68.asm: Move to ../libgcc/config/m68k/lb1sf68.S. * config/m68k/t-floatlib (LIB1ASMSRC, LIB1ASMFUNCS): New file. * config/mcore/lib1.asm: Move to ../libgcc/config/mcore/lib1funcs.S. * config/mcore/t-mcore (LIB1ASMSRC, LIB1ASMFUNCS): Remove. * config/mep/mep-lib1.asm: Move to ../libgcc/config/mep/lib1funcs.S. * config/mep/t-mep (LIB1ASMSRC, LIB1ASMFUNCS): Remove. * config/mips/mips16.S: Move to ../libgcc/config/mips. * config/mips/t-libgcc-mips16: Remove. * config/mips/t-sr71k (LIBGCC1, CROSS_LIBGCC1): Remove. * config/pa/milli64.S: Move to ../libgcc/config/pa. * config/pa/t-linux (LIB1ASMFUNCS, LIB1ASMSRC): Remove. * config/pa/t-linux64: Likewise. * config/picochip/libgccExtras/fake_libgcc.asm: Move to ../libgcc/config/picochip/lib1funcs.S. * config/picochip/t-picochip (LIB1ASMFUNCS, LIB1ASMSRC): Remove. * config/sh/lib1funcs.asm: Move to ../libgcc/config/sh/lib1funcs.S. * config/sh/lib1funcs.h: Move to ../libgcc/config/sh. * config/sh/sh.h: Update lib1funcs.asm filename. * config/sh/t-linux (LIB1ASMFUNCS_CACHE): Remove. * config/sh/t-netbsd: Likewise. * config/sh/t-sh (LIB1ASMSRC, LIB1ASMFUNCS, LIB1ASMFUNCS_CACHE): Remove. * config/sh/t-sh64 (LIB1ASMFUNCS): Remove. * config/sparc/lb1spc.asm: Move to ../libgcc/config/sparc/lb1spc.S. * config/sparc/lb1spl.asm: Remove. * config/sparc/t-elf (LIB1ASMSRC, LIB1ASMFUNCS): Remove. * config/sparc/t-leon: Likewise. * config/spu/t-spu-elf (LIBGCC1, CROSS_LIBGCC1): Remove. * config/v850/lib1funcs.asm: Move to ../libgcc/config/v850/lib1funcs.S. * config/v850/t-v850 (LIB1ASMSRC, LIB1ASMFUNCS): Remove * config/vax/lib1funcs.asm: Move to ../libgcc/config/vax/lib1funcs.S. * config/vax/t-linux: Remove. * config/xtensa/ieee754-df.S, config/xtensa/ieee754-sf.S: Move to ../libgcc/config/xtensa. * config/xtensa/lib1funcs.asm: Move to ../libgcc/config/xtensa/lib1funcs.S. * config/xtensa/t-xtensa (LIB1ASMSRC, LIB1ASMFUNCS): Remove. * config.gcc (bfin*-rtems*): Remove bfin/t-bfin from tmake_file. (bfin*-*): Likewise. (mips64*-*-linux*, mipsisa64*-*-linux*): Remove mips/t-libgcc-mips16 from tmake_file. (mips*-*-linux*): Likewise. (mips*-sde-elf*): Likewise. (mipsisa32-*-elf*, mipsisa32el-*-elf*, mipsisa32r2-*-elf*) (mipsisa32r2el-*-elf*, mipsisa64-*-elf*, mipsisa64el-*-elf*) (mipsisa64r2-*-elf*, mipsisa64r2el-*-elf*): Likewise. (mipsisa64sb1-*-elf*, mipsisa64sb1el-*-elf*): Likewise. (mips-*-elf*, mipsel-*-elf*): Likewise. (mips64-*-elf*, mips64el-*-elf*): Likewise. (mips64orion-*-elf*, mips64orionel-*-elf*): Likewise. (mips*-*-rtems*): Likewise. (mipstx39-*-elf*, mipstx39el-*-elf*): Likewise. (vax-*-linux*): Remove vax/t-linux from tmake_file. libgcc: * Makefile.in ($(lib1asmfuncs-o), $(lib1asmfuncs-s-o)): Use $(srcdir) to refer to $(LIB1ASMSRC). Use $<. * config/arm/bpabi-v6m.S, config/arm/bpabi.S, config/arm/ieee754-df.S, config/arm/ieee754-sf.S, config/arm/lib1funcs.S: New files. * config/arm/libunwind.S [!__symbian__]: Use lib1funcs.S. * config/arm/t-arm: New file. * config/arm/t-bpabi (LIB1ASMFUNCS): Set. * config/arm/t-elf, config/arm/t-linux, config/arm/t-linux-eabi, config/arm/t-strongarm-elf: New files. * config/arm/t-symbian (LIB1ASMFUNCS): Set. * config/arm/t-vxworks, config/arm/t-wince-pe: New files. * config/avr/lib1funcs.S: New file. * config/avr/t-avr (LIB1ASMSRC, LIB1ASMFUNCS): Set. * config/bfin/lib1funcs.S, config/bfin/t-bfin: New files. * config/c6x/lib1funcs.S: New file. * config/c6x/t-elf (LIB1ASMSRC, LIB1ASMFUNCS): Set. * config/fr30/lib1funcs.S, config/fr30/t-fr30: New files. * config/frv/lib1funcs.S: New file. * config/frv/t-frv (LIB1ASMSRC, LIB1ASMFUNCS): Set. * config/h8300/lib1funcs.S, config/h8300/t-h8300: New files. * config/i386/cygwin.S, config/i386/t-chkstk: New files. * config/ia64/__divxf3.asm: Rename to ... * config/ia64/__divxf3.S: ... this. Adapt lib1funcs.asm filename. * config/ia64/_fixtfdi.asm: Rename to ... * config/ia64/_fixtfdi.S: ... this. Adapt lib1funcs.asm filename. * config/ia64/_fixunstfdi.asm: Rename to ... * config/ia64/_fixunstfdi.S: ... this. Adapt lib1funcs.asm filename. * config/ia64/_floatditf.asm: Rename to ... * config/ia64/_floatditf.S: ... this. Adapt lib1funcs.asm filename. * config/ia64/lib1funcs.S: New file. * config/ia64/t-hpux (LIB1ASMFUNCS): Set. * config/ia64/t-ia64 (LIB1ASMSRC, LIB1ASMFUNCS): Set. * config/ia64/t-softfp-compat (libgcc1-tf-compats): Adapt suffix. * config/m32c/lib1funcs.S, config/m32c/t-m32c: New files. * config/m68k/lb1sf68.S, config/m68k/t-floatlib: New files. * config/mcore/lib1funcs.S, config/mcore/t-mcore: New files. * config/mep/lib1funcs.S: New file. * config/mep/t-mep (LIB1ASMSRC, LIB1ASMFUNCS): Set. * config/mips/mips16.S: New file. * config/mips/t-mips16 (LIB1ASMSRC, LIB1ASMFUNCS): Set. * config/pa/milli64.S: New file. * config/pa/t-linux, config/pa/t-linux64: New files. * config/picochip/lib1funcs.S: New file. * config/picochip/t-picochip (LIB1ASMSRC, LIB1ASMFUNCS): Set. * config/sh/lib1funcs.S, config/sh/lib1funcs.h: New files. * config/sh/t-linux (LIB1ASMFUNCS_CACHE): Set. * config/sh/t-netbsd: New file. * config/sh/t-sh (LIB1ASMSRC, LIB1ASMFUNCS, LIB1ASMFUNCS_CACHE): Set. Use $(srcdir) to refer to lib1funcs.S, adapt filename. * config/sh/t-sh64: New file. * config/sparc/lb1spc.S: New file. * config/sparc/t-softmul (LIB1ASMSRC): Adapt sparc/lb1spc.asm filename. * config/v850/lib1funcs.S, config/v850/t-v850: New files. * config/vax/lib1funcs.S, config/vax/t-linux: New files. * config/xtensa/ieee754-df.S, config/xtensa/ieee754-sf.S, config/xtensa/lib1funcs.S: New files. * config/xtensa/t-xtensa (LIB1ASMSRC, LIB1ASMFUNCS): Set. * config.host (arm-wrs-vxworks): Add arm/t-arm, arm/t-vxworks to tmake_file. (arm*-*-freebsd*): Add arm/t-arm, arm/t-strongarm-elf to tmake_file. (arm*-*-netbsdelf*): Add arm/t-arm to tmake_file. (arm*-*-linux*): Likewise. Add arm/t-elf, arm/t-bpabi, arm/t-linux-eabi to tmake_file for arm*-*-linux-*eabi, add arm/t-linux otherwise. (arm*-*-uclinux*): Add arm/t-arm, arm/t-elf to tmake_file. (arm*-*-ecos-elf): Likewise. (arm*-*-eabi*, arm*-*-symbianelf*): Likewise. (arm*-*-rtems*): Likewise. (arm*-*-elf): Likewise. (arm*-wince-pe*): Add arm/t-arm, arm/t-wince-pe to tmake_file. (avr-*-rtems*): Add to tmake_file, add avr/t-avr. (bfin*-elf*): Add bfin/t-bfin to tmake_file. (bfin*-uclinux*): Likewise. (bfin*-linux-uclibc*): Likewise. (bfin*-rtems*): Likewise. (bfin*-*): Likewise. (fido-*-elf): Merge into m68k-*-elf*. (fr30-*-elf)): Add fr30/t-fr30 to tmake_file. (frv-*-*linux*): Add frv/t-frv to tmake_file. (h8300-*-rtems*): Add h8300/t-h8300 to tmake_file. (h8300-*-elf*): Likewise. (hppa*64*-*-linux*): Add pa/t-linux, pa/t-linux64 to tmake_file. (hppa*-*-linux*): Add pa/t-linux to tmake_file. (i[34567]86-*-cygwin*): Add i386/t-chkstk to tmake_file. (i[34567]86-*-mingw*): Likewise. (x86_64-*-mingw*): Likewise. (i[34567]86-*-interix3*): Likewise. (ia64*-*-hpux*): Add ia64/t-ia64, ia64/t-hpux to tmake_file. (ia64-hp-*vms*): Add ia64/t-ia64 to tmake_file. (m68k-*-elf*): Also handle fido-*-elf. Add m68k/t-floatlib to tmake_file. (m68k-*-uclinux*): Add m68k/t-floatlib to tmake_file. (m68k-*-linux*): Likewise. (m68k-*-rtems*): Likewise. (mcore-*-elf): Add mcore/t-mcore to tmake_file. (sh-*-elf*, sh[12346l]*-*-elf*): Add sh/t-sh64 to tmake_file for sh64*-*-*. (sh-*-linux*, sh[2346lbe]*-*-linux*): Add sh/t-sh to tmake_file. Add sh/t-sh64 to tmake_file for sh64*-*-linux*. (sh-*-netbsdelf*, shl*-*-netbsdelf*, sh5-*-netbsd*) (sh5l*-*-netbsd*, sh64-*-netbsd*, sh64l*-*-netbsd*): Add sh/t-sh, sh/t-netbsd to tmake_file. Add sh/t-sh64 to tmake_file for sh5*-*-netbsd*, sh64*-netbsd*. (sh-*-rtems*): Add sh/t-sh to tmake_file. (sh-wrs-vxworks): Likewise. (sparc-*-linux*): Add sparc/t-softmul to tmake_file except for *-leon[3-9]*. (v850*-*-*): Add v850/t-v850 to tmake_file. (vax-*-linux*): Add vax/t-linux to tmake_file. (m32c-*-elf*, m32c-*-rtems*): Add m32c/t-m32c to tmake_file. From-SVN: r180773
846 lines
18 KiB
ArmAsm
846 lines
18 KiB
ArmAsm
/* Assembly functions for the Xtensa version of libgcc1.
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Copyright (C) 2001, 2002, 2003, 2005, 2006, 2007, 2009
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Free Software Foundation, Inc.
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Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#include "xtensa-config.h"
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/* Define macros for the ABS and ADDX* instructions to handle cases
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where they are not included in the Xtensa processor configuration. */
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.macro do_abs dst, src, tmp
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#if XCHAL_HAVE_ABS
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abs \dst, \src
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#else
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neg \tmp, \src
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movgez \tmp, \src, \src
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mov \dst, \tmp
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#endif
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.endm
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.macro do_addx2 dst, as, at, tmp
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#if XCHAL_HAVE_ADDX
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addx2 \dst, \as, \at
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#else
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slli \tmp, \as, 1
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add \dst, \tmp, \at
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#endif
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.endm
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.macro do_addx4 dst, as, at, tmp
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#if XCHAL_HAVE_ADDX
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addx4 \dst, \as, \at
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#else
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slli \tmp, \as, 2
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add \dst, \tmp, \at
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#endif
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.endm
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.macro do_addx8 dst, as, at, tmp
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#if XCHAL_HAVE_ADDX
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addx8 \dst, \as, \at
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#else
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slli \tmp, \as, 3
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add \dst, \tmp, \at
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#endif
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.endm
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/* Define macros for leaf function entry and return, supporting either the
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standard register windowed ABI or the non-windowed call0 ABI. These
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macros do not allocate any extra stack space, so they only work for
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leaf functions that do not need to spill anything to the stack. */
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.macro leaf_entry reg, size
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#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
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entry \reg, \size
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#else
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/* do nothing */
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#endif
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.endm
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.macro leaf_return
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#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
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retw
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#else
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ret
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#endif
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.endm
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#ifdef L_mulsi3
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.align 4
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.global __mulsi3
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.type __mulsi3, @function
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__mulsi3:
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leaf_entry sp, 16
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#if XCHAL_HAVE_MUL32
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mull a2, a2, a3
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#elif XCHAL_HAVE_MUL16
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or a4, a2, a3
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srai a4, a4, 16
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bnez a4, .LMUL16
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mul16u a2, a2, a3
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leaf_return
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.LMUL16:
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srai a4, a2, 16
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srai a5, a3, 16
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mul16u a7, a4, a3
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mul16u a6, a5, a2
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mul16u a4, a2, a3
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add a7, a7, a6
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slli a7, a7, 16
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add a2, a7, a4
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#elif XCHAL_HAVE_MAC16
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mul.aa.hl a2, a3
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mula.aa.lh a2, a3
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rsr a5, ACCLO
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umul.aa.ll a2, a3
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rsr a4, ACCLO
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slli a5, a5, 16
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add a2, a4, a5
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#else /* !MUL32 && !MUL16 && !MAC16 */
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/* Multiply one bit at a time, but unroll the loop 4x to better
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exploit the addx instructions and avoid overhead.
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Peel the first iteration to save a cycle on init. */
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/* Avoid negative numbers. */
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xor a5, a2, a3 /* Top bit is 1 if one input is negative. */
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do_abs a3, a3, a6
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do_abs a2, a2, a6
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/* Swap so the second argument is smaller. */
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sub a7, a2, a3
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mov a4, a3
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movgez a4, a2, a7 /* a4 = max (a2, a3) */
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movltz a3, a2, a7 /* a3 = min (a2, a3) */
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movi a2, 0
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extui a6, a3, 0, 1
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movnez a2, a4, a6
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do_addx2 a7, a4, a2, a7
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extui a6, a3, 1, 1
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movnez a2, a7, a6
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do_addx4 a7, a4, a2, a7
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extui a6, a3, 2, 1
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movnez a2, a7, a6
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do_addx8 a7, a4, a2, a7
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extui a6, a3, 3, 1
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movnez a2, a7, a6
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bgeui a3, 16, .Lmult_main_loop
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neg a3, a2
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movltz a2, a3, a5
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leaf_return
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.align 4
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.Lmult_main_loop:
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srli a3, a3, 4
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slli a4, a4, 4
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add a7, a4, a2
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extui a6, a3, 0, 1
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movnez a2, a7, a6
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do_addx2 a7, a4, a2, a7
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extui a6, a3, 1, 1
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movnez a2, a7, a6
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do_addx4 a7, a4, a2, a7
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extui a6, a3, 2, 1
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movnez a2, a7, a6
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do_addx8 a7, a4, a2, a7
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extui a6, a3, 3, 1
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movnez a2, a7, a6
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bgeui a3, 16, .Lmult_main_loop
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neg a3, a2
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movltz a2, a3, a5
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#endif /* !MUL32 && !MUL16 && !MAC16 */
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leaf_return
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.size __mulsi3, . - __mulsi3
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#endif /* L_mulsi3 */
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#ifdef L_umulsidi3
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#if !XCHAL_HAVE_MUL16 && !XCHAL_HAVE_MUL32 && !XCHAL_HAVE_MAC16
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#define XCHAL_NO_MUL 1
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#endif
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.align 4
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.global __umulsidi3
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.type __umulsidi3, @function
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__umulsidi3:
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#if __XTENSA_CALL0_ABI__
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leaf_entry sp, 32
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addi sp, sp, -32
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s32i a12, sp, 16
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s32i a13, sp, 20
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s32i a14, sp, 24
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s32i a15, sp, 28
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#elif XCHAL_NO_MUL
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/* This is not really a leaf function; allocate enough stack space
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to allow CALL12s to a helper function. */
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leaf_entry sp, 48
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#else
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leaf_entry sp, 16
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#endif
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#ifdef __XTENSA_EB__
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#define wh a2
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#define wl a3
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#else
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#define wh a3
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#define wl a2
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#endif /* __XTENSA_EB__ */
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/* This code is taken from the mulsf3 routine in ieee754-sf.S.
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See more comments there. */
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#if XCHAL_HAVE_MUL32_HIGH
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mull a6, a2, a3
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muluh wh, a2, a3
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mov wl, a6
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#else /* ! MUL32_HIGH */
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#if __XTENSA_CALL0_ABI__ && XCHAL_NO_MUL
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/* a0 and a8 will be clobbered by calling the multiply function
|
|
but a8 is not used here and need not be saved. */
|
|
s32i a0, sp, 0
|
|
#endif
|
|
|
|
#if XCHAL_HAVE_MUL16 || XCHAL_HAVE_MUL32
|
|
|
|
#define a2h a4
|
|
#define a3h a5
|
|
|
|
/* Get the high halves of the inputs into registers. */
|
|
srli a2h, a2, 16
|
|
srli a3h, a3, 16
|
|
|
|
#define a2l a2
|
|
#define a3l a3
|
|
|
|
#if XCHAL_HAVE_MUL32 && !XCHAL_HAVE_MUL16
|
|
/* Clear the high halves of the inputs. This does not matter
|
|
for MUL16 because the high bits are ignored. */
|
|
extui a2, a2, 0, 16
|
|
extui a3, a3, 0, 16
|
|
#endif
|
|
#endif /* MUL16 || MUL32 */
|
|
|
|
|
|
#if XCHAL_HAVE_MUL16
|
|
|
|
#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
|
|
mul16u dst, xreg ## xhalf, yreg ## yhalf
|
|
|
|
#elif XCHAL_HAVE_MUL32
|
|
|
|
#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
|
|
mull dst, xreg ## xhalf, yreg ## yhalf
|
|
|
|
#elif XCHAL_HAVE_MAC16
|
|
|
|
/* The preprocessor insists on inserting a space when concatenating after
|
|
a period in the definition of do_mul below. These macros are a workaround
|
|
using underscores instead of periods when doing the concatenation. */
|
|
#define umul_aa_ll umul.aa.ll
|
|
#define umul_aa_lh umul.aa.lh
|
|
#define umul_aa_hl umul.aa.hl
|
|
#define umul_aa_hh umul.aa.hh
|
|
|
|
#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
|
|
umul_aa_ ## xhalf ## yhalf xreg, yreg; \
|
|
rsr dst, ACCLO
|
|
|
|
#else /* no multiply hardware */
|
|
|
|
#define set_arg_l(dst, src) \
|
|
extui dst, src, 0, 16
|
|
#define set_arg_h(dst, src) \
|
|
srli dst, src, 16
|
|
|
|
#if __XTENSA_CALL0_ABI__
|
|
#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
|
|
set_arg_ ## xhalf (a13, xreg); \
|
|
set_arg_ ## yhalf (a14, yreg); \
|
|
call0 .Lmul_mulsi3; \
|
|
mov dst, a12
|
|
#else
|
|
#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
|
|
set_arg_ ## xhalf (a14, xreg); \
|
|
set_arg_ ## yhalf (a15, yreg); \
|
|
call12 .Lmul_mulsi3; \
|
|
mov dst, a14
|
|
#endif /* __XTENSA_CALL0_ABI__ */
|
|
|
|
#endif /* no multiply hardware */
|
|
|
|
/* Add pp1 and pp2 into a6 with carry-out in a9. */
|
|
do_mul(a6, a2, l, a3, h) /* pp 1 */
|
|
do_mul(a11, a2, h, a3, l) /* pp 2 */
|
|
movi a9, 0
|
|
add a6, a6, a11
|
|
bgeu a6, a11, 1f
|
|
addi a9, a9, 1
|
|
1:
|
|
/* Shift the high half of a9/a6 into position in a9. Note that
|
|
this value can be safely incremented without any carry-outs. */
|
|
ssai 16
|
|
src a9, a9, a6
|
|
|
|
/* Compute the low word into a6. */
|
|
do_mul(a11, a2, l, a3, l) /* pp 0 */
|
|
sll a6, a6
|
|
add a6, a6, a11
|
|
bgeu a6, a11, 1f
|
|
addi a9, a9, 1
|
|
1:
|
|
/* Compute the high word into wh. */
|
|
do_mul(wh, a2, h, a3, h) /* pp 3 */
|
|
add wh, wh, a9
|
|
mov wl, a6
|
|
|
|
#endif /* !MUL32_HIGH */
|
|
|
|
#if __XTENSA_CALL0_ABI__ && XCHAL_NO_MUL
|
|
/* Restore the original return address. */
|
|
l32i a0, sp, 0
|
|
#endif
|
|
#if __XTENSA_CALL0_ABI__
|
|
l32i a12, sp, 16
|
|
l32i a13, sp, 20
|
|
l32i a14, sp, 24
|
|
l32i a15, sp, 28
|
|
addi sp, sp, 32
|
|
#endif
|
|
leaf_return
|
|
|
|
#if XCHAL_NO_MUL
|
|
|
|
/* For Xtensa processors with no multiply hardware, this simplified
|
|
version of _mulsi3 is used for multiplying 16-bit chunks of
|
|
the floating-point mantissas. When using CALL0, this function
|
|
uses a custom ABI: the inputs are passed in a13 and a14, the
|
|
result is returned in a12, and a8 and a15 are clobbered. */
|
|
.align 4
|
|
.Lmul_mulsi3:
|
|
leaf_entry sp, 16
|
|
.macro mul_mulsi3_body dst, src1, src2, tmp1, tmp2
|
|
movi \dst, 0
|
|
1: add \tmp1, \src2, \dst
|
|
extui \tmp2, \src1, 0, 1
|
|
movnez \dst, \tmp1, \tmp2
|
|
|
|
do_addx2 \tmp1, \src2, \dst, \tmp1
|
|
extui \tmp2, \src1, 1, 1
|
|
movnez \dst, \tmp1, \tmp2
|
|
|
|
do_addx4 \tmp1, \src2, \dst, \tmp1
|
|
extui \tmp2, \src1, 2, 1
|
|
movnez \dst, \tmp1, \tmp2
|
|
|
|
do_addx8 \tmp1, \src2, \dst, \tmp1
|
|
extui \tmp2, \src1, 3, 1
|
|
movnez \dst, \tmp1, \tmp2
|
|
|
|
srli \src1, \src1, 4
|
|
slli \src2, \src2, 4
|
|
bnez \src1, 1b
|
|
.endm
|
|
#if __XTENSA_CALL0_ABI__
|
|
mul_mulsi3_body a12, a13, a14, a15, a8
|
|
#else
|
|
/* The result will be written into a2, so save that argument in a4. */
|
|
mov a4, a2
|
|
mul_mulsi3_body a2, a4, a3, a5, a6
|
|
#endif
|
|
leaf_return
|
|
#endif /* XCHAL_NO_MUL */
|
|
|
|
.size __umulsidi3, . - __umulsidi3
|
|
|
|
#endif /* L_umulsidi3 */
|
|
|
|
|
|
/* Define a macro for the NSAU (unsigned normalize shift amount)
|
|
instruction, which computes the number of leading zero bits,
|
|
to handle cases where it is not included in the Xtensa processor
|
|
configuration. */
|
|
|
|
.macro do_nsau cnt, val, tmp, a
|
|
#if XCHAL_HAVE_NSA
|
|
nsau \cnt, \val
|
|
#else
|
|
mov \a, \val
|
|
movi \cnt, 0
|
|
extui \tmp, \a, 16, 16
|
|
bnez \tmp, 0f
|
|
movi \cnt, 16
|
|
slli \a, \a, 16
|
|
0:
|
|
extui \tmp, \a, 24, 8
|
|
bnez \tmp, 1f
|
|
addi \cnt, \cnt, 8
|
|
slli \a, \a, 8
|
|
1:
|
|
movi \tmp, __nsau_data
|
|
extui \a, \a, 24, 8
|
|
add \tmp, \tmp, \a
|
|
l8ui \tmp, \tmp, 0
|
|
add \cnt, \cnt, \tmp
|
|
#endif /* !XCHAL_HAVE_NSA */
|
|
.endm
|
|
|
|
#ifdef L_clz
|
|
.section .rodata
|
|
.align 4
|
|
.global __nsau_data
|
|
.type __nsau_data, @object
|
|
__nsau_data:
|
|
#if !XCHAL_HAVE_NSA
|
|
.byte 8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4
|
|
.byte 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3
|
|
.byte 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
|
|
.byte 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
|
|
.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
|
|
.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
|
|
.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
|
|
.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
|
|
.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
|
|
.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
|
|
.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
|
|
.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
|
|
.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
|
|
.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
|
|
.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
|
|
.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
|
|
#endif /* !XCHAL_HAVE_NSA */
|
|
.size __nsau_data, . - __nsau_data
|
|
.hidden __nsau_data
|
|
#endif /* L_clz */
|
|
|
|
|
|
#ifdef L_clzsi2
|
|
.align 4
|
|
.global __clzsi2
|
|
.type __clzsi2, @function
|
|
__clzsi2:
|
|
leaf_entry sp, 16
|
|
do_nsau a2, a2, a3, a4
|
|
leaf_return
|
|
.size __clzsi2, . - __clzsi2
|
|
|
|
#endif /* L_clzsi2 */
|
|
|
|
|
|
#ifdef L_ctzsi2
|
|
.align 4
|
|
.global __ctzsi2
|
|
.type __ctzsi2, @function
|
|
__ctzsi2:
|
|
leaf_entry sp, 16
|
|
neg a3, a2
|
|
and a3, a3, a2
|
|
do_nsau a2, a3, a4, a5
|
|
neg a2, a2
|
|
addi a2, a2, 31
|
|
leaf_return
|
|
.size __ctzsi2, . - __ctzsi2
|
|
|
|
#endif /* L_ctzsi2 */
|
|
|
|
|
|
#ifdef L_ffssi2
|
|
.align 4
|
|
.global __ffssi2
|
|
.type __ffssi2, @function
|
|
__ffssi2:
|
|
leaf_entry sp, 16
|
|
neg a3, a2
|
|
and a3, a3, a2
|
|
do_nsau a2, a3, a4, a5
|
|
neg a2, a2
|
|
addi a2, a2, 32
|
|
leaf_return
|
|
.size __ffssi2, . - __ffssi2
|
|
|
|
#endif /* L_ffssi2 */
|
|
|
|
|
|
#ifdef L_udivsi3
|
|
.align 4
|
|
.global __udivsi3
|
|
.type __udivsi3, @function
|
|
__udivsi3:
|
|
leaf_entry sp, 16
|
|
#if XCHAL_HAVE_DIV32
|
|
quou a2, a2, a3
|
|
#else
|
|
bltui a3, 2, .Lle_one /* check if the divisor <= 1 */
|
|
|
|
mov a6, a2 /* keep dividend in a6 */
|
|
do_nsau a5, a6, a2, a7 /* dividend_shift = nsau (dividend) */
|
|
do_nsau a4, a3, a2, a7 /* divisor_shift = nsau (divisor) */
|
|
bgeu a5, a4, .Lspecial
|
|
|
|
sub a4, a4, a5 /* count = divisor_shift - dividend_shift */
|
|
ssl a4
|
|
sll a3, a3 /* divisor <<= count */
|
|
movi a2, 0 /* quotient = 0 */
|
|
|
|
/* test-subtract-and-shift loop; one quotient bit on each iteration */
|
|
#if XCHAL_HAVE_LOOPS
|
|
loopnez a4, .Lloopend
|
|
#endif /* XCHAL_HAVE_LOOPS */
|
|
.Lloop:
|
|
bltu a6, a3, .Lzerobit
|
|
sub a6, a6, a3
|
|
addi a2, a2, 1
|
|
.Lzerobit:
|
|
slli a2, a2, 1
|
|
srli a3, a3, 1
|
|
#if !XCHAL_HAVE_LOOPS
|
|
addi a4, a4, -1
|
|
bnez a4, .Lloop
|
|
#endif /* !XCHAL_HAVE_LOOPS */
|
|
.Lloopend:
|
|
|
|
bltu a6, a3, .Lreturn
|
|
addi a2, a2, 1 /* increment quotient if dividend >= divisor */
|
|
.Lreturn:
|
|
leaf_return
|
|
|
|
.Lle_one:
|
|
beqz a3, .Lerror /* if divisor == 1, return the dividend */
|
|
leaf_return
|
|
|
|
.Lspecial:
|
|
/* return dividend >= divisor */
|
|
bltu a6, a3, .Lreturn0
|
|
movi a2, 1
|
|
leaf_return
|
|
|
|
.Lerror:
|
|
/* Divide by zero: Use an illegal instruction to force an exception.
|
|
The subsequent "DIV0" string can be recognized by the exception
|
|
handler to identify the real cause of the exception. */
|
|
ill
|
|
.ascii "DIV0"
|
|
|
|
.Lreturn0:
|
|
movi a2, 0
|
|
#endif /* XCHAL_HAVE_DIV32 */
|
|
leaf_return
|
|
.size __udivsi3, . - __udivsi3
|
|
|
|
#endif /* L_udivsi3 */
|
|
|
|
|
|
#ifdef L_divsi3
|
|
.align 4
|
|
.global __divsi3
|
|
.type __divsi3, @function
|
|
__divsi3:
|
|
leaf_entry sp, 16
|
|
#if XCHAL_HAVE_DIV32
|
|
quos a2, a2, a3
|
|
#else
|
|
xor a7, a2, a3 /* sign = dividend ^ divisor */
|
|
do_abs a6, a2, a4 /* udividend = abs (dividend) */
|
|
do_abs a3, a3, a4 /* udivisor = abs (divisor) */
|
|
bltui a3, 2, .Lle_one /* check if udivisor <= 1 */
|
|
do_nsau a5, a6, a2, a8 /* udividend_shift = nsau (udividend) */
|
|
do_nsau a4, a3, a2, a8 /* udivisor_shift = nsau (udivisor) */
|
|
bgeu a5, a4, .Lspecial
|
|
|
|
sub a4, a4, a5 /* count = udivisor_shift - udividend_shift */
|
|
ssl a4
|
|
sll a3, a3 /* udivisor <<= count */
|
|
movi a2, 0 /* quotient = 0 */
|
|
|
|
/* test-subtract-and-shift loop; one quotient bit on each iteration */
|
|
#if XCHAL_HAVE_LOOPS
|
|
loopnez a4, .Lloopend
|
|
#endif /* XCHAL_HAVE_LOOPS */
|
|
.Lloop:
|
|
bltu a6, a3, .Lzerobit
|
|
sub a6, a6, a3
|
|
addi a2, a2, 1
|
|
.Lzerobit:
|
|
slli a2, a2, 1
|
|
srli a3, a3, 1
|
|
#if !XCHAL_HAVE_LOOPS
|
|
addi a4, a4, -1
|
|
bnez a4, .Lloop
|
|
#endif /* !XCHAL_HAVE_LOOPS */
|
|
.Lloopend:
|
|
|
|
bltu a6, a3, .Lreturn
|
|
addi a2, a2, 1 /* increment if udividend >= udivisor */
|
|
.Lreturn:
|
|
neg a5, a2
|
|
movltz a2, a5, a7 /* return (sign < 0) ? -quotient : quotient */
|
|
leaf_return
|
|
|
|
.Lle_one:
|
|
beqz a3, .Lerror
|
|
neg a2, a6 /* if udivisor == 1, then return... */
|
|
movgez a2, a6, a7 /* (sign < 0) ? -udividend : udividend */
|
|
leaf_return
|
|
|
|
.Lspecial:
|
|
bltu a6, a3, .Lreturn0 /* if dividend < divisor, return 0 */
|
|
movi a2, 1
|
|
movi a4, -1
|
|
movltz a2, a4, a7 /* else return (sign < 0) ? -1 : 1 */
|
|
leaf_return
|
|
|
|
.Lerror:
|
|
/* Divide by zero: Use an illegal instruction to force an exception.
|
|
The subsequent "DIV0" string can be recognized by the exception
|
|
handler to identify the real cause of the exception. */
|
|
ill
|
|
.ascii "DIV0"
|
|
|
|
.Lreturn0:
|
|
movi a2, 0
|
|
#endif /* XCHAL_HAVE_DIV32 */
|
|
leaf_return
|
|
.size __divsi3, . - __divsi3
|
|
|
|
#endif /* L_divsi3 */
|
|
|
|
|
|
#ifdef L_umodsi3
|
|
.align 4
|
|
.global __umodsi3
|
|
.type __umodsi3, @function
|
|
__umodsi3:
|
|
leaf_entry sp, 16
|
|
#if XCHAL_HAVE_DIV32
|
|
remu a2, a2, a3
|
|
#else
|
|
bltui a3, 2, .Lle_one /* check if the divisor is <= 1 */
|
|
|
|
do_nsau a5, a2, a6, a7 /* dividend_shift = nsau (dividend) */
|
|
do_nsau a4, a3, a6, a7 /* divisor_shift = nsau (divisor) */
|
|
bgeu a5, a4, .Lspecial
|
|
|
|
sub a4, a4, a5 /* count = divisor_shift - dividend_shift */
|
|
ssl a4
|
|
sll a3, a3 /* divisor <<= count */
|
|
|
|
/* test-subtract-and-shift loop */
|
|
#if XCHAL_HAVE_LOOPS
|
|
loopnez a4, .Lloopend
|
|
#endif /* XCHAL_HAVE_LOOPS */
|
|
.Lloop:
|
|
bltu a2, a3, .Lzerobit
|
|
sub a2, a2, a3
|
|
.Lzerobit:
|
|
srli a3, a3, 1
|
|
#if !XCHAL_HAVE_LOOPS
|
|
addi a4, a4, -1
|
|
bnez a4, .Lloop
|
|
#endif /* !XCHAL_HAVE_LOOPS */
|
|
.Lloopend:
|
|
|
|
.Lspecial:
|
|
bltu a2, a3, .Lreturn
|
|
sub a2, a2, a3 /* subtract once more if dividend >= divisor */
|
|
.Lreturn:
|
|
leaf_return
|
|
|
|
.Lle_one:
|
|
bnez a3, .Lreturn0
|
|
|
|
/* Divide by zero: Use an illegal instruction to force an exception.
|
|
The subsequent "DIV0" string can be recognized by the exception
|
|
handler to identify the real cause of the exception. */
|
|
ill
|
|
.ascii "DIV0"
|
|
|
|
.Lreturn0:
|
|
movi a2, 0
|
|
#endif /* XCHAL_HAVE_DIV32 */
|
|
leaf_return
|
|
.size __umodsi3, . - __umodsi3
|
|
|
|
#endif /* L_umodsi3 */
|
|
|
|
|
|
#ifdef L_modsi3
|
|
.align 4
|
|
.global __modsi3
|
|
.type __modsi3, @function
|
|
__modsi3:
|
|
leaf_entry sp, 16
|
|
#if XCHAL_HAVE_DIV32
|
|
rems a2, a2, a3
|
|
#else
|
|
mov a7, a2 /* save original (signed) dividend */
|
|
do_abs a2, a2, a4 /* udividend = abs (dividend) */
|
|
do_abs a3, a3, a4 /* udivisor = abs (divisor) */
|
|
bltui a3, 2, .Lle_one /* check if udivisor <= 1 */
|
|
do_nsau a5, a2, a6, a8 /* udividend_shift = nsau (udividend) */
|
|
do_nsau a4, a3, a6, a8 /* udivisor_shift = nsau (udivisor) */
|
|
bgeu a5, a4, .Lspecial
|
|
|
|
sub a4, a4, a5 /* count = udivisor_shift - udividend_shift */
|
|
ssl a4
|
|
sll a3, a3 /* udivisor <<= count */
|
|
|
|
/* test-subtract-and-shift loop */
|
|
#if XCHAL_HAVE_LOOPS
|
|
loopnez a4, .Lloopend
|
|
#endif /* XCHAL_HAVE_LOOPS */
|
|
.Lloop:
|
|
bltu a2, a3, .Lzerobit
|
|
sub a2, a2, a3
|
|
.Lzerobit:
|
|
srli a3, a3, 1
|
|
#if !XCHAL_HAVE_LOOPS
|
|
addi a4, a4, -1
|
|
bnez a4, .Lloop
|
|
#endif /* !XCHAL_HAVE_LOOPS */
|
|
.Lloopend:
|
|
|
|
.Lspecial:
|
|
bltu a2, a3, .Lreturn
|
|
sub a2, a2, a3 /* subtract again if udividend >= udivisor */
|
|
.Lreturn:
|
|
bgez a7, .Lpositive
|
|
neg a2, a2 /* if (dividend < 0), return -udividend */
|
|
.Lpositive:
|
|
leaf_return
|
|
|
|
.Lle_one:
|
|
bnez a3, .Lreturn0
|
|
|
|
/* Divide by zero: Use an illegal instruction to force an exception.
|
|
The subsequent "DIV0" string can be recognized by the exception
|
|
handler to identify the real cause of the exception. */
|
|
ill
|
|
.ascii "DIV0"
|
|
|
|
.Lreturn0:
|
|
movi a2, 0
|
|
#endif /* XCHAL_HAVE_DIV32 */
|
|
leaf_return
|
|
.size __modsi3, . - __modsi3
|
|
|
|
#endif /* L_modsi3 */
|
|
|
|
|
|
#ifdef __XTENSA_EB__
|
|
#define uh a2
|
|
#define ul a3
|
|
#else
|
|
#define uh a3
|
|
#define ul a2
|
|
#endif /* __XTENSA_EB__ */
|
|
|
|
|
|
#ifdef L_ashldi3
|
|
.align 4
|
|
.global __ashldi3
|
|
.type __ashldi3, @function
|
|
__ashldi3:
|
|
leaf_entry sp, 16
|
|
ssl a4
|
|
bgei a4, 32, .Llow_only
|
|
src uh, uh, ul
|
|
sll ul, ul
|
|
leaf_return
|
|
|
|
.Llow_only:
|
|
sll uh, ul
|
|
movi ul, 0
|
|
leaf_return
|
|
.size __ashldi3, . - __ashldi3
|
|
|
|
#endif /* L_ashldi3 */
|
|
|
|
|
|
#ifdef L_ashrdi3
|
|
.align 4
|
|
.global __ashrdi3
|
|
.type __ashrdi3, @function
|
|
__ashrdi3:
|
|
leaf_entry sp, 16
|
|
ssr a4
|
|
bgei a4, 32, .Lhigh_only
|
|
src ul, uh, ul
|
|
sra uh, uh
|
|
leaf_return
|
|
|
|
.Lhigh_only:
|
|
sra ul, uh
|
|
srai uh, uh, 31
|
|
leaf_return
|
|
.size __ashrdi3, . - __ashrdi3
|
|
|
|
#endif /* L_ashrdi3 */
|
|
|
|
|
|
#ifdef L_lshrdi3
|
|
.align 4
|
|
.global __lshrdi3
|
|
.type __lshrdi3, @function
|
|
__lshrdi3:
|
|
leaf_entry sp, 16
|
|
ssr a4
|
|
bgei a4, 32, .Lhigh_only1
|
|
src ul, uh, ul
|
|
srl uh, uh
|
|
leaf_return
|
|
|
|
.Lhigh_only1:
|
|
srl ul, uh
|
|
movi uh, 0
|
|
leaf_return
|
|
.size __lshrdi3, . - __lshrdi3
|
|
|
|
#endif /* L_lshrdi3 */
|
|
|
|
|
|
#include "ieee754-df.S"
|
|
#include "ieee754-sf.S"
|