(feraiseexcept): Add delayed exception flushing, FE_UNDERFLOW is DBL_MIN/3.0,
FE_INEXACT is triggered by M_PI/69.69 converted to single precision.
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@ -22,6 +22,9 @@
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#include <float.h>
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#include <math.h>
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/* Please see section 10,
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page 10-5 "Delayed Trapping" in the PA-RISC 2.0 Architecture manual */
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int
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feraiseexcept (int excepts)
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{
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@ -33,56 +36,64 @@ feraiseexcept (int excepts)
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/* We do these bits in assembly to be certain GCC doesn't optimize
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away something important, and so we can force delayed traps to
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occur. */
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occur. */
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/* FIXME: These all need verification! */
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/* First: invalid exception. */
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/* We use "fldd 0(%%sr0,%%sp),%0" to flush the delayed exception */
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/* First: Invalid exception. */
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if (excepts & FE_INVALID)
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{
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/* One example of a invalid operation is 0 * Infinity. */
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double d = HUGE_VAL;
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__asm__ __volatile__ ("fmpy,dbl %1,%%fr0,%0\n\t"
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/* FIXME: is this a proper trap barrier? */
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"fcpy,dbl %%fr0,%%fr0" : "=f" (d) : "0" (d));
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__asm__ __volatile__ (
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" fcpy,dbl %%fr0,%%fr22\n"
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" fmpy,dbl %0,%%fr22,%0\n"
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" fldd 0(%%sr0,%%sp),%0"
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: "+f" (d) : : "%fr22" );
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}
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/* Next: division by zero. */
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/* Second: Division by zero. */
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if (excepts & FE_DIVBYZERO)
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{
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double d = 1.0;
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__asm__ __volatile__ ("fdiv,dbl %1,%%fr0,%0\n\t"
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"fcpy,dbl %%fr0,%%fr0" : "=f" (d) : "0" (d));
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__asm__ __volatile__ (
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" fcpy,dbl %%fr0,%%fr22\n"
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" fdiv,dbl %0,%%fr22,%0\n"
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" fldd 0(%%sr0,%%sp),%0"
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: "+f" (d) : : "%fr22" );
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}
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/* Next: overflow. */
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/* FIXME: Compare with IA-64 - do we have the same problem? */
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/* Third: Overflow. */
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if (excepts & FE_OVERFLOW)
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{
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double d = DBL_MAX;
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__asm__ __volatile__ ("fmpy,dbl %1,%1,%0\n\t"
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"fcpy,dbl %%fr0,%%fr0" : "=f" (d) : "0" (d));
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__asm__ __volatile__ (
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" fadd,dbl %0,%0,%0\n"
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" fldd 0(%%sr0,%%sp),%0"
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: "+f" (d) );
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}
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/* Next: underflow. */
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/* Fourth: Underflow. */
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if (excepts & FE_UNDERFLOW)
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{
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double d = DBL_MIN;
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double e = 69.69;
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__asm__ __volatile__ ("fdiv,dbl %1,%2,%0\n\t"
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"fcpy,dbl %%fr0,%%fr0" : "=f" (d) : "0" (d), "f" (e));
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double e = 3.0;
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__asm__ __volatile__ (
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" fdiv,dbl %0,%1,%0\n"
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" fldd 0(%%sr0,%%sp),%0"
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: "+f" (d) : "f" (e) );
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}
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/* Last: inexact. */
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/* Fifth: Inexact */
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if (excepts & FE_INEXACT)
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{
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double d = 1.0;
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double e = M_PI;
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__asm__ __volatile__ ("fdiv,dbl %1,%2,%0\n\t"
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"fcpy,dbl %%fr0,%%fr0" : "=f" (d) : "0" (d), "f" (e));
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double d = M_PI;
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double e = 69.69;
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__asm__ __volatile__ (
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" fdiv,dbl %0,%1,%%fr22\n"
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" fcnvfxt,dbl,sgl %%fr22,%%fr22L\n"
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" fldd 0(%%sr0,%%sp),%%fr22"
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: : "f" (d), "f" (e) : "%fr22" );
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}
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/* Success. */
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