powerpc: Fix encoding of POWER8 instruction
This patch adds a binary encoding for 'mtvsrd' instruction to avoid build failures when assembler does not support POWER8.
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@ -1,3 +1,8 @@
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2014-11-03 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
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* sysdeps/powerpc/powerpc64/power8/memset.S (MTVSRD_V1_R4): Encode
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mtvsrd instruction in binary form.
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2014-11-03 Andreas Schwab <schwab@suse.de>
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2014-11-03 Andreas Schwab <schwab@suse.de>
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[BZ #17522]
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[BZ #17522]
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@ -17,6 +17,13 @@
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<http://www.gnu.org/licenses/>. */
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#include <sysdep.h>
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#include <endian.h>
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#if __BYTE_ORDER == __LITTLE_ENDIAN
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#define MTVSRD_V1_R4 .byte 0x66,0x01,0x24,0x7c /* mtvsrd v1,r4 */
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#else
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#define MTVSRD_V1_R4 .byte 0x7c,0x24,0x01,0x66
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#endif
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/* __ptr_t [r3] memset (__ptr_t s [r3], int c [r4], size_t n [r5]));
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/* __ptr_t [r3] memset (__ptr_t s [r3], int c [r4], size_t n [r5]));
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Returns 's'. */
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Returns 's'. */
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@ -142,7 +149,7 @@ L(tail_bytes):
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vector instruction to achieve best throughput. */
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vector instruction to achieve best throughput. */
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L(huge_vector):
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L(huge_vector):
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/* Replicate set byte to quadword in VMX register. */
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/* Replicate set byte to quadword in VMX register. */
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mtvsrd v1,r4
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MTVSRD_V1_R4
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xxpermdi 32,v0,v1,0
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xxpermdi 32,v0,v1,0
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vspltb v2,v0,15
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vspltb v2,v0,15
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