Add _arch_/_cpu_ to index_*/bit_* in x86 cpu-features.h
index_* and bit_* macros are used to access cpuid and feature arrays o struct cpu_features. It is very easy to use bits and indices of cpuid array on feature array, especially in assembly codes. For example, sysdeps/i386/i686/multiarch/bcopy.S has HAS_CPU_FEATURE (Fast_Rep_String) which should be HAS_ARCH_FEATURE (Fast_Rep_String) We change index_* and bit_* to index_cpu_*/index_arch_* and bit_cpu_*/bit_arch_* so that we can catch such error at build time. [BZ #19762] * sysdeps/unix/sysv/linux/x86_64/64/dl-librecon.h (EXTRA_LD_ENVVARS): Add _arch_ to index_*/bit_*. * sysdeps/x86/cpu-features.c (init_cpu_features): Likewise. * sysdeps/x86/cpu-features.h (bit_*): Renamed to ... (bit_arch_*): This for feature array. (bit_*): Renamed to ... (bit_cpu_*): This for cpu array. (index_*): Renamed to ... (index_arch_*): This for feature array. (index_*): Renamed to ... (index_cpu_*): This for cpu array. [__ASSEMBLER__] (HAS_FEATURE): Add and use field. [__ASSEMBLER__] (HAS_CPU_FEATURE)): Pass cpu to HAS_FEATURE. [__ASSEMBLER__] (HAS_ARCH_FEATURE)): Pass arch to HAS_FEATURE. [!__ASSEMBLER__] (HAS_CPU_FEATURE): Replace index_##name and bit_##name with index_cpu_##name and bit_cpu_##name. [!__ASSEMBLER__] (HAS_ARCH_FEATURE): Replace index_##name and bit_##name with index_arch_##name and bit_arch_##name.
This commit is contained in:
H.J. Lu
parent
f8e9c4d30c
commit
6aa3e97e25
22
ChangeLog
22
ChangeLog
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@ -1,3 +1,25 @@
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2016-03-10 H.J. Lu <hongjiu.lu@intel.com>
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[BZ #19762]
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* sysdeps/unix/sysv/linux/x86_64/64/dl-librecon.h
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(EXTRA_LD_ENVVARS): Add _arch_ to index_*/bit_*.
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* sysdeps/x86/cpu-features.c (init_cpu_features): Likewise.
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* sysdeps/x86/cpu-features.h (bit_*): Renamed to ...
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(bit_arch_*): This for feature array.
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(bit_*): Renamed to ...
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(bit_cpu_*): This for cpu array.
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(index_*): Renamed to ...
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(index_arch_*): This for feature array.
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(index_*): Renamed to ...
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(index_cpu_*): This for cpu array.
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[__ASSEMBLER__] (HAS_FEATURE): Add and use field.
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[__ASSEMBLER__] (HAS_CPU_FEATURE)): Pass cpu to HAS_FEATURE.
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[__ASSEMBLER__] (HAS_ARCH_FEATURE)): Pass arch to HAS_FEATURE.
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[!__ASSEMBLER__] (HAS_CPU_FEATURE): Replace index_##name and
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bit_##name with index_cpu_##name and bit_cpu_##name.
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[!__ASSEMBLER__] (HAS_ARCH_FEATURE): Replace index_##name and
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bit_##name with index_arch_##name and bit_arch_##name.
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2016-03-09 Aurelien Jarno <aurelien@aurel32.net>
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[BZ #19792]
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@ -30,10 +30,10 @@
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is always disabled for SUID programs and can be enabled by setting
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environment variable, LD_PREFER_MAP_32BIT_EXEC. */
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#define EXTRA_LD_ENVVARS \
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case 21: \
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if (memcmp (envline, "PREFER_MAP_32BIT_EXEC", 21) == 0) \
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GLRO(dl_x86_cpu_features).feature[index_Prefer_MAP_32BIT_EXEC] \
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|= bit_Prefer_MAP_32BIT_EXEC; \
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case 21: \
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if (memcmp (envline, "PREFER_MAP_32BIT_EXEC", 21) == 0) \
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GLRO(dl_x86_cpu_features).feature[index_arch_Prefer_MAP_32BIT_EXEC] \
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|= bit_arch_Prefer_MAP_32BIT_EXEC; \
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break;
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/* Extra unsecure variables. The names are all stuffed in a single
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@ -75,13 +75,14 @@ init_cpu_features (struct cpu_features *cpu_features)
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case 0x1c:
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case 0x26:
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/* BSF is slow on Atom. */
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cpu_features->feature[index_Slow_BSF] |= bit_Slow_BSF;
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cpu_features->feature[index_arch_Slow_BSF]
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|= bit_arch_Slow_BSF;
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break;
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case 0x57:
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/* Knights Landing. Enable Silvermont optimizations. */
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cpu_features->feature[index_Prefer_No_VZEROUPPER]
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|= bit_Prefer_No_VZEROUPPER;
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cpu_features->feature[index_arch_Prefer_No_VZEROUPPER]
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|= bit_arch_Prefer_No_VZEROUPPER;
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case 0x37:
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case 0x4a:
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@ -90,22 +91,22 @@ init_cpu_features (struct cpu_features *cpu_features)
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case 0x5d:
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/* Unaligned load versions are faster than SSSE3
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on Silvermont. */
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#if index_Fast_Unaligned_Load != index_Prefer_PMINUB_for_stringop
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# error index_Fast_Unaligned_Load != index_Prefer_PMINUB_for_stringop
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#if index_arch_Fast_Unaligned_Load != index_arch_Prefer_PMINUB_for_stringop
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# error index_arch_Fast_Unaligned_Load != index_arch_Prefer_PMINUB_for_stringop
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#endif
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#if index_Fast_Unaligned_Load != index_Slow_SSE4_2
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# error index_Fast_Unaligned_Load != index_Slow_SSE4_2
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#if index_arch_Fast_Unaligned_Load != index_arch_Slow_SSE4_2
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# error index_arch_Fast_Unaligned_Load != index_arch_Slow_SSE4_2
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#endif
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cpu_features->feature[index_Fast_Unaligned_Load]
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|= (bit_Fast_Unaligned_Load
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| bit_Prefer_PMINUB_for_stringop
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| bit_Slow_SSE4_2);
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cpu_features->feature[index_arch_Fast_Unaligned_Load]
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|= (bit_arch_Fast_Unaligned_Load
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| bit_arch_Prefer_PMINUB_for_stringop
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| bit_arch_Slow_SSE4_2);
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break;
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default:
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/* Unknown family 0x06 processors. Assuming this is one
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of Core i3/i5/i7 processors if AVX is available. */
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if ((ecx & bit_AVX) == 0)
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if ((ecx & bit_cpu_AVX) == 0)
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break;
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case 0x1a:
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@ -117,20 +118,20 @@ init_cpu_features (struct cpu_features *cpu_features)
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case 0x2f:
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/* Rep string instructions, copy backward, unaligned loads
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and pminub are fast on Intel Core i3, i5 and i7. */
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#if index_Fast_Rep_String != index_Fast_Copy_Backward
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# error index_Fast_Rep_String != index_Fast_Copy_Backward
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#if index_arch_Fast_Rep_String != index_arch_Fast_Copy_Backward
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# error index_arch_Fast_Rep_String != index_arch_Fast_Copy_Backward
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#endif
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#if index_Fast_Rep_String != index_Fast_Unaligned_Load
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# error index_Fast_Rep_String != index_Fast_Unaligned_Load
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#if index_arch_Fast_Rep_String != index_arch_Fast_Unaligned_Load
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# error index_arch_Fast_Rep_String != index_arch_Fast_Unaligned_Load
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#endif
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#if index_Fast_Rep_String != index_Prefer_PMINUB_for_stringop
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# error index_Fast_Rep_String != index_Prefer_PMINUB_for_stringop
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#if index_arch_Fast_Rep_String != index_arch_Prefer_PMINUB_for_stringop
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# error index_arch_Fast_Rep_String != index_arch_Prefer_PMINUB_for_stringop
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#endif
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cpu_features->feature[index_Fast_Rep_String]
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|= (bit_Fast_Rep_String
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| bit_Fast_Copy_Backward
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| bit_Fast_Unaligned_Load
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| bit_Prefer_PMINUB_for_stringop);
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cpu_features->feature[index_arch_Fast_Rep_String]
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|= (bit_arch_Fast_Rep_String
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| bit_arch_Fast_Copy_Backward
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| bit_arch_Fast_Unaligned_Load
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| bit_arch_Prefer_PMINUB_for_stringop);
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break;
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}
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}
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@ -159,8 +160,8 @@ init_cpu_features (struct cpu_features *cpu_features)
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{
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/* "Excavator" */
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if (model >= 0x60 && model <= 0x7f)
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cpu_features->feature[index_Fast_Unaligned_Load]
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|= bit_Fast_Unaligned_Load;
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cpu_features->feature[index_arch_Fast_Unaligned_Load]
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|= bit_arch_Fast_Unaligned_Load;
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}
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}
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else
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@ -168,11 +169,11 @@ init_cpu_features (struct cpu_features *cpu_features)
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/* Support i586 if CX8 is available. */
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if (HAS_CPU_FEATURE (CX8))
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cpu_features->feature[index_I586] |= bit_I586;
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cpu_features->feature[index_arch_I586] |= bit_arch_I586;
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/* Support i686 if CMOV is available. */
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if (HAS_CPU_FEATURE (CMOV))
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cpu_features->feature[index_I686] |= bit_I686;
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cpu_features->feature[index_arch_I686] |= bit_arch_I686;
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if (cpu_features->max_cpuid >= 7)
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__cpuid_count (7, 0,
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@ -193,15 +194,16 @@ init_cpu_features (struct cpu_features *cpu_features)
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{
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/* Determine if AVX is usable. */
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if (HAS_CPU_FEATURE (AVX))
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cpu_features->feature[index_AVX_Usable] |= bit_AVX_Usable;
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#if index_AVX2_Usable != index_AVX_Fast_Unaligned_Load
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# error index_AVX2_Usable != index_AVX_Fast_Unaligned_Load
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cpu_features->feature[index_arch_AVX_Usable]
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|= bit_arch_AVX_Usable;
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#if index_arch_AVX2_Usable != index_arch_AVX_Fast_Unaligned_Load
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# error index_arch_AVX2_Usable != index_arch_AVX_Fast_Unaligned_Load
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#endif
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/* Determine if AVX2 is usable. Unaligned load with 256-bit
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AVX registers are faster on processors with AVX2. */
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if (HAS_CPU_FEATURE (AVX2))
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cpu_features->feature[index_AVX2_Usable]
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|= bit_AVX2_Usable | bit_AVX_Fast_Unaligned_Load;
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cpu_features->feature[index_arch_AVX2_Usable]
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|= bit_arch_AVX2_Usable | bit_arch_AVX_Fast_Unaligned_Load;
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/* Check if OPMASK state, upper 256-bit of ZMM0-ZMM15 and
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ZMM16-ZMM31 state are enabled. */
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if ((xcrlow & (bit_Opmask_state | bit_ZMM0_15_state
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@ -211,20 +213,22 @@ init_cpu_features (struct cpu_features *cpu_features)
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/* Determine if AVX512F is usable. */
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if (HAS_CPU_FEATURE (AVX512F))
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{
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cpu_features->feature[index_AVX512F_Usable]
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|= bit_AVX512F_Usable;
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cpu_features->feature[index_arch_AVX512F_Usable]
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|= bit_arch_AVX512F_Usable;
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/* Determine if AVX512DQ is usable. */
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if (HAS_CPU_FEATURE (AVX512DQ))
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cpu_features->feature[index_AVX512DQ_Usable]
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|= bit_AVX512DQ_Usable;
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cpu_features->feature[index_arch_AVX512DQ_Usable]
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|= bit_arch_AVX512DQ_Usable;
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}
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}
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/* Determine if FMA is usable. */
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if (HAS_CPU_FEATURE (FMA))
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cpu_features->feature[index_FMA_Usable] |= bit_FMA_Usable;
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cpu_features->feature[index_arch_FMA_Usable]
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|= bit_arch_FMA_Usable;
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/* Determine if FMA4 is usable. */
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if (HAS_CPU_FEATURE (FMA4))
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cpu_features->feature[index_FMA4_Usable] |= bit_FMA4_Usable;
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cpu_features->feature[index_arch_FMA4_Usable]
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|= bit_arch_FMA4_Usable;
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}
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}
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@ -18,48 +18,48 @@
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#ifndef cpu_features_h
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#define cpu_features_h
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#define bit_Fast_Rep_String (1 << 0)
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#define bit_Fast_Copy_Backward (1 << 1)
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#define bit_Slow_BSF (1 << 2)
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#define bit_Fast_Unaligned_Load (1 << 4)
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#define bit_Prefer_PMINUB_for_stringop (1 << 5)
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#define bit_AVX_Usable (1 << 6)
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#define bit_FMA_Usable (1 << 7)
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#define bit_FMA4_Usable (1 << 8)
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#define bit_Slow_SSE4_2 (1 << 9)
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#define bit_AVX2_Usable (1 << 10)
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#define bit_AVX_Fast_Unaligned_Load (1 << 11)
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#define bit_AVX512F_Usable (1 << 12)
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#define bit_AVX512DQ_Usable (1 << 13)
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#define bit_I586 (1 << 14)
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#define bit_I686 (1 << 15)
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#define bit_Prefer_MAP_32BIT_EXEC (1 << 16)
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#define bit_Prefer_No_VZEROUPPER (1 << 17)
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#define bit_arch_Fast_Rep_String (1 << 0)
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#define bit_arch_Fast_Copy_Backward (1 << 1)
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#define bit_arch_Slow_BSF (1 << 2)
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#define bit_arch_Fast_Unaligned_Load (1 << 4)
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#define bit_arch_Prefer_PMINUB_for_stringop (1 << 5)
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#define bit_arch_AVX_Usable (1 << 6)
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#define bit_arch_FMA_Usable (1 << 7)
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#define bit_arch_FMA4_Usable (1 << 8)
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#define bit_arch_Slow_SSE4_2 (1 << 9)
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#define bit_arch_AVX2_Usable (1 << 10)
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#define bit_arch_AVX_Fast_Unaligned_Load (1 << 11)
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#define bit_arch_AVX512F_Usable (1 << 12)
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#define bit_arch_AVX512DQ_Usable (1 << 13)
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#define bit_arch_I586 (1 << 14)
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#define bit_arch_I686 (1 << 15)
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#define bit_arch_Prefer_MAP_32BIT_EXEC (1 << 16)
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#define bit_arch_Prefer_No_VZEROUPPER (1 << 17)
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/* CPUID Feature flags. */
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/* COMMON_CPUID_INDEX_1. */
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#define bit_CX8 (1 << 8)
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#define bit_CMOV (1 << 15)
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#define bit_SSE2 (1 << 26)
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#define bit_SSSE3 (1 << 9)
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#define bit_SSE4_1 (1 << 19)
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#define bit_SSE4_2 (1 << 20)
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#define bit_OSXSAVE (1 << 27)
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#define bit_AVX (1 << 28)
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#define bit_POPCOUNT (1 << 23)
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#define bit_FMA (1 << 12)
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#define bit_FMA4 (1 << 16)
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#define bit_cpu_CX8 (1 << 8)
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#define bit_cpu_CMOV (1 << 15)
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#define bit_cpu_SSE2 (1 << 26)
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#define bit_cpu_SSSE3 (1 << 9)
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#define bit_cpu_SSE4_1 (1 << 19)
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#define bit_cpu_SSE4_2 (1 << 20)
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#define bit_cpu_OSXSAVE (1 << 27)
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#define bit_cpu_AVX (1 << 28)
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#define bit_cpu_POPCOUNT (1 << 23)
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#define bit_cpu_FMA (1 << 12)
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#define bit_cpu_FMA4 (1 << 16)
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/* COMMON_CPUID_INDEX_7. */
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#define bit_RTM (1 << 11)
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#define bit_AVX2 (1 << 5)
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#define bit_AVX512F (1 << 16)
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#define bit_AVX512DQ (1 << 17)
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#define bit_cpu_RTM (1 << 11)
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#define bit_cpu_AVX2 (1 << 5)
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#define bit_cpu_AVX512F (1 << 16)
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#define bit_cpu_AVX512DQ (1 << 17)
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/* XCR0 Feature flags. */
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#define bit_XMM_state (1 << 1)
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#define bit_YMM_state (2 << 1)
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#define bit_XMM_state (1 << 1)
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#define bit_YMM_state (2 << 1)
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#define bit_Opmask_state (1 << 5)
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#define bit_ZMM0_15_state (1 << 6)
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#define bit_ZMM16_31_state (1 << 7)
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@ -75,32 +75,32 @@
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# include <ifunc-defines.h>
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# include <rtld-global-offsets.h>
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# define index_CX8 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_EDX_OFFSET
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# define index_CMOV COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_EDX_OFFSET
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# define index_SSE2 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_EDX_OFFSET
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# define index_SSSE3 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
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# define index_SSE4_1 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
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# define index_SSE4_2 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
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# define index_AVX COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
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# define index_AVX2 COMMON_CPUID_INDEX_7*CPUID_SIZE+CPUID_EBX_OFFSET
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# define index_cpu_CX8 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_EDX_OFFSET
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# define index_cpu_CMOV COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_EDX_OFFSET
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# define index_cpu_SSE2 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_EDX_OFFSET
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# define index_cpu_SSSE3 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
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# define index_cpu_SSE4_1 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
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# define index_cpu_SSE4_2 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
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# define index_cpu_AVX COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
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# define index_cpu_AVX2 COMMON_CPUID_INDEX_7*CPUID_SIZE+CPUID_EBX_OFFSET
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# define index_Fast_Rep_String FEATURE_INDEX_1*FEATURE_SIZE
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# define index_Fast_Copy_Backward FEATURE_INDEX_1*FEATURE_SIZE
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# define index_Slow_BSF FEATURE_INDEX_1*FEATURE_SIZE
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# define index_Fast_Unaligned_Load FEATURE_INDEX_1*FEATURE_SIZE
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# define index_Prefer_PMINUB_for_stringop FEATURE_INDEX_1*FEATURE_SIZE
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# define index_AVX_Usable FEATURE_INDEX_1*FEATURE_SIZE
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# define index_FMA_Usable FEATURE_INDEX_1*FEATURE_SIZE
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# define index_FMA4_Usable FEATURE_INDEX_1*FEATURE_SIZE
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# define index_Slow_SSE4_2 FEATURE_INDEX_1*FEATURE_SIZE
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# define index_AVX2_Usable FEATURE_INDEX_1*FEATURE_SIZE
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# define index_AVX_Fast_Unaligned_Load FEATURE_INDEX_1*FEATURE_SIZE
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# define index_AVX512F_Usable FEATURE_INDEX_1*FEATURE_SIZE
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# define index_AVX512DQ_Usable FEATURE_INDEX_1*FEATURE_SIZE
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# define index_I586 FEATURE_INDEX_1*FEATURE_SIZE
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# define index_I686 FEATURE_INDEX_1*FEATURE_SIZE
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# define index_Prefer_MAP_32BIT_EXEC FEATURE_INDEX_1*FEATURE_SIZE
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# define index_Prefer_No_VZEROUPPER FEATURE_INDEX_1*FEATURE_SIZE
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# define index_arch_Fast_Rep_String FEATURE_INDEX_1*FEATURE_SIZE
|
||||
# define index_arch_Fast_Copy_Backward FEATURE_INDEX_1*FEATURE_SIZE
|
||||
# define index_arch_Slow_BSF FEATURE_INDEX_1*FEATURE_SIZE
|
||||
# define index_arch_Fast_Unaligned_Load FEATURE_INDEX_1*FEATURE_SIZE
|
||||
# define index_arch_Prefer_PMINUB_for_stringop FEATURE_INDEX_1*FEATURE_SIZE
|
||||
# define index_arch_AVX_Usable FEATURE_INDEX_1*FEATURE_SIZE
|
||||
# define index_arch_FMA_Usable FEATURE_INDEX_1*FEATURE_SIZE
|
||||
# define index_arch_FMA4_Usable FEATURE_INDEX_1*FEATURE_SIZE
|
||||
# define index_arch_Slow_SSE4_2 FEATURE_INDEX_1*FEATURE_SIZE
|
||||
# define index_arch_AVX2_Usable FEATURE_INDEX_1*FEATURE_SIZE
|
||||
# define index_arch_AVX_Fast_Unaligned_Load FEATURE_INDEX_1*FEATURE_SIZE
|
||||
# define index_arch_AVX512F_Usable FEATURE_INDEX_1*FEATURE_SIZE
|
||||
# define index_arch_AVX512DQ_Usable FEATURE_INDEX_1*FEATURE_SIZE
|
||||
# define index_arch_I586 FEATURE_INDEX_1*FEATURE_SIZE
|
||||
# define index_arch_I686 FEATURE_INDEX_1*FEATURE_SIZE
|
||||
# define index_arch_Prefer_MAP_32BIT_EXEC FEATURE_INDEX_1*FEATURE_SIZE
|
||||
# define index_arch_Prefer_No_VZEROUPPER FEATURE_INDEX_1*FEATURE_SIZE
|
||||
|
||||
|
||||
# if defined (_LIBC) && !IS_IN (nonlib)
|
||||
|
|
@ -108,19 +108,21 @@
|
|||
# ifdef SHARED
|
||||
# if IS_IN (rtld)
|
||||
# define LOAD_RTLD_GLOBAL_RO_RDX
|
||||
# define HAS_FEATURE(offset, name) \
|
||||
testl $(bit_##name), _rtld_local_ro+offset+(index_##name)(%rip)
|
||||
# define HAS_FEATURE(offset, field, name) \
|
||||
testl $(bit_##field##_##name), \
|
||||
_rtld_local_ro+offset+(index_##field##_##name)(%rip)
|
||||
# else
|
||||
# define LOAD_RTLD_GLOBAL_RO_RDX \
|
||||
mov _rtld_global_ro@GOTPCREL(%rip), %RDX_LP
|
||||
# define HAS_FEATURE(offset, name) \
|
||||
testl $(bit_##name), \
|
||||
RTLD_GLOBAL_RO_DL_X86_CPU_FEATURES_OFFSET+offset+(index_##name)(%rdx)
|
||||
# define HAS_FEATURE(offset, field, name) \
|
||||
testl $(bit_##field##_##name), \
|
||||
RTLD_GLOBAL_RO_DL_X86_CPU_FEATURES_OFFSET+offset+(index_##field##_##name)(%rdx)
|
||||
# endif
|
||||
# else /* SHARED */
|
||||
# define LOAD_RTLD_GLOBAL_RO_RDX
|
||||
# define HAS_FEATURE(offset, name) \
|
||||
testl $(bit_##name), _dl_x86_cpu_features+offset+(index_##name)(%rip)
|
||||
# define HAS_FEATURE(offset, field, name) \
|
||||
testl $(bit_##field##_##name), \
|
||||
_dl_x86_cpu_features+offset+(index_##field##_##name)(%rip)
|
||||
# endif /* !SHARED */
|
||||
# else /* __x86_64__ */
|
||||
# ifdef SHARED
|
||||
|
|
@ -129,22 +131,24 @@
|
|||
# if IS_IN (rtld)
|
||||
# define LOAD_GOT_AND_RTLD_GLOBAL_RO \
|
||||
LOAD_PIC_REG(dx)
|
||||
# define HAS_FEATURE(offset, name) \
|
||||
testl $(bit_##name), offset+(index_##name)+_rtld_local_ro@GOTOFF(%edx)
|
||||
# define HAS_FEATURE(offset, field, name) \
|
||||
testl $(bit_##field##_##name), \
|
||||
offset+(index_##field##_##name)+_rtld_local_ro@GOTOFF(%edx)
|
||||
# else
|
||||
# define LOAD_GOT_AND_RTLD_GLOBAL_RO \
|
||||
LOAD_PIC_REG(dx); \
|
||||
mov _rtld_global_ro@GOT(%edx), %ecx
|
||||
# define HAS_FEATURE(offset, name) \
|
||||
testl $(bit_##name), \
|
||||
RTLD_GLOBAL_RO_DL_X86_CPU_FEATURES_OFFSET+offset+(index_##name)(%ecx)
|
||||
# define HAS_FEATURE(offset, field, name) \
|
||||
testl $(bit_##field##_##name), \
|
||||
RTLD_GLOBAL_RO_DL_X86_CPU_FEATURES_OFFSET+offset+(index_##field##_##name)(%ecx)
|
||||
# endif
|
||||
# else /* SHARED */
|
||||
# define LOAD_FUNC_GOT_EAX(func) \
|
||||
leal func, %eax
|
||||
# define LOAD_GOT_AND_RTLD_GLOBAL_RO
|
||||
# define HAS_FEATURE(offset, name) \
|
||||
testl $(bit_##name), _dl_x86_cpu_features+offset+(index_##name)
|
||||
# define HAS_FEATURE(offset, field, name) \
|
||||
testl $(bit_##field##_##name), \
|
||||
_dl_x86_cpu_features+offset+(index_##field##_##name)
|
||||
# endif /* !SHARED */
|
||||
# endif /* !__x86_64__ */
|
||||
# else /* _LIBC && !nonlib */
|
||||
|
|
@ -152,8 +156,8 @@
|
|||
# endif /* !_LIBC || nonlib */
|
||||
|
||||
/* HAS_* evaluates to true if we may use the feature at runtime. */
|
||||
# define HAS_CPU_FEATURE(name) HAS_FEATURE (CPUID_OFFSET, name)
|
||||
# define HAS_ARCH_FEATURE(name) HAS_FEATURE (FEATURE_OFFSET, name)
|
||||
# define HAS_CPU_FEATURE(name) HAS_FEATURE (CPUID_OFFSET, cpu, name)
|
||||
# define HAS_ARCH_FEATURE(name) HAS_FEATURE (FEATURE_OFFSET, arch, name)
|
||||
|
||||
#else /* __ASSEMBLER__ */
|
||||
|
||||
|
|
@ -202,25 +206,25 @@ extern const struct cpu_features *__get_cpu_features (void)
|
|||
|
||||
/* HAS_* evaluates to true if we may use the feature at runtime. */
|
||||
# define HAS_CPU_FEATURE(name) \
|
||||
((__get_cpu_features ()->cpuid[index_##name].reg_##name & (bit_##name)) != 0)
|
||||
((__get_cpu_features ()->cpuid[index_cpu_##name].reg_##name & (bit_cpu_##name)) != 0)
|
||||
# define HAS_ARCH_FEATURE(name) \
|
||||
((__get_cpu_features ()->feature[index_##name] & (bit_##name)) != 0)
|
||||
((__get_cpu_features ()->feature[index_arch_##name] & (bit_arch_##name)) != 0)
|
||||
|
||||
# define index_CX8 COMMON_CPUID_INDEX_1
|
||||
# define index_CMOV COMMON_CPUID_INDEX_1
|
||||
# define index_SSE2 COMMON_CPUID_INDEX_1
|
||||
# define index_SSSE3 COMMON_CPUID_INDEX_1
|
||||
# define index_SSE4_1 COMMON_CPUID_INDEX_1
|
||||
# define index_SSE4_2 COMMON_CPUID_INDEX_1
|
||||
# define index_AVX COMMON_CPUID_INDEX_1
|
||||
# define index_AVX2 COMMON_CPUID_INDEX_7
|
||||
# define index_AVX512F COMMON_CPUID_INDEX_7
|
||||
# define index_AVX512DQ COMMON_CPUID_INDEX_7
|
||||
# define index_RTM COMMON_CPUID_INDEX_7
|
||||
# define index_FMA COMMON_CPUID_INDEX_1
|
||||
# define index_FMA4 COMMON_CPUID_INDEX_80000001
|
||||
# define index_POPCOUNT COMMON_CPUID_INDEX_1
|
||||
# define index_OSXSAVE COMMON_CPUID_INDEX_1
|
||||
# define index_cpu_CX8 COMMON_CPUID_INDEX_1
|
||||
# define index_cpu_CMOV COMMON_CPUID_INDEX_1
|
||||
# define index_cpu_SSE2 COMMON_CPUID_INDEX_1
|
||||
# define index_cpu_SSSE3 COMMON_CPUID_INDEX_1
|
||||
# define index_cpu_SSE4_1 COMMON_CPUID_INDEX_1
|
||||
# define index_cpu_SSE4_2 COMMON_CPUID_INDEX_1
|
||||
# define index_cpu_AVX COMMON_CPUID_INDEX_1
|
||||
# define index_cpu_AVX2 COMMON_CPUID_INDEX_7
|
||||
# define index_cpu_AVX512F COMMON_CPUID_INDEX_7
|
||||
# define index_cpu_AVX512DQ COMMON_CPUID_INDEX_7
|
||||
# define index_cpu_RTM COMMON_CPUID_INDEX_7
|
||||
# define index_cpu_FMA COMMON_CPUID_INDEX_1
|
||||
# define index_cpu_FMA4 COMMON_CPUID_INDEX_80000001
|
||||
# define index_cpu_POPCOUNT COMMON_CPUID_INDEX_1
|
||||
# define index_cpu_OSXSAVE COMMON_CPUID_INDEX_1
|
||||
|
||||
# define reg_CX8 edx
|
||||
# define reg_CMOV edx
|
||||
|
|
@ -238,23 +242,23 @@ extern const struct cpu_features *__get_cpu_features (void)
|
|||
# define reg_POPCOUNT ecx
|
||||
# define reg_OSXSAVE ecx
|
||||
|
||||
# define index_Fast_Rep_String FEATURE_INDEX_1
|
||||
# define index_Fast_Copy_Backward FEATURE_INDEX_1
|
||||
# define index_Slow_BSF FEATURE_INDEX_1
|
||||
# define index_Fast_Unaligned_Load FEATURE_INDEX_1
|
||||
# define index_Prefer_PMINUB_for_stringop FEATURE_INDEX_1
|
||||
# define index_AVX_Usable FEATURE_INDEX_1
|
||||
# define index_FMA_Usable FEATURE_INDEX_1
|
||||
# define index_FMA4_Usable FEATURE_INDEX_1
|
||||
# define index_Slow_SSE4_2 FEATURE_INDEX_1
|
||||
# define index_AVX2_Usable FEATURE_INDEX_1
|
||||
# define index_AVX_Fast_Unaligned_Load FEATURE_INDEX_1
|
||||
# define index_AVX512F_Usable FEATURE_INDEX_1
|
||||
# define index_AVX512DQ_Usable FEATURE_INDEX_1
|
||||
# define index_I586 FEATURE_INDEX_1
|
||||
# define index_I686 FEATURE_INDEX_1
|
||||
# define index_Prefer_MAP_32BIT_EXEC FEATURE_INDEX_1
|
||||
# define index_Prefer_No_VZEROUPPER FEATURE_INDEX_1
|
||||
# define index_arch_Fast_Rep_String FEATURE_INDEX_1
|
||||
# define index_arch_Fast_Copy_Backward FEATURE_INDEX_1
|
||||
# define index_arch_Slow_BSF FEATURE_INDEX_1
|
||||
# define index_arch_Fast_Unaligned_Load FEATURE_INDEX_1
|
||||
# define index_arch_Prefer_PMINUB_for_stringop FEATURE_INDEX_1
|
||||
# define index_arch_AVX_Usable FEATURE_INDEX_1
|
||||
# define index_arch_FMA_Usable FEATURE_INDEX_1
|
||||
# define index_arch_FMA4_Usable FEATURE_INDEX_1
|
||||
# define index_arch_Slow_SSE4_2 FEATURE_INDEX_1
|
||||
# define index_arch_AVX2_Usable FEATURE_INDEX_1
|
||||
# define index_arch_AVX_Fast_Unaligned_Load FEATURE_INDEX_1
|
||||
# define index_arch_AVX512F_Usable FEATURE_INDEX_1
|
||||
# define index_arch_AVX512DQ_Usable FEATURE_INDEX_1
|
||||
# define index_arch_I586 FEATURE_INDEX_1
|
||||
# define index_arch_I686 FEATURE_INDEX_1
|
||||
# define index_arch_Prefer_MAP_32BIT_EXEC FEATURE_INDEX_1
|
||||
# define index_arch_Prefer_No_VZEROUPPER FEATURE_INDEX_1
|
||||
|
||||
#endif /* !__ASSEMBLER__ */
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue