Update.
* sysdeps/powerpc/powerpc32/dl-trampoline.S (_dl_prof_resolve): Extend _dl_prof_resolve to add pass extra parameters to _dl_profile_fixup and set up structure with register content.
This commit is contained in:
Ulrich Drepper
parent
2413fdba7a
commit
85555eeb7b
|
|
@ -1,5 +1,9 @@
|
|||
2005-01-07 Ulrich Drepper <drepper@redhat.com>
|
||||
|
||||
* sysdeps/powerpc/powerpc32/dl-trampoline.S (_dl_prof_resolve):
|
||||
Extend _dl_prof_resolve to add pass extra parameters to
|
||||
_dl_profile_fixup and set up structure with register content.
|
||||
|
||||
* sysdeps/powerpc/powerpc64/dl-trampoline.S: Use register names.
|
||||
|
||||
* sysdeps/powerpc/powerpc32/dl-trampoline.S: New file.
|
||||
|
|
|
|||
|
|
@ -26,43 +26,43 @@
|
|||
_dl_runtime_resolve:
|
||||
# We need to save the registers used to pass parameters, and register 0,
|
||||
# which is used by _mcount; the registers are saved in a stack frame.
|
||||
stwu 1,-64(1)
|
||||
stw 0,12(1)
|
||||
stw 3,16(1)
|
||||
stw 4,20(1)
|
||||
stwu r1,-64(r1)
|
||||
stw r0,12(r1)
|
||||
stw r3,16(r1)
|
||||
stw r4,20(r1)
|
||||
# The code that calls this has put parameters for `fixup' in r12 and r11.
|
||||
mr 3,12
|
||||
stw 5,24(1)
|
||||
mr 4,11
|
||||
stw 6,28(1)
|
||||
mflr 0
|
||||
mr r3,r12
|
||||
stw r5,24(r1)
|
||||
mr r4,r11
|
||||
stw r6,28(r1)
|
||||
mflr r0
|
||||
# We also need to save some of the condition register fields
|
||||
stw 7,32(1)
|
||||
stw 0,48(1)
|
||||
stw 8,36(1)
|
||||
mfcr 0
|
||||
stw 9,40(1)
|
||||
stw 10,44(1)
|
||||
stw 0,8(1)
|
||||
stw r7,32(r1)
|
||||
stw r0,48(r1)
|
||||
stw r8,36(r1)
|
||||
mfcr r0
|
||||
stw r9,40(r1)
|
||||
stw r10,44(r1)
|
||||
stw r0,8(r1)
|
||||
bl _dl_fixup@local
|
||||
# 'fixup' returns the address we want to branch to.
|
||||
mtctr 3
|
||||
mtctr r3
|
||||
# Put the registers back...
|
||||
lwz 0,48(1)
|
||||
lwz 10,44(1)
|
||||
lwz 9,40(1)
|
||||
mtlr 0
|
||||
lwz 8,36(1)
|
||||
lwz 0,8(1)
|
||||
lwz 7,32(1)
|
||||
lwz 6,28(1)
|
||||
mtcrf 0xFF,0
|
||||
lwz 5,24(1)
|
||||
lwz 4,20(1)
|
||||
lwz 3,16(1)
|
||||
lwz 0,12(1)
|
||||
lwz r0,48(r1)
|
||||
lwz r10,44(r1)
|
||||
lwz r9,40(r1)
|
||||
mtlr r0
|
||||
lwz r8,36(r1)
|
||||
lwz r0,8(r1)
|
||||
lwz r7,32(r1)
|
||||
lwz r6,28(r1)
|
||||
mtcrf 0xFF,r0
|
||||
lwz r5,24(r1)
|
||||
lwz r4,20(r1)
|
||||
lwz r3,16(r1)
|
||||
lwz r0,12(r1)
|
||||
# ...unwind the stack frame, and jump to the PLT entry we updated.
|
||||
addi 1,1,64
|
||||
addi r1,r1,64
|
||||
bctr
|
||||
.size _dl_runtime_resolve,.-_dl_runtime_resolve
|
||||
|
||||
|
|
@ -72,42 +72,103 @@ _dl_runtime_resolve:
|
|||
_dl_prof_resolve:
|
||||
# We need to save the registers used to pass parameters, and register 0,
|
||||
# which is used by _mcount; the registers are saved in a stack frame.
|
||||
stwu 1,-64(1)
|
||||
stw 0,12(1)
|
||||
stw 3,16(1)
|
||||
stw 4,20(1)
|
||||
stwu r1,-320(r1)
|
||||
/* Stack layout:
|
||||
|
||||
+312 stackframe
|
||||
+308 lr
|
||||
+304 r1
|
||||
+288 v12
|
||||
+272 v11
|
||||
+256 v10
|
||||
+240 v9
|
||||
+224 v8
|
||||
+208 v7
|
||||
+192 v6
|
||||
+176 v5
|
||||
+160 v4
|
||||
+144 v3
|
||||
+128 v2
|
||||
+112 v1
|
||||
+104 fp8
|
||||
+96 fp7
|
||||
+88 fp6
|
||||
+80 fp5
|
||||
+72 fp4
|
||||
+64 fp3
|
||||
+56 fp2
|
||||
+48 fp1
|
||||
+44 r10
|
||||
+40 r9
|
||||
+36 r8
|
||||
+32 r7
|
||||
+28 r6
|
||||
+24 r5
|
||||
+20 r4
|
||||
+16 r3
|
||||
+12 r0
|
||||
+8 cr
|
||||
r1 link
|
||||
*/
|
||||
stw r0,12(r1)
|
||||
stw r3,16(r1)
|
||||
stw r4,20(r1)
|
||||
# The code that calls this has put parameters for `fixup' in r12 and r11.
|
||||
mr 3,12
|
||||
stw 5,24(1)
|
||||
mr 4,11
|
||||
stw 6,28(1)
|
||||
mflr 5
|
||||
mr r3,r12
|
||||
stw r5,24(r1)
|
||||
mr r4,r11
|
||||
stw r6,28(r1)
|
||||
mflr r5
|
||||
# We also need to save some of the condition register fields.
|
||||
stw 7,32(1)
|
||||
stw 5,48(1)
|
||||
stw 8,36(1)
|
||||
mfcr 0
|
||||
stw 9,40(1)
|
||||
stw 10,44(1)
|
||||
stw 0,8(1)
|
||||
stw r7,32(r1)
|
||||
stw r5,308(r1)
|
||||
stw r8,36(r1)
|
||||
mfcr r0
|
||||
stw r9,40(r1)
|
||||
stw r10,44(r1)
|
||||
stw r0,8(r1)
|
||||
# Save the floating point registers
|
||||
stfd fp1,48(r1)
|
||||
stfd fp2,56(r1)
|
||||
stfd fp3,64(r1)
|
||||
stfd fp4,72(r1)
|
||||
stfd fp5,80(r1)
|
||||
stfd fp6,88(r1)
|
||||
stfd fp7,96(r1)
|
||||
stfd fp8,104(r1)
|
||||
# XXX TODO: store vmx registers
|
||||
# Load the extra parameters.
|
||||
addi r6,r1,16
|
||||
addi r7,r1,312
|
||||
li r0,-1
|
||||
stw r0,0(r7)
|
||||
bl _dl_profile_fixup@local
|
||||
# 'fixup' returns the address we want to branch to.
|
||||
mtctr 3
|
||||
mtctr r3
|
||||
# Put the registers back...
|
||||
lwz 0,48(1)
|
||||
lwz 10,44(1)
|
||||
lwz 9,40(1)
|
||||
mtlr 0
|
||||
lwz 8,36(1)
|
||||
lwz 0,8(1)
|
||||
lwz 7,32(1)
|
||||
lwz 6,28(1)
|
||||
mtcrf 0xFF,0
|
||||
lwz 5,24(1)
|
||||
lwz 4,20(1)
|
||||
lwz 3,16(1)
|
||||
lwz 0,12(1)
|
||||
lwz r0,308(r1)
|
||||
lwz r10,44(r1)
|
||||
lwz r9,40(r1)
|
||||
mtlr r0
|
||||
lwz r8,36(r1)
|
||||
lwz r0,8(r1)
|
||||
lwz r7,32(r1)
|
||||
lwz r6,28(r1)
|
||||
mtcrf 0xFF,r0
|
||||
lwz r5,24(r1)
|
||||
lwz r4,20(r1)
|
||||
lwz r3,16(r1)
|
||||
lwz r0,12(r1)
|
||||
# Load the floating point registers.
|
||||
lfd fp1,48(r1)
|
||||
lfd fp2,56(r1)
|
||||
lfd fp3,64(r1)
|
||||
lfd fp4,72(r1)
|
||||
lfd fp5,80(r1)
|
||||
lfd fp6,88(r1)
|
||||
lfd fp7,96(r1)
|
||||
lfd fp8,104(r1)
|
||||
# ...unwind the stack frame, and jump to the PLT entry we updated.
|
||||
addi 1,1,64
|
||||
addi r1,r1,320
|
||||
bctr
|
||||
.size _dl_prof_resolve,.-_dl_prof_resolve
|
||||
|
|
|
|||
|
|
@ -24,47 +24,47 @@
|
|||
EALIGN(_dl_runtime_resolve, 4, 0)
|
||||
/* We need to save the registers used to pass parameters, ie. r3 thru
|
||||
r10; the registers are saved in a stack frame. */
|
||||
stdu 1,-128(1)
|
||||
std 3,48(1)
|
||||
mr 3,11
|
||||
std 4,56(1)
|
||||
sldi 4,0,1
|
||||
std 5,64(1)
|
||||
add 4,4,0
|
||||
std 6,72(1)
|
||||
sldi 4,4,3
|
||||
std 7,80(1)
|
||||
mflr 0
|
||||
std 8,88(1)
|
||||
stdu r1,-128(r1)
|
||||
std r3,48(r1)
|
||||
mr r3,r11
|
||||
std r4,56(r1)
|
||||
sldi r4,r0,1
|
||||
std r5,64(r1)
|
||||
add r4,r4,r0
|
||||
std r6,72(r1)
|
||||
sldi r4,r4,3
|
||||
std r7,80(r1)
|
||||
mflr r0
|
||||
std r8,88(r1)
|
||||
/* Store the LR in the LR Save area of the previous frame. */
|
||||
std 0,128+16(1)
|
||||
mfcr 0
|
||||
std 9,96(1)
|
||||
std 10,104(1)
|
||||
std r0,128+16(r1)
|
||||
mfcr r0
|
||||
std r9,96(r1)
|
||||
std r10,104(r1)
|
||||
/* I'm almost certain we don't have to save cr... be safe. */
|
||||
std 0,8(1)
|
||||
std r0,8(r1)
|
||||
bl JUMPTARGET(_dl_fixup)
|
||||
/* Put the registers back. */
|
||||
ld 0,128+16(1)
|
||||
ld 10,104(1)
|
||||
ld 9,96(1)
|
||||
ld 8,88(1)
|
||||
ld 7,80(1)
|
||||
mtlr 0
|
||||
ld 0,8(1)
|
||||
ld 6,72(1)
|
||||
ld 5,64(1)
|
||||
ld 4,56(1)
|
||||
mtcrf 0xFF,0
|
||||
ld r0,128+16(r1)
|
||||
ld r10,104(r1)
|
||||
ld r9,96(r1)
|
||||
ld r8,88(r1)
|
||||
ld r7,80(r1)
|
||||
mtlr r0
|
||||
ld r0,8(r1)
|
||||
ld r6,72(r1)
|
||||
ld r5,64(r1)
|
||||
ld r4,56(r1)
|
||||
mtcrf 0xFF,r0
|
||||
/* Load the target address, toc and static chain reg from the function
|
||||
descriptor returned by fixup. */
|
||||
ld 0,0(3)
|
||||
ld 2,8(3)
|
||||
mtctr 0
|
||||
ld 11,16(3)
|
||||
ld 3,48(1)
|
||||
ld r0,0(r3)
|
||||
ld r2,8(r3)
|
||||
mtctr r0
|
||||
ld r11,16(r3)
|
||||
ld r3,48(r1)
|
||||
/* Unwind the stack frame, and jump. */
|
||||
addi 1,1,128
|
||||
addi r1,r1,128
|
||||
bctr
|
||||
END(_dl_runtime_resolve)
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue