x86-64: Optimize memcmp/wmemcmp with AVX2 and MOVBE
Optimize x86-64 memcmp/wmemcmp with AVX2. It uses vector compare as much as possible. It is as fast as SSE4 memcmp for size <= 16 bytes and up to 2X faster for size > 16 bytes on Haswell and Skylake. Select AVX2 memcmp/wmemcmp on AVX2 machines where vzeroupper is preferred and AVX unaligned load is fast. NB: It uses TZCNT instead of BSF since TZCNT produces the same result as BSF for non-zero input. TZCNT is faster than BSF and is executed as BSF if machine doesn't support TZCNT. Key features: 1. For size from 2 to 7 bytes, load as big endian with movbe and bswap to avoid branches. 2. Use overlapping compare to avoid branch. 3. Use vector compare when size >= 4 bytes for memcmp or size >= 8 bytes for wmemcmp. 4. If size is 8 * VEC_SIZE or less, unroll the loop. 5. Compare 4 * VEC_SIZE at a time with the aligned first memory area. 6. Use 2 vector compares when size is 2 * VEC_SIZE or less. 7. Use 4 vector compares when size is 4 * VEC_SIZE or less. 8. Use 8 vector compares when size is 8 * VEC_SIZE or less. * sysdeps/x86/cpu-features.h (index_cpu_MOVBE): New. * sysdeps/x86_64/multiarch/Makefile (sysdep_routines): Add memcmp-avx2 and wmemcmp-avx2. * sysdeps/x86_64/multiarch/ifunc-impl-list.c (__libc_ifunc_impl_list): Test __memcmp_avx2 and __wmemcmp_avx2. * sysdeps/x86_64/multiarch/memcmp-avx2.S: New file. * sysdeps/x86_64/multiarch/wmemcmp-avx2.S: Likewise. * sysdeps/x86_64/multiarch/memcmp.S: Use __memcmp_avx2 on AVX 2 machines if AVX unaligned load is fast and vzeroupper is preferred. * sysdeps/x86_64/multiarch/wmemcmp.S: Use __wmemcmp_avx2 on AVX 2 machines if AVX unaligned load is fast and vzeroupper is preferred.
This commit is contained in:
parent
ef9c4cb6c7
commit
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16
ChangeLog
16
ChangeLog
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@ -1,3 +1,19 @@
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2017-06-05 H.J. Lu <hongjiu.lu@intel.com>
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* sysdeps/x86/cpu-features.h (index_cpu_MOVBE): New.
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* sysdeps/x86_64/multiarch/Makefile (sysdep_routines): Add
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memcmp-avx2 and wmemcmp-avx2.
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* sysdeps/x86_64/multiarch/ifunc-impl-list.c
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(__libc_ifunc_impl_list): Test __memcmp_avx2 and __wmemcmp_avx2.
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* sysdeps/x86_64/multiarch/memcmp-avx2.S: New file.
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* sysdeps/x86_64/multiarch/wmemcmp-avx2.S: Likewise.
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* sysdeps/x86_64/multiarch/memcmp.S: Use __memcmp_avx2 on AVX
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2 machines if AVX unaligned load is fast and vzeroupper is
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preferred.
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* sysdeps/x86_64/multiarch/wmemcmp.S: Use __wmemcmp_avx2 on AVX
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2 machines if AVX unaligned load is fast and vzeroupper is
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preferred.
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2017-06-05 H.J. Lu <hongjiu.lu@intel.com>
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2017-06-05 H.J. Lu <hongjiu.lu@intel.com>
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* include/wchar.h (__wmemset_chk): New.
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* include/wchar.h (__wmemset_chk): New.
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@ -102,6 +102,7 @@
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# define index_cpu_AVX COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
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# define index_cpu_AVX COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
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# define index_cpu_AVX2 COMMON_CPUID_INDEX_7*CPUID_SIZE+CPUID_EBX_OFFSET
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# define index_cpu_AVX2 COMMON_CPUID_INDEX_7*CPUID_SIZE+CPUID_EBX_OFFSET
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# define index_cpu_ERMS COMMON_CPUID_INDEX_7*CPUID_SIZE+CPUID_EBX_OFFSET
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# define index_cpu_ERMS COMMON_CPUID_INDEX_7*CPUID_SIZE+CPUID_EBX_OFFSET
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# define index_cpu_MOVBE COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
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# define index_arch_Fast_Rep_String FEATURE_INDEX_1*FEATURE_SIZE
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# define index_arch_Fast_Rep_String FEATURE_INDEX_1*FEATURE_SIZE
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# define index_arch_Fast_Copy_Backward FEATURE_INDEX_1*FEATURE_SIZE
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# define index_arch_Fast_Copy_Backward FEATURE_INDEX_1*FEATURE_SIZE
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@ -6,6 +6,7 @@ ifeq ($(subdir),string)
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sysdep_routines += strncat-c stpncpy-c strncpy-c strcmp-ssse3 \
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sysdep_routines += strncat-c stpncpy-c strncpy-c strcmp-ssse3 \
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strcmp-sse2-unaligned strncmp-ssse3 \
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strcmp-sse2-unaligned strncmp-ssse3 \
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memcmp-avx2-movbe \
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memcmp-sse4 memcpy-ssse3 \
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memcmp-sse4 memcpy-ssse3 \
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memmove-ssse3 \
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memmove-ssse3 \
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memcpy-ssse3-back \
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memcpy-ssse3-back \
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@ -30,7 +31,9 @@ CFLAGS-strspn-c.c += -msse4
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endif
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endif
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ifeq ($(subdir),wcsmbs)
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ifeq ($(subdir),wcsmbs)
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sysdep_routines += wmemcmp-sse4 wmemcmp-ssse3 wmemcmp-c wcscpy-ssse3 wcscpy-c
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sysdep_routines += wmemcmp-sse4 wmemcmp-ssse3 wmemcmp-c \
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wmemcmp-avx2-movbe \
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wcscpy-ssse3 wcscpy-c
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endif
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endif
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ifeq ($(subdir),debug)
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ifeq ($(subdir),debug)
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@ -40,6 +40,10 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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/* Support sysdeps/x86_64/multiarch/memcmp.S. */
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/* Support sysdeps/x86_64/multiarch/memcmp.S. */
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IFUNC_IMPL (i, name, memcmp,
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IFUNC_IMPL (i, name, memcmp,
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IFUNC_IMPL_ADD (array, i, memcmp,
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(HAS_ARCH_FEATURE (AVX2_Usable)
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&& HAS_CPU_FEATURE (MOVBE)),
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__memcmp_avx2_movbe)
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IFUNC_IMPL_ADD (array, i, memcmp, HAS_CPU_FEATURE (SSE4_1),
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IFUNC_IMPL_ADD (array, i, memcmp, HAS_CPU_FEATURE (SSE4_1),
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__memcmp_sse4_1)
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__memcmp_sse4_1)
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IFUNC_IMPL_ADD (array, i, memcmp, HAS_CPU_FEATURE (SSSE3),
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IFUNC_IMPL_ADD (array, i, memcmp, HAS_CPU_FEATURE (SSSE3),
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@ -294,6 +298,10 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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/* Support sysdeps/x86_64/multiarch/wmemcmp.S. */
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/* Support sysdeps/x86_64/multiarch/wmemcmp.S. */
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IFUNC_IMPL (i, name, wmemcmp,
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IFUNC_IMPL (i, name, wmemcmp,
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IFUNC_IMPL_ADD (array, i, wmemcmp,
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(HAS_ARCH_FEATURE (AVX2_Usable)
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&& HAS_CPU_FEATURE (MOVBE)),
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__wmemcmp_avx2_movbe)
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IFUNC_IMPL_ADD (array, i, wmemcmp, HAS_CPU_FEATURE (SSE4_1),
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IFUNC_IMPL_ADD (array, i, wmemcmp, HAS_CPU_FEATURE (SSE4_1),
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__wmemcmp_sse4_1)
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__wmemcmp_sse4_1)
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IFUNC_IMPL_ADD (array, i, wmemcmp, HAS_CPU_FEATURE (SSSE3),
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IFUNC_IMPL_ADD (array, i, wmemcmp, HAS_CPU_FEATURE (SSSE3),
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@ -0,0 +1,425 @@
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/* memcmp/wmemcmp optimized with AVX2.
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Copyright (C) 2017 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#if IS_IN (libc)
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/* memcmp/wmemcmp is implemented as:
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1. For size from 2 to 7 bytes, load as big endian with movbe and bswap
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to avoid branches.
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2. Use overlapping compare to avoid branch.
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3. Use vector compare when size >= 4 bytes for memcmp or size >= 8
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bytes for wmemcmp.
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4. If size is 8 * VEC_SIZE or less, unroll the loop.
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5. Compare 4 * VEC_SIZE at a time with the aligned first memory
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area.
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6. Use 2 vector compares when size is 2 * VEC_SIZE or less.
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7. Use 4 vector compares when size is 4 * VEC_SIZE or less.
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8. Use 8 vector compares when size is 8 * VEC_SIZE or less. */
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# include <sysdep.h>
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# ifndef MEMCMP
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# define MEMCMP __memcmp_avx2_movbe
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# endif
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# ifdef USE_AS_WMEMCMP
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# define VPCMPEQ vpcmpeqd
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# else
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# define VPCMPEQ vpcmpeqb
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# endif
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# ifndef VZEROUPPER
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# define VZEROUPPER vzeroupper
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# endif
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# define VEC_SIZE 32
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# define VEC_MASK ((1 << VEC_SIZE) - 1)
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/* Warning!
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wmemcmp has to use SIGNED comparison for elements.
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memcmp has to use UNSIGNED comparison for elemnts.
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*/
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.section .text.avx,"ax",@progbits
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ENTRY (MEMCMP)
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# ifdef USE_AS_WMEMCMP
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shl $2, %rdx
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# endif
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cmpq $VEC_SIZE, %rdx
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jb L(less_vec)
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cmpq $(VEC_SIZE * 2), %rdx
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ja L(more_2x_vec)
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L(last_2x_vec):
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/* From VEC to 2 * VEC. No branch when size == VEC_SIZE. */
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vmovdqu (%rsi), %ymm2
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VPCMPEQ (%rdi), %ymm2, %ymm2
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vpmovmskb %ymm2, %eax
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subl $VEC_MASK, %eax
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jnz L(first_vec)
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L(last_vec):
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/* Use overlapping loads to avoid branches. */
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leaq -VEC_SIZE(%rdi, %rdx), %rdi
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leaq -VEC_SIZE(%rsi, %rdx), %rsi
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vmovdqu (%rsi), %ymm2
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VPCMPEQ (%rdi), %ymm2, %ymm2
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vpmovmskb %ymm2, %eax
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subl $VEC_MASK, %eax
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jnz L(first_vec)
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VZEROUPPER
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ret
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.p2align 4
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L(first_vec):
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/* A byte or int32 is different within 16 or 32 bytes. */
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tzcntl %eax, %ecx
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# ifdef USE_AS_WMEMCMP
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xorl %eax, %eax
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movl (%rdi, %rcx), %edx
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cmpl (%rsi, %rcx), %edx
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L(wmemcmp_return):
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setl %al
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negl %eax
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orl $1, %eax
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# else
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movzbl (%rdi, %rcx), %eax
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movzbl (%rsi, %rcx), %edx
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sub %edx, %eax
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# endif
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VZEROUPPER
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ret
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# ifdef USE_AS_WMEMCMP
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.p2align 4
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L(4):
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xorl %eax, %eax
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movl (%rdi), %edx
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cmpl (%rsi), %edx
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jne L(wmemcmp_return)
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ret
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# else
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.p2align 4
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L(between_4_7):
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/* Load as big endian with overlapping movbe to avoid branches. */
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movbe (%rdi), %eax
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movbe (%rsi), %ecx
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shlq $32, %rax
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shlq $32, %rcx
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movbe -4(%rdi, %rdx), %edi
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movbe -4(%rsi, %rdx), %esi
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orq %rdi, %rax
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orq %rsi, %rcx
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subq %rcx, %rax
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je L(exit)
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sbbl %eax, %eax
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orl $1, %eax
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ret
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.p2align 4
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L(exit):
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ret
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.p2align 4
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L(between_2_3):
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/* Load as big endian with overlapping loads and bswap to avoid
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branches. */
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movzwl -2(%rdi, %rdx), %eax
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movzwl -2(%rsi, %rdx), %ecx
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shll $16, %eax
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shll $16, %ecx
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movzwl (%rdi), %edi
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movzwl (%rsi), %esi
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orl %edi, %eax
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orl %esi, %ecx
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bswap %eax
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bswap %ecx
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subl %ecx, %eax
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ret
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.p2align 4
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L(1):
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movzbl (%rdi), %eax
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movzbl (%rsi), %ecx
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subl %ecx, %eax
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ret
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# endif
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.p2align 4
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L(zero):
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xorl %eax, %eax
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ret
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.p2align 4
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L(less_vec):
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# ifdef USE_AS_WMEMCMP
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/* It can only be 0, 4, 8, 12, 16, 20, 24, 28 bytes. */
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cmpb $4, %dl
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je L(4)
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jb L(zero)
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# else
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cmpb $1, %dl
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je L(1)
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jb L(zero)
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cmpb $4, %dl
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jb L(between_2_3)
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cmpb $8, %dl
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jb L(between_4_7)
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# endif
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cmpb $16, %dl
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jae L(between_16_31)
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/* It is between 8 and 15 bytes. */
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vmovq (%rdi), %xmm1
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vmovq (%rsi), %xmm2
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VPCMPEQ %xmm1, %xmm2, %xmm2
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vpmovmskb %xmm2, %eax
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subl $0xffff, %eax
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jnz L(first_vec)
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/* Use overlapping loads to avoid branches. */
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leaq -8(%rdi, %rdx), %rdi
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leaq -8(%rsi, %rdx), %rsi
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vmovq (%rdi), %xmm1
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vmovq (%rsi), %xmm2
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VPCMPEQ %xmm1, %xmm2, %xmm2
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vpmovmskb %xmm2, %eax
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subl $0xffff, %eax
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jnz L(first_vec)
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ret
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.p2align 4
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L(between_16_31):
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/* From 16 to 31 bytes. No branch when size == 16. */
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vmovdqu (%rsi), %xmm2
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VPCMPEQ (%rdi), %xmm2, %xmm2
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vpmovmskb %xmm2, %eax
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subl $0xffff, %eax
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jnz L(first_vec)
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/* Use overlapping loads to avoid branches. */
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leaq -16(%rdi, %rdx), %rdi
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leaq -16(%rsi, %rdx), %rsi
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vmovdqu (%rsi), %xmm2
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VPCMPEQ (%rdi), %xmm2, %xmm2
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vpmovmskb %xmm2, %eax
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subl $0xffff, %eax
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jnz L(first_vec)
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ret
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.p2align 4
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L(more_2x_vec):
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/* More than 2 * VEC. */
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cmpq $(VEC_SIZE * 8), %rdx
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ja L(more_8x_vec)
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cmpq $(VEC_SIZE * 4), %rdx
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jb L(last_4x_vec)
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/* From 4 * VEC to 8 * VEC, inclusively. */
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vmovdqu (%rsi), %ymm1
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VPCMPEQ (%rdi), %ymm1, %ymm1
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vmovdqu VEC_SIZE(%rsi), %ymm2
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VPCMPEQ VEC_SIZE(%rdi), %ymm2, %ymm2
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vmovdqu (VEC_SIZE * 2)(%rsi), %ymm3
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||||||
|
VPCMPEQ (VEC_SIZE * 2)(%rdi), %ymm3, %ymm3
|
||||||
|
|
||||||
|
vmovdqu (VEC_SIZE * 3)(%rsi), %ymm4
|
||||||
|
VPCMPEQ (VEC_SIZE * 3)(%rdi), %ymm4, %ymm4
|
||||||
|
|
||||||
|
vpand %ymm1, %ymm2, %ymm5
|
||||||
|
vpand %ymm3, %ymm4, %ymm6
|
||||||
|
vpand %ymm5, %ymm6, %ymm5
|
||||||
|
|
||||||
|
vpmovmskb %ymm5, %eax
|
||||||
|
subl $VEC_MASK, %eax
|
||||||
|
jnz L(4x_vec_end)
|
||||||
|
|
||||||
|
leaq -(4 * VEC_SIZE)(%rdi, %rdx), %rdi
|
||||||
|
leaq -(4 * VEC_SIZE)(%rsi, %rdx), %rsi
|
||||||
|
vmovdqu (%rsi), %ymm1
|
||||||
|
VPCMPEQ (%rdi), %ymm1, %ymm1
|
||||||
|
|
||||||
|
vmovdqu VEC_SIZE(%rsi), %ymm2
|
||||||
|
VPCMPEQ VEC_SIZE(%rdi), %ymm2, %ymm2
|
||||||
|
vpand %ymm2, %ymm1, %ymm5
|
||||||
|
|
||||||
|
vmovdqu (VEC_SIZE * 2)(%rsi), %ymm3
|
||||||
|
VPCMPEQ (VEC_SIZE * 2)(%rdi), %ymm3, %ymm3
|
||||||
|
vpand %ymm3, %ymm5, %ymm5
|
||||||
|
|
||||||
|
vmovdqu (VEC_SIZE * 3)(%rsi), %ymm4
|
||||||
|
VPCMPEQ (VEC_SIZE * 3)(%rdi), %ymm4, %ymm4
|
||||||
|
vpand %ymm4, %ymm5, %ymm5
|
||||||
|
|
||||||
|
vpmovmskb %ymm5, %eax
|
||||||
|
subl $VEC_MASK, %eax
|
||||||
|
jnz L(4x_vec_end)
|
||||||
|
VZEROUPPER
|
||||||
|
ret
|
||||||
|
|
||||||
|
.p2align 4
|
||||||
|
L(more_8x_vec):
|
||||||
|
/* More than 8 * VEC. Check the first VEC. */
|
||||||
|
vmovdqu (%rsi), %ymm2
|
||||||
|
VPCMPEQ (%rdi), %ymm2, %ymm2
|
||||||
|
vpmovmskb %ymm2, %eax
|
||||||
|
subl $VEC_MASK, %eax
|
||||||
|
jnz L(first_vec)
|
||||||
|
|
||||||
|
/* Align the first memory area for aligned loads in the loop.
|
||||||
|
Compute how much the first memory area is misaligned. */
|
||||||
|
movq %rdi, %rcx
|
||||||
|
andl $(VEC_SIZE - 1), %ecx
|
||||||
|
/* Get the negative of offset for alignment. */
|
||||||
|
subq $VEC_SIZE, %rcx
|
||||||
|
/* Adjust the second memory area. */
|
||||||
|
subq %rcx, %rsi
|
||||||
|
/* Adjust the first memory area which should be aligned now. */
|
||||||
|
subq %rcx, %rdi
|
||||||
|
/* Adjust length. */
|
||||||
|
addq %rcx, %rdx
|
||||||
|
|
||||||
|
L(loop_4x_vec):
|
||||||
|
/* Compare 4 * VEC at a time forward. */
|
||||||
|
vmovdqu (%rsi), %ymm1
|
||||||
|
VPCMPEQ (%rdi), %ymm1, %ymm1
|
||||||
|
|
||||||
|
vmovdqu VEC_SIZE(%rsi), %ymm2
|
||||||
|
VPCMPEQ VEC_SIZE(%rdi), %ymm2, %ymm2
|
||||||
|
vpand %ymm2, %ymm1, %ymm5
|
||||||
|
|
||||||
|
vmovdqu (VEC_SIZE * 2)(%rsi), %ymm3
|
||||||
|
VPCMPEQ (VEC_SIZE * 2)(%rdi), %ymm3, %ymm3
|
||||||
|
vpand %ymm3, %ymm5, %ymm5
|
||||||
|
|
||||||
|
vmovdqu (VEC_SIZE * 3)(%rsi), %ymm4
|
||||||
|
VPCMPEQ (VEC_SIZE * 3)(%rdi), %ymm4, %ymm4
|
||||||
|
vpand %ymm4, %ymm5, %ymm5
|
||||||
|
|
||||||
|
vpmovmskb %ymm5, %eax
|
||||||
|
subl $VEC_MASK, %eax
|
||||||
|
jnz L(4x_vec_end)
|
||||||
|
|
||||||
|
addq $(VEC_SIZE * 4), %rdi
|
||||||
|
addq $(VEC_SIZE * 4), %rsi
|
||||||
|
|
||||||
|
subq $(VEC_SIZE * 4), %rdx
|
||||||
|
cmpq $(VEC_SIZE * 4), %rdx
|
||||||
|
jae L(loop_4x_vec)
|
||||||
|
|
||||||
|
/* Less than 4 * VEC. */
|
||||||
|
cmpq $VEC_SIZE, %rdx
|
||||||
|
jbe L(last_vec)
|
||||||
|
cmpq $(VEC_SIZE * 2), %rdx
|
||||||
|
jbe L(last_2x_vec)
|
||||||
|
|
||||||
|
L(last_4x_vec):
|
||||||
|
/* From 2 * VEC to 4 * VEC. */
|
||||||
|
vmovdqu (%rsi), %ymm2
|
||||||
|
VPCMPEQ (%rdi), %ymm2, %ymm2
|
||||||
|
vpmovmskb %ymm2, %eax
|
||||||
|
subl $VEC_MASK, %eax
|
||||||
|
jnz L(first_vec)
|
||||||
|
|
||||||
|
addq $VEC_SIZE, %rdi
|
||||||
|
addq $VEC_SIZE, %rsi
|
||||||
|
vmovdqu (%rsi), %ymm2
|
||||||
|
VPCMPEQ (%rdi), %ymm2, %ymm2
|
||||||
|
vpmovmskb %ymm2, %eax
|
||||||
|
subl $VEC_MASK, %eax
|
||||||
|
jnz L(first_vec)
|
||||||
|
|
||||||
|
/* Use overlapping loads to avoid branches. */
|
||||||
|
leaq -(3 * VEC_SIZE)(%rdi, %rdx), %rdi
|
||||||
|
leaq -(3 * VEC_SIZE)(%rsi, %rdx), %rsi
|
||||||
|
vmovdqu (%rsi), %ymm2
|
||||||
|
VPCMPEQ (%rdi), %ymm2, %ymm2
|
||||||
|
vpmovmskb %ymm2, %eax
|
||||||
|
subl $VEC_MASK, %eax
|
||||||
|
jnz L(first_vec)
|
||||||
|
|
||||||
|
addq $VEC_SIZE, %rdi
|
||||||
|
addq $VEC_SIZE, %rsi
|
||||||
|
vmovdqu (%rsi), %ymm2
|
||||||
|
VPCMPEQ (%rdi), %ymm2, %ymm2
|
||||||
|
vpmovmskb %ymm2, %eax
|
||||||
|
subl $VEC_MASK, %eax
|
||||||
|
jnz L(first_vec)
|
||||||
|
VZEROUPPER
|
||||||
|
ret
|
||||||
|
|
||||||
|
.p2align 4
|
||||||
|
L(4x_vec_end):
|
||||||
|
vpmovmskb %ymm1, %eax
|
||||||
|
subl $VEC_MASK, %eax
|
||||||
|
jnz L(first_vec)
|
||||||
|
vpmovmskb %ymm2, %eax
|
||||||
|
subl $VEC_MASK, %eax
|
||||||
|
jnz L(first_vec_x1)
|
||||||
|
vpmovmskb %ymm3, %eax
|
||||||
|
subl $VEC_MASK, %eax
|
||||||
|
jnz L(first_vec_x2)
|
||||||
|
vpmovmskb %ymm4, %eax
|
||||||
|
subl $VEC_MASK, %eax
|
||||||
|
tzcntl %eax, %ecx
|
||||||
|
# ifdef USE_AS_WMEMCMP
|
||||||
|
xorl %eax, %eax
|
||||||
|
movl (VEC_SIZE * 3)(%rdi, %rcx), %edx
|
||||||
|
cmpl (VEC_SIZE * 3)(%rsi, %rcx), %edx
|
||||||
|
jmp L(wmemcmp_return)
|
||||||
|
# else
|
||||||
|
movzbl (VEC_SIZE * 3)(%rdi, %rcx), %eax
|
||||||
|
movzbl (VEC_SIZE * 3)(%rsi, %rcx), %edx
|
||||||
|
sub %edx, %eax
|
||||||
|
# endif
|
||||||
|
VZEROUPPER
|
||||||
|
ret
|
||||||
|
|
||||||
|
.p2align 4
|
||||||
|
L(first_vec_x1):
|
||||||
|
tzcntl %eax, %ecx
|
||||||
|
# ifdef USE_AS_WMEMCMP
|
||||||
|
xorl %eax, %eax
|
||||||
|
movl VEC_SIZE(%rdi, %rcx), %edx
|
||||||
|
cmpl VEC_SIZE(%rsi, %rcx), %edx
|
||||||
|
jmp L(wmemcmp_return)
|
||||||
|
# else
|
||||||
|
movzbl VEC_SIZE(%rdi, %rcx), %eax
|
||||||
|
movzbl VEC_SIZE(%rsi, %rcx), %edx
|
||||||
|
sub %edx, %eax
|
||||||
|
# endif
|
||||||
|
VZEROUPPER
|
||||||
|
ret
|
||||||
|
|
||||||
|
.p2align 4
|
||||||
|
L(first_vec_x2):
|
||||||
|
tzcntl %eax, %ecx
|
||||||
|
# ifdef USE_AS_WMEMCMP
|
||||||
|
xorl %eax, %eax
|
||||||
|
movl (VEC_SIZE * 2)(%rdi, %rcx), %edx
|
||||||
|
cmpl (VEC_SIZE * 2)(%rsi, %rcx), %edx
|
||||||
|
jmp L(wmemcmp_return)
|
||||||
|
# else
|
||||||
|
movzbl (VEC_SIZE * 2)(%rdi, %rcx), %eax
|
||||||
|
movzbl (VEC_SIZE * 2)(%rsi, %rcx), %edx
|
||||||
|
sub %edx, %eax
|
||||||
|
# endif
|
||||||
|
VZEROUPPER
|
||||||
|
ret
|
||||||
|
END (MEMCMP)
|
||||||
|
#endif
|
|
@ -27,7 +27,18 @@
|
||||||
ENTRY(memcmp)
|
ENTRY(memcmp)
|
||||||
.type memcmp, @gnu_indirect_function
|
.type memcmp, @gnu_indirect_function
|
||||||
LOAD_RTLD_GLOBAL_RO_RDX
|
LOAD_RTLD_GLOBAL_RO_RDX
|
||||||
HAS_CPU_FEATURE (SSSE3)
|
HAS_ARCH_FEATURE (Prefer_No_VZEROUPPER)
|
||||||
|
jnz 1f
|
||||||
|
HAS_ARCH_FEATURE (AVX2_Usable)
|
||||||
|
jz 1f
|
||||||
|
HAS_CPU_FEATURE (MOVBE)
|
||||||
|
jz 1f
|
||||||
|
HAS_ARCH_FEATURE (AVX_Fast_Unaligned_Load)
|
||||||
|
jz 1f
|
||||||
|
leaq __memcmp_avx2_movbe(%rip), %rax
|
||||||
|
ret
|
||||||
|
|
||||||
|
1: HAS_CPU_FEATURE (SSSE3)
|
||||||
jnz 2f
|
jnz 2f
|
||||||
leaq __memcmp_sse2(%rip), %rax
|
leaq __memcmp_sse2(%rip), %rax
|
||||||
ret
|
ret
|
||||||
|
|
|
@ -0,0 +1,4 @@
|
||||||
|
#define MEMCMP __wmemcmp_avx2_movbe
|
||||||
|
#define USE_AS_WMEMCMP 1
|
||||||
|
|
||||||
|
#include "memcmp-avx2-movbe.S"
|
|
@ -27,7 +27,18 @@
|
||||||
ENTRY(wmemcmp)
|
ENTRY(wmemcmp)
|
||||||
.type wmemcmp, @gnu_indirect_function
|
.type wmemcmp, @gnu_indirect_function
|
||||||
LOAD_RTLD_GLOBAL_RO_RDX
|
LOAD_RTLD_GLOBAL_RO_RDX
|
||||||
HAS_CPU_FEATURE (SSSE3)
|
HAS_ARCH_FEATURE (Prefer_No_VZEROUPPER)
|
||||||
|
jnz 1f
|
||||||
|
HAS_ARCH_FEATURE (AVX2_Usable)
|
||||||
|
jz 1f
|
||||||
|
HAS_CPU_FEATURE (MOVBE)
|
||||||
|
jz 1f
|
||||||
|
HAS_ARCH_FEATURE (AVX_Fast_Unaligned_Load)
|
||||||
|
jz 1f
|
||||||
|
leaq __wmemcmp_avx2_movbe(%rip), %rax
|
||||||
|
ret
|
||||||
|
|
||||||
|
1: HAS_CPU_FEATURE (SSSE3)
|
||||||
jnz 2f
|
jnz 2f
|
||||||
leaq __wmemcmp_sse2(%rip), %rax
|
leaq __wmemcmp_sse2(%rip), %rax
|
||||||
ret
|
ret
|
||||||
|
|
Loading…
Reference in New Issue