Update.
2002-01-09 Richard Henderson <rth@redhat.com> * sysdeps/unix/sysv/linux/alpha/sysdep-cancel.h: Assume only ret follows pseudo, and thus avoid branch-to-branch in cancel case. Use SYSCALL_ERROR_LABEL.
This commit is contained in:
Ulrich Drepper
parent
76426e0247
commit
addb5f3176
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@ -1,3 +1,9 @@
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2002-01-09 Richard Henderson <rth@redhat.com>
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* sysdeps/unix/sysv/linux/alpha/sysdep-cancel.h: Assume only
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ret follows pseudo, and thus avoid branch-to-branch in cancel
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case. Use SYSCALL_ERROR_LABEL.
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2003-01-11 Philip Blundell <philb@gnu.org>
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* sysdeps/unix/sysv/linux/arm/vfork.S: New file.
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@ -33,6 +33,9 @@
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# define PSEUDO_PROF
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# endif
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/* ??? Assumes that nothing comes between PSEUDO and PSEUDO_END
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besides "ret". */
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# undef PSEUDO
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# define PSEUDO(name, syscall_name, args) \
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.globl name; \
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@ -47,7 +50,7 @@ __LABEL(name) \
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bne t0, $pseudo_cancel; \
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lda v0, SYS_ify(syscall_name); \
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call_pal PAL_callsys; \
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bne a3, $syscall_error; \
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bne a3, SYSCALL_ERROR_LABEL; \
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__LABEL($pseudo_ret) \
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.subsection 2; \
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__LABEL($pseudo_cancel) \
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@ -59,13 +62,17 @@ __LABEL($pseudo_cancel) \
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lda v0, SYS_ify(syscall_name); \
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call_pal PAL_callsys; \
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stq v0, 8(sp); \
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stq a3, 16(sp); \
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bne a3, $multi_error; \
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CDISABLE; \
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ldq ra, 0(sp); \
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ldq v0, 8(sp); \
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addq sp, 64, sp; \
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ret; \
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__LABEL($multi_error) \
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CDISABLE; \
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ldq ra, 0(sp); \
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ldq v0, 8(sp); \
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ldq a3, 16(sp); \
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addq sp, 64, sp; \
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beq a3, $pseudo_ret; \
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__LABEL($syscall_error) \
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SYSCALL_ERROR_HANDLER; \
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END(name); \
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@ -47,11 +47,17 @@ __syscall_error:
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#if defined(_LIBC_REENTRANT) && USE___THREAD
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#ifndef NOT_IN_libc
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# define SYSCALL_ERROR_ERRNO __libc_errno
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#else
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# define SYSCALL_ERROR_ERRNO errno
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#endif
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LOADGP
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PROLOGUE
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mov v0, t0
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call_pal PAL_rduniq
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ldq t1, __libc_errno(gp) !gottprel
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ldq t1, SYSCALL_ERROR_ERRNO(gp) !gottprel
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addq v0, t1, v0
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stl t0, 0(v0)
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lda v0, -1
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@ -58,9 +58,6 @@
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#undef END
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#define END(sym) .end sym
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/* Note that PSEUDO/PSEUDO_END use label number 1996---do not use a
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label of that number between those two macros! */
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#ifdef PROF
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# define PSEUDO_PROLOGUE \
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.frame sp, 0, ra; \
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@ -70,28 +67,38 @@
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jsr AT,(AT),_mcount; \
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.set at; \
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.prologue 1
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# define PSEUDO_LOADGP
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#else
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#elif defined PIC
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# define PSEUDO_PROLOGUE \
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.frame sp, 0, ra; \
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.prologue 0
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# define PSEUDO_LOADGP \
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br gp, 2f; \
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2: ldgp gp, 0(gp)
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#else
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# define PSEUDO_PROLOGUE \
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.frame sp, 0, ra; \
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ldgp gp,0(pv); \
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.prologue 1
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#endif /* PROF */
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#if RTLD_PRIVATE_ERRNO
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# define SYSCALL_ERROR_LABEL $syscall_error
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# define SYSCALL_ERROR_HANDLER \
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stl v0, errno(gp) !gprel; \
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lda v0, -1; \
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ret
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#elif defined(PIC)
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# define SYSCALL_ERROR_LABEL __syscall_error
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# define SYSCALL_ERROR_HANDLER \
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br $31, __syscall_error !samegp
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#else
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# define SYSCALL_ERROR_LABEL $syscall_error
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# define SYSCALL_ERROR_HANDLER \
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jmp $31, __syscall_error
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#endif /* RTLD_PRIVATE_ERRNO */
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#if defined(PIC) && !RTLD_PRIVATE_ERRNO
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# define PSEUDO(name, syscall_name, args) \
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/* Overridden by specific syscalls. */
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#undef PSEUDO_PREPARE_ARGS
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#define PSEUDO_PREPARE_ARGS /* Nothing. */
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#define PSEUDO(name, syscall_name, args) \
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.globl name; \
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.align 4; \
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.ent name,0; \
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@ -100,36 +107,232 @@ __LABEL(name) \
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PSEUDO_PREPARE_ARGS \
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lda v0, SYS_ify(syscall_name); \
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call_pal PAL_callsys; \
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bne a3, __syscall_error !samegp; \
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3:
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# undef PSEUDO_END
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bne a3, SYSCALL_ERROR_LABEL
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#undef PSEUDO_END
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#if defined(PIC) && !RTLD_PRIVATE_ERRNO
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# define PSEUDO_END(sym) END(sym)
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#else
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# define PSEUDO(name, syscall_name, args) \
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.globl name; \
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.align 4; \
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.ent name,0; \
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__LABEL(name) \
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PSEUDO_PREPARE_ARGS \
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lda v0, SYS_ify(syscall_name); \
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call_pal PAL_callsys; \
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bne a3, 1996f; \
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3:
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# undef PSEUDO_END
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# define PSEUDO_END(sym) \
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1996: \
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PSEUDO_LOADGP; \
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$syscall_error: \
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SYSCALL_ERROR_HANDLER; \
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END(sym)
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#endif /* PIC && !RTLD_PRIVATE_ERRNO */
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#undef PSEUDO_PREPARE_ARGS
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#define PSEUDO_PREPARE_ARGS /* Nothing. */
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#endif
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#define r0 v0
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#define r1 a4
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#define MOVE(x,y) mov x,y
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#else /* !ASSEMBLER */
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/* ??? Linux needs to be able to override INLINE_SYSCALL for one
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particular special case. Make this easy. */
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#define INLINE_SYSCALL(name, nr, args...) \
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INLINE_SYSCALL1(name, nr, args)
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#define INLINE_SYSCALL1(name, nr, args...) \
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({ \
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long _sc_ret, _sc_err; \
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inline_syscall##nr(name, args); \
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if (_sc_err) \
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{ \
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__set_errno (_sc_ret); \
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_sc_ret = -1L; \
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} \
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_sc_ret; \
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})
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#define INTERNAL_SYSCALL(name, err_out, nr, args...) \
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INTERNAL_SYSCALL1(name, err_out, nr, args)
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#define INTERNAL_SYSCALL1(name, err_out, nr, args...) \
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({ \
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long _sc_ret, _sc_err; \
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inline_syscall##nr(name, args); \
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err_out = _sc_err; \
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_sc_ret; \
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})
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#define INTERNAL_SYSCALL_DECL(err) long int err
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#define INTERNAL_SYSCALL_ERROR_P(val, err) err
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#define INTERNAL_SYSCALL_ERRNO(val, err) val
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#define inline_syscall_clobbers \
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"$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
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"$22", "$23", "$24", "$25", "$27", "$28", "memory"
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/* If TLS is in use, we have a conflict between the PAL_rduniq primitive,
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as modeled within GCC, and explicit use of the R0 register. If we use
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the register via the asm, the scheduler may place the PAL_rduniq insn
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before we've copied the data from R0 into _sc_ret. If this happens
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we'll get a reload abort, since R0 is live at the same time it is
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needed for the PAL_rduniq.
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Solve this by using the "v" constraint instead of an asm for the syscall
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output. We don't do this unconditionally to allow compilation with
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older compilers. */
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#ifdef USE_TLS
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#define inline_syscall_r0_asm
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#define inline_syscall_r0_out_constraint "=v"
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#else
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#define inline_syscall_r0_asm __asm__("$0")
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#define inline_syscall_r0_out_constraint "=r"
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#endif
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/* It is moderately important optimization-wise to limit the lifetime
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of the hard-register variables as much as possible. Thus we copy
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in/out as close to the asm as possible. */
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#define inline_syscall0(name, args...) \
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{ \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_19 __asm__("$19"); \
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\
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_sc_0 = __NR_##name; \
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__asm__("callsys # %0 %1 <= %2" \
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: inline_syscall_r0_out_constraint (_sc_0), \
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"=r"(_sc_19) \
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: "0"(_sc_0) \
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: inline_syscall_clobbers, \
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"$16", "$17", "$18", "$20", "$21"); \
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_sc_ret = _sc_0, _sc_err = _sc_19; \
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}
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#define inline_syscall1(name,arg1) \
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{ \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_16 __asm__("$16"); \
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register long _sc_19 __asm__("$19"); \
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\
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_sc_0 = __NR_##name; \
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_sc_16 = (long) (arg1); \
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__asm__("callsys # %0 %1 <= %2 %3" \
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: inline_syscall_r0_out_constraint (_sc_0), \
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"=r"(_sc_19), "=r"(_sc_16) \
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: "0"(_sc_0), "2"(_sc_16) \
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: inline_syscall_clobbers, \
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"$17", "$18", "$20", "$21"); \
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_sc_ret = _sc_0, _sc_err = _sc_19; \
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}
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#define inline_syscall2(name,arg1,arg2) \
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{ \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_16 __asm__("$16"); \
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register long _sc_17 __asm__("$17"); \
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register long _sc_19 __asm__("$19"); \
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\
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_sc_0 = __NR_##name; \
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_sc_16 = (long) (arg1); \
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_sc_17 = (long) (arg2); \
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__asm__("callsys # %0 %1 <= %2 %3 %4" \
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: inline_syscall_r0_out_constraint (_sc_0), \
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"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17) \
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: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17) \
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: inline_syscall_clobbers, \
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"$18", "$20", "$21"); \
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_sc_ret = _sc_0, _sc_err = _sc_19; \
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}
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#define inline_syscall3(name,arg1,arg2,arg3) \
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{ \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_16 __asm__("$16"); \
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register long _sc_17 __asm__("$17"); \
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register long _sc_18 __asm__("$18"); \
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register long _sc_19 __asm__("$19"); \
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\
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_sc_0 = __NR_##name; \
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_sc_16 = (long) (arg1); \
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_sc_17 = (long) (arg2); \
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_sc_18 = (long) (arg3); \
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__asm__("callsys # %0 %1 <= %2 %3 %4 %5" \
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: inline_syscall_r0_out_constraint (_sc_0), \
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"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17), \
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"=r"(_sc_18) \
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: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
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"4"(_sc_18) \
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: inline_syscall_clobbers, "$20", "$21"); \
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_sc_ret = _sc_0, _sc_err = _sc_19; \
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}
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#define inline_syscall4(name,arg1,arg2,arg3,arg4) \
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{ \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_16 __asm__("$16"); \
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register long _sc_17 __asm__("$17"); \
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register long _sc_18 __asm__("$18"); \
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register long _sc_19 __asm__("$19"); \
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\
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_sc_0 = __NR_##name; \
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_sc_16 = (long) (arg1); \
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_sc_17 = (long) (arg2); \
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_sc_18 = (long) (arg3); \
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_sc_19 = (long) (arg4); \
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__asm__("callsys # %0 %1 <= %2 %3 %4 %5 %6" \
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: inline_syscall_r0_out_constraint (_sc_0), \
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"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17), \
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"=r"(_sc_18) \
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: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
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"4"(_sc_18), "1"(_sc_19) \
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: inline_syscall_clobbers, "$20", "$21"); \
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_sc_ret = _sc_0, _sc_err = _sc_19; \
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}
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#define inline_syscall5(name,arg1,arg2,arg3,arg4,arg5) \
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{ \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_16 __asm__("$16"); \
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register long _sc_17 __asm__("$17"); \
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register long _sc_18 __asm__("$18"); \
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register long _sc_19 __asm__("$19"); \
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register long _sc_20 __asm__("$20"); \
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\
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_sc_0 = __NR_##name; \
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_sc_16 = (long) (arg1); \
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_sc_17 = (long) (arg2); \
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_sc_18 = (long) (arg3); \
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_sc_19 = (long) (arg4); \
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_sc_20 = (long) (arg5); \
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__asm__("callsys # %0 %1 <= %2 %3 %4 %5 %6 %7" \
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: inline_syscall_r0_out_constraint (_sc_0), \
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"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17), \
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"=r"(_sc_18), "=r"(_sc_20) \
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: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
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"4"(_sc_18), "1"(_sc_19), "5"(_sc_20) \
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: inline_syscall_clobbers, "$21"); \
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_sc_ret = _sc_0, _sc_err = _sc_19; \
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}
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#define inline_syscall6(name,arg1,arg2,arg3,arg4,arg5,arg6) \
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{ \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_16 __asm__("$16"); \
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register long _sc_17 __asm__("$17"); \
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register long _sc_18 __asm__("$18"); \
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register long _sc_19 __asm__("$19"); \
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register long _sc_20 __asm__("$20"); \
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register long _sc_21 __asm__("$21"); \
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\
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_sc_0 = __NR_##name; \
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_sc_16 = (long) (arg1); \
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_sc_17 = (long) (arg2); \
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_sc_18 = (long) (arg3); \
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_sc_19 = (long) (arg4); \
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_sc_20 = (long) (arg5); \
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_sc_21 = (long) (arg6); \
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__asm__("callsys # %0 %1 <= %2 %3 %4 %5 %6 %7 %8" \
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: inline_syscall_r0_out_constraint (_sc_0), \
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"=r"(_sc_19) "=r"(_sc_16), "=r"(_sc_17), \
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"=r"(_sc_18), "=r"(_sc_20), "=r"(_sc_21) \
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: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
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"4"(_sc_18), "1"(_sc_19), "5"(_sc_20), \
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"6"(_sc_21) \
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: inline_syscall_clobbers); \
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_sc_ret = _sc_0, _sc_err = _sc_19; \
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}
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#endif /* ASSEMBLER */
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|
|
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@ -72,192 +72,11 @@
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? __syscall_##name(args) \
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: INLINE_SYSCALL1(name, nr, args))
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|
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#define INLINE_SYSCALL1(name, nr, args...) \
|
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({ \
|
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long _sc_ret, _sc_err; \
|
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inline_syscall##nr(name, args); \
|
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if (_sc_err) \
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{ \
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__set_errno (_sc_ret); \
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_sc_ret = -1L; \
|
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} \
|
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_sc_ret; \
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#undef INTERNAL_SYSCALL
|
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#define INTERNAL_SYSCALL(name, err_out, nr, args...) \
|
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({ \
|
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extern char ChEcK[__NR_##name == __NR_rt_sigaction ? -1 : 1]; \
|
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INTERNAL_SYSCALL1(name, err_out, nr, args); \
|
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})
|
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#define inline_syscall_clobbers \
|
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"$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
|
||||
"$22", "$23", "$24", "$25", "$27", "$28", "memory"
|
||||
|
||||
/* If TLS is in use, we have a conflict between the PAL_rduniq primitive,
|
||||
as modeled within GCC, and explicit use of the R0 register. If we use
|
||||
the register via the asm, the scheduler may place the PAL_rduniq insn
|
||||
before we've copied the data from R0 into _sc_ret. If this happens
|
||||
we'll get a reload abort, since R0 is live at the same time it is
|
||||
needed for the PAL_rduniq.
|
||||
|
||||
Solve this by using the "v" constraint instead of an asm for the syscall
|
||||
output. We don't do this unconditionally to allow compilation with
|
||||
older compilers. */
|
||||
|
||||
#ifdef USE_TLS
|
||||
#define inline_syscall_r0_asm
|
||||
#define inline_syscall_r0_out_constraint "=v"
|
||||
#else
|
||||
#define inline_syscall_r0_asm __asm__("$0")
|
||||
#define inline_syscall_r0_out_constraint "=r"
|
||||
#endif
|
||||
|
||||
/* It is moderately important optimization-wise to limit the lifetime
|
||||
of the hard-register variables as much as possible. Thus we copy
|
||||
in/out as close to the asm as possible. */
|
||||
|
||||
#define inline_syscall0(name, args...) \
|
||||
{ \
|
||||
register long _sc_0 inline_syscall_r0_asm; \
|
||||
register long _sc_19 __asm__("$19"); \
|
||||
\
|
||||
_sc_0 = __NR_##name; \
|
||||
__asm__("callsys # %0 %1 <= %2" \
|
||||
: inline_syscall_r0_out_constraint (_sc_0), \
|
||||
"=r"(_sc_19) \
|
||||
: "0"(_sc_0) \
|
||||
: inline_syscall_clobbers, \
|
||||
"$16", "$17", "$18", "$20", "$21"); \
|
||||
_sc_ret = _sc_0, _sc_err = _sc_19; \
|
||||
}
|
||||
|
||||
#define inline_syscall1(name,arg1) \
|
||||
{ \
|
||||
register long _sc_0 inline_syscall_r0_asm; \
|
||||
register long _sc_16 __asm__("$16"); \
|
||||
register long _sc_19 __asm__("$19"); \
|
||||
\
|
||||
_sc_0 = __NR_##name; \
|
||||
_sc_16 = (long) (arg1); \
|
||||
__asm__("callsys # %0 %1 <= %2 %3" \
|
||||
: inline_syscall_r0_out_constraint (_sc_0), \
|
||||
"=r"(_sc_19), "=r"(_sc_16) \
|
||||
: "0"(_sc_0), "2"(_sc_16) \
|
||||
: inline_syscall_clobbers, \
|
||||
"$17", "$18", "$20", "$21"); \
|
||||
_sc_ret = _sc_0, _sc_err = _sc_19; \
|
||||
}
|
||||
|
||||
#define inline_syscall2(name,arg1,arg2) \
|
||||
{ \
|
||||
register long _sc_0 inline_syscall_r0_asm; \
|
||||
register long _sc_16 __asm__("$16"); \
|
||||
register long _sc_17 __asm__("$17"); \
|
||||
register long _sc_19 __asm__("$19"); \
|
||||
\
|
||||
_sc_0 = __NR_##name; \
|
||||
_sc_16 = (long) (arg1); \
|
||||
_sc_17 = (long) (arg2); \
|
||||
__asm__("callsys # %0 %1 <= %2 %3 %4" \
|
||||
: inline_syscall_r0_out_constraint (_sc_0), \
|
||||
"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17) \
|
||||
: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17) \
|
||||
: inline_syscall_clobbers, \
|
||||
"$18", "$20", "$21"); \
|
||||
_sc_ret = _sc_0, _sc_err = _sc_19; \
|
||||
}
|
||||
|
||||
#define inline_syscall3(name,arg1,arg2,arg3) \
|
||||
{ \
|
||||
register long _sc_0 inline_syscall_r0_asm; \
|
||||
register long _sc_16 __asm__("$16"); \
|
||||
register long _sc_17 __asm__("$17"); \
|
||||
register long _sc_18 __asm__("$18"); \
|
||||
register long _sc_19 __asm__("$19"); \
|
||||
\
|
||||
_sc_0 = __NR_##name; \
|
||||
_sc_16 = (long) (arg1); \
|
||||
_sc_17 = (long) (arg2); \
|
||||
_sc_18 = (long) (arg3); \
|
||||
__asm__("callsys # %0 %1 <= %2 %3 %4 %5" \
|
||||
: inline_syscall_r0_out_constraint (_sc_0), \
|
||||
"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17), \
|
||||
"=r"(_sc_18) \
|
||||
: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
|
||||
"4"(_sc_18) \
|
||||
: inline_syscall_clobbers, "$20", "$21"); \
|
||||
_sc_ret = _sc_0, _sc_err = _sc_19; \
|
||||
}
|
||||
|
||||
#define inline_syscall4(name,arg1,arg2,arg3,arg4) \
|
||||
{ \
|
||||
register long _sc_0 inline_syscall_r0_asm; \
|
||||
register long _sc_16 __asm__("$16"); \
|
||||
register long _sc_17 __asm__("$17"); \
|
||||
register long _sc_18 __asm__("$18"); \
|
||||
register long _sc_19 __asm__("$19"); \
|
||||
\
|
||||
_sc_0 = __NR_##name; \
|
||||
_sc_16 = (long) (arg1); \
|
||||
_sc_17 = (long) (arg2); \
|
||||
_sc_18 = (long) (arg3); \
|
||||
_sc_19 = (long) (arg4); \
|
||||
__asm__("callsys # %0 %1 <= %2 %3 %4 %5 %6" \
|
||||
: inline_syscall_r0_out_constraint (_sc_0), \
|
||||
"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17), \
|
||||
"=r"(_sc_18) \
|
||||
: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
|
||||
"4"(_sc_18), "1"(_sc_19) \
|
||||
: inline_syscall_clobbers, "$20", "$21"); \
|
||||
_sc_ret = _sc_0, _sc_err = _sc_19; \
|
||||
}
|
||||
|
||||
#define inline_syscall5(name,arg1,arg2,arg3,arg4,arg5) \
|
||||
{ \
|
||||
register long _sc_0 inline_syscall_r0_asm; \
|
||||
register long _sc_16 __asm__("$16"); \
|
||||
register long _sc_17 __asm__("$17"); \
|
||||
register long _sc_18 __asm__("$18"); \
|
||||
register long _sc_19 __asm__("$19"); \
|
||||
register long _sc_20 __asm__("$20"); \
|
||||
\
|
||||
_sc_0 = __NR_##name; \
|
||||
_sc_16 = (long) (arg1); \
|
||||
_sc_17 = (long) (arg2); \
|
||||
_sc_18 = (long) (arg3); \
|
||||
_sc_19 = (long) (arg4); \
|
||||
_sc_20 = (long) (arg5); \
|
||||
__asm__("callsys # %0 %1 <= %2 %3 %4 %5 %6 %7" \
|
||||
: inline_syscall_r0_out_constraint (_sc_0), \
|
||||
"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17), \
|
||||
"=r"(_sc_18), "=r"(_sc_20) \
|
||||
: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
|
||||
"4"(_sc_18), "1"(_sc_19), "5"(_sc_20) \
|
||||
: inline_syscall_clobbers, "$21"); \
|
||||
_sc_ret = _sc_0, _sc_err = _sc_19; \
|
||||
}
|
||||
|
||||
#define inline_syscall6(name,arg1,arg2,arg3,arg4,arg5,arg6) \
|
||||
{ \
|
||||
register long _sc_0 inline_syscall_r0_asm; \
|
||||
register long _sc_16 __asm__("$16"); \
|
||||
register long _sc_17 __asm__("$17"); \
|
||||
register long _sc_18 __asm__("$18"); \
|
||||
register long _sc_19 __asm__("$19"); \
|
||||
register long _sc_20 __asm__("$20"); \
|
||||
register long _sc_21 __asm__("$21"); \
|
||||
\
|
||||
_sc_0 = __NR_##name; \
|
||||
_sc_16 = (long) (arg1); \
|
||||
_sc_17 = (long) (arg2); \
|
||||
_sc_18 = (long) (arg3); \
|
||||
_sc_19 = (long) (arg4); \
|
||||
_sc_20 = (long) (arg5); \
|
||||
_sc_21 = (long) (arg6); \
|
||||
__asm__("callsys # %0 %1 <= %2 %3 %4 %5 %6 %7 %8" \
|
||||
: inline_syscall_r0_out_constraint (_sc_0), \
|
||||
"=r"(_sc_19) "=r"(_sc_16), "=r"(_sc_17), \
|
||||
"=r"(_sc_18), "=r"(_sc_20), "=r"(_sc_21) \
|
||||
: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
|
||||
"4"(_sc_18), "1"(_sc_19), "5"(_sc_20), \
|
||||
"6"(_sc_21) \
|
||||
: inline_syscall_clobbers); \
|
||||
_sc_ret = _sc_0, _sc_err = _sc_19; \
|
||||
}
|
||||
|
||||
#endif /* _LINUX_ALPHA_SYSDEP_H */
|
||||
|
|
|
|||
Loading…
Reference in New Issue