From cfa1f3e8651f43ea8031b4fb6e491253261f95d1 Mon Sep 17 00:00:00 2001
From: "David S. Miller" <davem@davemloft.net>
Date: Wed, 25 Apr 2012 22:24:00 -0700
Subject: [PATCH] Restore non-v9 32-bit sparc build.

	* sysdeps/sparc/sparc32/bits/atomic.h: Include sysdep.h to get
	HWCAP_* values only after the memory barriers have been defined.
	(atomic_full_barrier): Define.
	(atomic_read_barrier): Define.
	(atomic_write_barrier): Define.
---
 ChangeLog                           |  8 +++++++
 sysdeps/sparc/sparc32/bits/atomic.h | 34 ++++++++++++++++++++++++++++-
 2 files changed, 41 insertions(+), 1 deletion(-)

diff --git a/ChangeLog b/ChangeLog
index 65cb6ba554..080caddf55 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,11 @@
+2012-04-25  David S. Miller  <davem@davemloft.net>
+
+	* sysdeps/sparc/sparc32/bits/atomic.h: Include sysdep.h to get
+	HWCAP_* values only after the memory barriers have been defined.
+	(atomic_full_barrier): Define.
+	(atomic_read_barrier): Define.
+	(atomic_write_barrier): Define.
+
 2012-04-26  Siddhesh Poyarekar  <siddhesh@redhat.com>
 
 	* shlib-versions: Add libgcc_s version information.
diff --git a/sysdeps/sparc/sparc32/bits/atomic.h b/sysdeps/sparc/sparc32/bits/atomic.h
index 4f783fbc30..fb16fc29d5 100644
--- a/sysdeps/sparc/sparc32/bits/atomic.h
+++ b/sysdeps/sparc/sparc32/bits/atomic.h
@@ -21,7 +21,6 @@
 #define _BITS_ATOMIC_H	1
 
 #include <stdint.h>
-#include <sysdep.h>
 
 typedef int8_t atomic8_t;
 typedef uint8_t uatomic8_t;
@@ -231,6 +230,10 @@ volatile unsigned char __sparc32_atomic_locks[64]
        abort ();						      \
      __v7_exchange_24_rel (mem, newval); })
 
+# define atomic_full_barrier() __asm ("" ::: "memory")
+# define atomic_read_barrier() atomic_full_barrier ()
+# define atomic_write_barrier() atomic_full_barrier ()
+
 #else
 
 /* In libc.a/libpthread.a etc. we don't know if we'll be run on
@@ -319,6 +322,35 @@ extern uint64_t _dl_hwcap __attribute__((weak));
        __acev_w24ret = __v7_exchange_24_rel (mem, newval);	      \
      __acev_w24ret; })
 
+#define atomic_full_barrier()						\
+  do {									\
+     if (__atomic_is_v9)						\
+       /* membar #LoadLoad | #LoadStore | #StoreLoad | #StoreStore */	\
+       __asm __volatile (".word 0x8143e00f" : : : "memory");		\
+     else								\
+       __asm __volatile ("" : : : "memory");				\
+  } while (0)
+
+#define atomic_read_barrier()						\
+  do {									\
+     if (__atomic_is_v9)						\
+       /* membar #LoadLoad | #LoadStore */				\
+       __asm __volatile (".word 0x8143e005" : : : "memory");		\
+     else								\
+       __asm __volatile ("" : : : "memory");				\
+  } while (0)
+
+#define atomic_write_barrier()						\
+  do {									\
+     if (__atomic_is_v9)						\
+       /* membar  #StoreLoad | #StoreStore */				\
+       __asm __volatile (".word 0x8143e00a" : : : "memory");		\
+     else								\
+       __asm __volatile ("" : : : "memory");				\
+  } while (0)
+
 #endif
 
+#include <sysdep.h>
+
 #endif	/* bits/atomic.h */