(inline_syscall_r0_asm): New.
(inline_syscall_r0_constraint): New. (inline_syscall[0-6]): Use them.
This commit is contained in:
Ulrich Drepper
parent
eb22472e6f
commit
d0a6689abf
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@ -87,44 +87,64 @@
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"$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
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"$22", "$23", "$24", "$25", "$27", "$28", "memory"
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/* If TLS is in use, we have a conflict between the PAL_rduniq primitive,
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as modeled within GCC, and explicit use of the R0 register. If we use
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the register via the asm, the scheduler may place the PAL_rduniq insn
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before we've copied the data from R0 into _sc_ret. If this happens
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we'll get a reload abort, since R0 is live at the same time it is
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needed for the PAL_rduniq.
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Solve this by using the "v" constraint instead of an asm for the syscall
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output. We don't do this unconditionally to allow compilation with
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older compilers. */
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#ifdef USE_TLS
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#define inline_syscall_r0_asm
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#define inline_syscall_r0_constraint "v"
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#else
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#define inline_syscall_r0_asm __asm__("$0")
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#define inline_syscall_r0_constraint "r"
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#endif
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/* It is moderately important optimization-wise to limit the lifetime
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of the hard-register variables as much as possible. Thus we copy
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in/out as close to the asm as possible. */
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#define inline_syscall0(name) \
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{ \
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register long _sc_0 __asm__("$0"); \
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register long _sc_19 __asm__("$19"); \
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\
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_sc_0 = __NR_##name; \
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__asm__("callsys # %0 %1 <= %2" \
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: "=r"(_sc_0), "=r"(_sc_19) \
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: "0"(_sc_0) \
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: inline_syscall_clobbers, \
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"$16", "$17", "$18", "$20", "$21"); \
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_sc_ret = _sc_0, _sc_err = _sc_19; \
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#define inline_syscall0(name, args...) \
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{ \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_19 __asm__("$19"); \
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\
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_sc_0 = __NR_##name; \
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__asm__("callsys # %0 %1 <= %2" \
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: "=" inline_syscall_r0_constraint (_sc_0), \
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"=r"(_sc_19) \
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: "0"(_sc_0) \
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: inline_syscall_clobbers, \
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"$16", "$17", "$18", "$20", "$21"); \
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_sc_ret = _sc_0, _sc_err = _sc_19; \
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}
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#define inline_syscall1(name,arg1) \
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{ \
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register long _sc_0 __asm__("$0"); \
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register long _sc_16 __asm__("$16"); \
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register long _sc_19 __asm__("$19"); \
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\
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_sc_0 = __NR_##name; \
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_sc_16 = (long) (arg1); \
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__asm__("callsys # %0 %1 <= %2 %3" \
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: "=r"(_sc_0), "=r"(_sc_19), \
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"=r"(_sc_16) \
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: "0"(_sc_0), "2"(_sc_16) \
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: inline_syscall_clobbers, \
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"$17", "$18", "$20", "$21"); \
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_sc_ret = _sc_0, _sc_err = _sc_19; \
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#define inline_syscall1(name,arg1) \
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{ \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_16 __asm__("$16"); \
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register long _sc_19 __asm__("$19"); \
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\
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_sc_0 = __NR_##name; \
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_sc_16 = (long) (arg1); \
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__asm__("callsys # %0 %1 <= %2 %3" \
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: "=" inline_syscall_r0_constraint (_sc_0), \
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"=r"(_sc_19), "=r"(_sc_16) \
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: "0"(_sc_0), "2"(_sc_16) \
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: inline_syscall_clobbers, \
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"$17", "$18", "$20", "$21"); \
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_sc_ret = _sc_0, _sc_err = _sc_19; \
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}
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#define inline_syscall2(name,arg1,arg2) \
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{ \
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register long _sc_0 __asm__("$0"); \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_16 __asm__("$16"); \
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register long _sc_17 __asm__("$17"); \
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register long _sc_19 __asm__("$19"); \
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@ -133,8 +153,8 @@
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_sc_16 = (long) (arg1); \
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_sc_17 = (long) (arg2); \
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__asm__("callsys # %0 %1 <= %2 %3 %4" \
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: "=r"(_sc_0), "=r"(_sc_19), \
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"=r"(_sc_16), "=r"(_sc_17) \
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: "=" inline_syscall_r0_constraint (_sc_0), \
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"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17) \
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: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17) \
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: inline_syscall_clobbers, \
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"$18", "$20", "$21"); \
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@ -143,7 +163,7 @@
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#define inline_syscall3(name,arg1,arg2,arg3) \
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{ \
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register long _sc_0 __asm__("$0"); \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_16 __asm__("$16"); \
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register long _sc_17 __asm__("$17"); \
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register long _sc_18 __asm__("$18"); \
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@ -154,8 +174,9 @@
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_sc_17 = (long) (arg2); \
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_sc_18 = (long) (arg3); \
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__asm__("callsys # %0 %1 <= %2 %3 %4 %5" \
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: "=r"(_sc_0), "=r"(_sc_19), \
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"=r"(_sc_16), "=r"(_sc_17), "=r"(_sc_18) \
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: "=" inline_syscall_r0_constraint (_sc_0), \
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"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17), \
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"=r"(_sc_18) \
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: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
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"4"(_sc_18) \
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: inline_syscall_clobbers, "$20", "$21"); \
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@ -164,7 +185,7 @@
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#define inline_syscall4(name,arg1,arg2,arg3,arg4) \
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{ \
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register long _sc_0 __asm__("$0"); \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_16 __asm__("$16"); \
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register long _sc_17 __asm__("$17"); \
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register long _sc_18 __asm__("$18"); \
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@ -176,8 +197,9 @@
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_sc_18 = (long) (arg3); \
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_sc_19 = (long) (arg4); \
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__asm__("callsys # %0 %1 <= %2 %3 %4 %5 %6" \
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: "=r"(_sc_0), "=r"(_sc_19), \
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"=r"(_sc_16), "=r"(_sc_17), "=r"(_sc_18) \
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: "=" inline_syscall_r0_constraint (_sc_0), \
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"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17), \
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"=r"(_sc_18) \
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: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
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"4"(_sc_18), "1"(_sc_19) \
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: inline_syscall_clobbers, "$20", "$21"); \
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@ -186,7 +208,7 @@
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#define inline_syscall5(name,arg1,arg2,arg3,arg4,arg5) \
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{ \
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register long _sc_0 __asm__("$0"); \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_16 __asm__("$16"); \
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register long _sc_17 __asm__("$17"); \
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register long _sc_18 __asm__("$18"); \
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@ -200,9 +222,9 @@
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_sc_19 = (long) (arg4); \
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_sc_20 = (long) (arg5); \
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__asm__("callsys # %0 %1 <= %2 %3 %4 %5 %6 %7" \
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: "=r"(_sc_0), "=r"(_sc_19), \
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"=r"(_sc_16), "=r"(_sc_17), "=r"(_sc_18), \
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"=r"(_sc_20) \
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: "=" inline_syscall_r0_constraint (_sc_0), \
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"=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17), \
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"=r"(_sc_18), "=r"(_sc_20) \
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: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
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"4"(_sc_18), "1"(_sc_19), "5"(_sc_20) \
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: inline_syscall_clobbers, "$21"); \
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@ -211,7 +233,7 @@
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#define inline_syscall6(name,arg1,arg2,arg3,arg4,arg5,arg6) \
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{ \
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register long _sc_0 __asm__("$0"); \
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register long _sc_0 inline_syscall_r0_asm; \
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register long _sc_16 __asm__("$16"); \
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register long _sc_17 __asm__("$17"); \
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register long _sc_18 __asm__("$18"); \
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@ -227,9 +249,9 @@
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_sc_20 = (long) (arg5); \
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_sc_21 = (long) (arg6); \
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__asm__("callsys # %0 %1 <= %2 %3 %4 %5 %6 %7 %8" \
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: "=r"(_sc_0), "=r"(_sc_19) \
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"=r"(_sc_16), "=r"(_sc_17), "=r"(_sc_18), \
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"=r"(_sc_20), "=r"(_sc_21) \
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: "=" inline_syscall_r0_constraint (_sc_0), \
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"=r"(_sc_19) "=r"(_sc_16), "=r"(_sc_17), \
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"=r"(_sc_18), "=r"(_sc_20), "=r"(_sc_21) \
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: "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), \
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"4"(_sc_18), "1"(_sc_19), "5"(_sc_20), \
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"6"(_sc_21) \
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