Improve atomic locking for ARM.
[BZ #15640] * sysdeps/arm/bits/atomic.h (atomic_exchange_acq, atomic_exchange_rel) (atomic_compare_and_exchange_bool_acq) (atomic_compare_and_exchange_val_acq) (atomic_compare_and_exchange_bool_rel) (atomic_compare_and_exchange_val_rel): Use __atomic_exchange_n and __atomic_compare_exchange_n builtins when GCC supports them.
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@ -1,3 +1,13 @@
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2013-09-18 Dinar Temirbulatov <dtemirbulatov@gmail.com>
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[BZ #15640]
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* sysdeps/arm/bits/atomic.h (atomic_exchange_acq, atomic_exchange_rel)
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(atomic_compare_and_exchange_bool_acq)
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(atomic_compare_and_exchange_val_acq)
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(atomic_compare_and_exchange_bool_rel)
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(atomic_compare_and_exchange_val_rel): Use __atomic_exchange_n and
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__atomic_compare_exchange_n builtins when GCC supports them.
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2013-09-16 Will Newton <will.newton@linaro.org>
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2013-09-16 Will Newton <will.newton@linaro.org>
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* sysdeps/arm/armv7/multiarch/memcpy_impl.S: Tighten check
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* sysdeps/arm/armv7/multiarch/memcpy_impl.S: Tighten check
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@ -35,9 +35,6 @@ typedef uintmax_t uatomic_max_t;
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void __arm_link_error (void);
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void __arm_link_error (void);
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/* Use the atomic builtins provided by GCC in case the backend provides
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a pattern to do this efficiently. */
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#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
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#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
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# define atomic_full_barrier() __sync_synchronize ()
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# define atomic_full_barrier() __sync_synchronize ()
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#else
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#else
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@ -51,9 +48,88 @@ void __arm_link_error (void);
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# define __arm_assisted_full_barrier() __arm_link_error()
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# define __arm_assisted_full_barrier() __arm_link_error()
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#endif
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#endif
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/* Atomic compare and exchange. */
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/* Use the atomic builtins provided by GCC in case the backend provides
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a pattern to do this efficiently. */
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#if __GNUC_PREREQ (4, 7) && defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
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#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
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# define atomic_exchange_acq(mem, value) \
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__atomic_val_bysize (__arch_exchange, int, mem, value, __ATOMIC_ACQUIRE)
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# define atomic_exchange_rel(mem, value) \
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__atomic_val_bysize (__arch_exchange, int, mem, value, __ATOMIC_RELEASE)
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/* Atomic exchange (without compare). */
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# define __arch_exchange_8_int(mem, newval, model) \
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(__arm_link_error (), (typeof (*mem)) 0)
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# define __arch_exchange_16_int(mem, newval, model) \
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(__arm_link_error (), (typeof (*mem)) 0)
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# define __arch_exchange_32_int(mem, newval, model) \
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__atomic_exchange_n (mem, newval, model)
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# define __arch_exchange_64_int(mem, newval, model) \
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(__arm_link_error (), (typeof (*mem)) 0)
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/* Compare and exchange with "acquire" semantics, ie barrier after. */
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# define atomic_compare_and_exchange_bool_acq(mem, new, old) \
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__atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \
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mem, new, old, __ATOMIC_ACQUIRE)
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# define atomic_compare_and_exchange_val_acq(mem, new, old) \
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__atomic_val_bysize (__arch_compare_and_exchange_val, int, \
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mem, new, old, __ATOMIC_ACQUIRE)
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/* Compare and exchange with "release" semantics, ie barrier before. */
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# define atomic_compare_and_exchange_bool_rel(mem, new, old) \
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__atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \
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mem, new, old, __ATOMIC_RELEASE)
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# define atomic_compare_and_exchange_val_rel(mem, new, old) \
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__atomic_val_bysize (__arch_compare_and_exchange_val, int, \
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mem, new, old, __ATOMIC_RELEASE)
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/* Compare and exchange.
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For all "bool" routines, we return FALSE if exchange succesful. */
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# define __arch_compare_and_exchange_bool_8_int(mem, newval, oldval, model) \
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({__arm_link_error (); oldval; })
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# define __arch_compare_and_exchange_bool_16_int(mem, newval, oldval, model) \
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({__arm_link_error (); oldval; })
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# define __arch_compare_and_exchange_bool_32_int(mem, newval, oldval, model) \
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({ \
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typeof (*mem) __oldval = (oldval); \
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!__atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, \
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model, __ATOMIC_RELAXED); \
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})
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# define __arch_compare_and_exchange_bool_64_int(mem, newval, oldval, model) \
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({__arm_link_error (); oldval; })
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# define __arch_compare_and_exchange_val_8_int(mem, newval, oldval, model) \
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({__arm_link_error (); oldval; })
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# define __arch_compare_and_exchange_val_16_int(mem, newval, oldval, model) \
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({__arm_link_error (); oldval; })
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# define __arch_compare_and_exchange_val_32_int(mem, newval, oldval, model) \
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({ \
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typeof (*mem) __oldval = (oldval); \
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__atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, \
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model, __ATOMIC_RELAXED); \
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__oldval; \
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})
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# define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \
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({__arm_link_error (); oldval; })
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#elif defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
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/* Atomic compare and exchange. */
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# define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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# define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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__sync_val_compare_and_swap ((mem), (oldval), (newval))
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__sync_val_compare_and_swap ((mem), (oldval), (newval))
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#else
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#else
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@ -61,6 +137,7 @@ void __arm_link_error (void);
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__arm_assisted_compare_and_exchange_val_32_acq ((mem), (newval), (oldval))
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__arm_assisted_compare_and_exchange_val_32_acq ((mem), (newval), (oldval))
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#endif
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#endif
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#if !__GNUC_PREREQ (4, 7) || !defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4)
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/* We don't support atomic operations on any non-word types.
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/* We don't support atomic operations on any non-word types.
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So make them link errors. */
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So make them link errors. */
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# define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \
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# define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \
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@ -71,6 +148,7 @@ void __arm_link_error (void);
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# define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
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# define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
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({ __arm_link_error (); oldval; })
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({ __arm_link_error (); oldval; })
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#endif
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/* An OS-specific bits/atomic.h file will define this macro if
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/* An OS-specific bits/atomic.h file will define this macro if
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the OS can provide something. If not, we'll fail to build
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the OS can provide something. If not, we'll fail to build
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