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Rearranged structure so machine-dependent portion is laid out like `struct 

mips_thread_state; struct mips_exc_state; struct mips_float_state;'.
This commit is contained in:
Roland McGrath 1994-08-03 16:32:47 +00:00
parent b8f04323dc
commit d85eb528c4
1 changed files with 23 additions and 3 deletions
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26
sysdeps/mach/hurd/mips/sigcontext.h
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@ -31,11 +31,31 @@ struct sigcontext
/* Port this thread is doing an interruptible RPC on. */
unsigned int sc_intr_port;
/* These four elements are laid out just like a `struct mips_thread_state';
/* The rest of this structure is written to be laid out identically
to:
{
struct mips_thread_state ts;
struct mips_exc_state es;
struct mips_float_state fs;
}
trampoline.c knows this, so it must be changed if this changes. */
int sc_gpr[31]; /* "General" registers; [0] is r1. */
int sc_pc; /* Instruction pointer. */
int sc_mdlo, sc_mdhi; /* High and low multiplication results. */
int sc_pc; /* Instruction pointer. */
int sc_ps; /* Processor status. */
/* struct mips_exc_state */
unsigned int sc_cause; /* Machine-level trap code. */
#define SC_CAUSE_SST 0x00000044
unsigned int sc_badvaddr;
unsigned int sc_coproc_used; /* Which coprocessors the thread has used. */
#define SC_COPROC_USE_COP0 1 /* (by definition) */
#define SC_COPROC_USE_COP1 2 /* FPA */
#define SC_COPROC_USE_FPU SC_COPROC_USE_COP1
#define SC_COPROC_USE_COP2 4
#define SC_COPROC_USE_COP3 8
/* struct mips_float_state */
int sc_fpr[32]; /* FP registers. */
int sc_fpcsr; /* FPU status register. */
int sc_fpeir; /* FP exception instruction register. */
};