Fix powerpc32 ceil, rint etc. on sNaN input (bug 20160).
The powerpc32 versions of ceil, floor, round, trunc, rint, nearbyint and their float versions return sNaN for sNaN input when they should return qNaN. This patch fixes them to add a NaN argument to itself to quiet sNaNs before returning. The powerpc64 versions, which have the same bug, will be addressed separately. Tested for powerpc32. [BZ #20160] * sysdeps/powerpc/powerpc32/fpu/s_ceil.S (__ceil): Add NaN argument to itself before returning the result. * sysdeps/powerpc/powerpc32/fpu/s_ceilf.S (__ceilf): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_floor.S (__floor): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_floorf.S (__floorf): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S (__nearbyint): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S (__nearbyintf): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_rint.S (__rint): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_rintf.S (__rintf): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_round.S (__round): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_roundf.S (__roundf): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_trunc.S (__trunc): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_truncf.S (__truncf): Likewise.
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ChangeLog
19
ChangeLog
@ -1,3 +1,22 @@
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2016-05-27 Joseph Myers <joseph@codesourcery.com>
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[BZ #20160]
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* sysdeps/powerpc/powerpc32/fpu/s_ceil.S (__ceil): Add NaN
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argument to itself before returning the result.
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* sysdeps/powerpc/powerpc32/fpu/s_ceilf.S (__ceilf): Likewise.
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* sysdeps/powerpc/powerpc32/fpu/s_floor.S (__floor): Likewise.
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* sysdeps/powerpc/powerpc32/fpu/s_floorf.S (__floorf): Likewise.
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* sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S (__nearbyint):
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Likewise.
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* sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S (__nearbyintf):
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Likewise.
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* sysdeps/powerpc/powerpc32/fpu/s_rint.S (__rint): Likewise.
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* sysdeps/powerpc/powerpc32/fpu/s_rintf.S (__rintf): Likewise.
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* sysdeps/powerpc/powerpc32/fpu/s_round.S (__round): Likewise.
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* sysdeps/powerpc/powerpc32/fpu/s_roundf.S (__roundf): Likewise.
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* sysdeps/powerpc/powerpc32/fpu/s_trunc.S (__trunc): Likewise.
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* sysdeps/powerpc/powerpc32/fpu/s_truncf.S (__truncf): Likewise.
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2016-05-27 Paul E. Murphy <murphyp@linux.vnet.ibm.com>
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2016-05-27 Paul E. Murphy <murphyp@linux.vnet.ibm.com>
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* libm-test.inc: Replace usage of M_El with
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* libm-test.inc: Replace usage of M_El with
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@ -44,7 +44,7 @@ ENTRY (__ceil)
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mffs fp11 /* Save current FPU rounding mode and
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mffs fp11 /* Save current FPU rounding mode and
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"inexact" state. */
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"inexact" state. */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr- cr7
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bnl- cr7,.L10
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mtfsfi 7,2 /* Set rounding mode toward +inf. */
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mtfsfi 7,2 /* Set rounding mode toward +inf. */
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ble- cr6,.L4
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ble- cr6,.L4
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fadd fp1,fp1,fp13 /* x+= TWO52; */
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fadd fp1,fp1,fp13 /* x+= TWO52; */
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@ -64,6 +64,12 @@ ENTRY (__ceil)
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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"inexact" state. */
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blr
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blr
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.L10:
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/* Ensure sNaN input is converted to qNaN. */
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fcmpu cr7,fp1,fp1
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beqlr cr7
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fadd fp1,fp1,fp1
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blr
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END (__ceil)
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END (__ceil)
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weak_alias (__ceil, ceil)
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weak_alias (__ceil, ceil)
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@ -43,7 +43,7 @@ ENTRY (__ceilf)
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mffs fp11 /* Save current FPU rounding mode and
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mffs fp11 /* Save current FPU rounding mode and
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"inexact" state. */
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"inexact" state. */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr- cr7
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bnl- cr7,.L10
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mtfsfi 7,2 /* Set rounding mode toward +inf. */
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mtfsfi 7,2 /* Set rounding mode toward +inf. */
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ble- cr6,.L4
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ble- cr6,.L4
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fadds fp1,fp1,fp13 /* x+= TWO23; */
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fadds fp1,fp1,fp13 /* x+= TWO23; */
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@ -63,6 +63,12 @@ ENTRY (__ceilf)
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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"inexact" state. */
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blr
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blr
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.L10:
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/* Ensure sNaN input is converted to qNaN. */
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fcmpu cr7,fp1,fp1
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beqlr cr7
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fadds fp1,fp1,fp1
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blr
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END (__ceilf)
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END (__ceilf)
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weak_alias (__ceilf, ceilf)
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weak_alias (__ceilf, ceilf)
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@ -44,7 +44,7 @@ ENTRY (__floor)
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mffs fp11 /* Save current FPU rounding mode and
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mffs fp11 /* Save current FPU rounding mode and
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"inexact" state. */
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"inexact" state. */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr- cr7
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bnl- cr7,.L10
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mtfsfi 7,3 /* Set rounding mode toward -inf. */
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mtfsfi 7,3 /* Set rounding mode toward -inf. */
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ble- cr6,.L4
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ble- cr6,.L4
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fadd fp1,fp1,fp13 /* x+= TWO52; */
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fadd fp1,fp1,fp13 /* x+= TWO52; */
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@ -64,6 +64,12 @@ ENTRY (__floor)
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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"inexact" state. */
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blr
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blr
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.L10:
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/* Ensure sNaN input is converted to qNaN. */
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fcmpu cr7,fp1,fp1
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beqlr cr7
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fadd fp1,fp1,fp1
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blr
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END (__floor)
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END (__floor)
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weak_alias (__floor, floor)
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weak_alias (__floor, floor)
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@ -43,7 +43,7 @@ ENTRY (__floorf)
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mffs fp11 /* Save current FPU rounding mode and
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mffs fp11 /* Save current FPU rounding mode and
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"inexact" state. */
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"inexact" state. */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr- cr7
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bnl- cr7,.L10
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mtfsfi 7,3 /* Set rounding mode toward -inf. */
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mtfsfi 7,3 /* Set rounding mode toward -inf. */
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ble- cr6,.L4
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ble- cr6,.L4
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fadds fp1,fp1,fp13 /* x+= TWO23; */
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fadds fp1,fp1,fp13 /* x+= TWO23; */
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@ -63,6 +63,12 @@ ENTRY (__floorf)
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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"inexact" state. */
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blr
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blr
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.L10:
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/* Ensure sNaN input is converted to qNaN. */
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fcmpu cr7,fp1,fp1
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beqlr cr7
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fadds fp1,fp1,fp1
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blr
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END (__floorf)
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END (__floorf)
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weak_alias (__floorf, floorf)
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weak_alias (__floorf, floorf)
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@ -49,7 +49,7 @@ ENTRY (__nearbyint)
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fabs fp0,fp1
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fabs fp0,fp1
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fsub fp12,fp13,fp13 /* generate 0.0 */
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fsub fp12,fp13,fp13 /* generate 0.0 */
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fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52 */
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fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52 */
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bgelr cr7
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bge cr7,.L10
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fcmpu cr7,fp1,fp12 /* if (x > 0.0 */
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fcmpu cr7,fp1,fp12 /* if (x > 0.0 */
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ble cr7,L(lessthanzero)
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ble cr7,L(lessthanzero)
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mffs fp11
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mffs fp11
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@ -68,6 +68,12 @@ L(lessthanzero):
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fnabs fp1,fp1 /* if (x == 0.0) */
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fnabs fp1,fp1 /* if (x == 0.0) */
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mtfsf 0xff,fp11 /* Restore FE_INEXACT state. */
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mtfsf 0xff,fp11 /* Restore FE_INEXACT state. */
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blr
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blr
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.L10:
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/* Ensure sNaN input is converted to qNaN. */
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fcmpu cr7,fp1,fp1
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beqlr cr7
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fadd fp1,fp1,fp1
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blr
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END (__nearbyint)
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END (__nearbyint)
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weak_alias (__nearbyint, nearbyint)
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weak_alias (__nearbyint, nearbyint)
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@ -48,7 +48,7 @@ ENTRY (__nearbyintf)
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fabs fp0,fp1
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fabs fp0,fp1
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fsub fp12,fp13,fp13 /* generate 0.0 */
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fsub fp12,fp13,fp13 /* generate 0.0 */
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fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23 */
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fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23 */
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bgelr cr7
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bge cr7,.L10
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fcmpu cr7,fp1,fp12 /* if (x > 0.0 */
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fcmpu cr7,fp1,fp12 /* if (x > 0.0 */
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ble cr7,L(lessthanzero)
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ble cr7,L(lessthanzero)
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mffs fp11
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mffs fp11
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@ -67,6 +67,12 @@ L(lessthanzero):
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fnabs fp1,fp1 /* if (x == 0.0) */
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fnabs fp1,fp1 /* if (x == 0.0) */
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mtfsf 0xff,fp11 /* Restore FE_INEXACT state. */
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mtfsf 0xff,fp11 /* Restore FE_INEXACT state. */
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blr
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blr
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.L10:
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/* Ensure sNaN input is converted to qNaN. */
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fcmpu cr7,fp1,fp1
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beqlr cr7
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fadds fp1,fp1,fp1
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blr
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END (__nearbyintf)
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END (__nearbyintf)
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weak_alias (__nearbyintf, nearbyintf)
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weak_alias (__nearbyintf, nearbyintf)
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@ -45,7 +45,7 @@ ENTRY (__rint)
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fsub fp12,fp13,fp13 /* generate 0.0 */
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fsub fp12,fp13,fp13 /* generate 0.0 */
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fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */
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fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr cr7
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bnl cr7,.L10
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bng cr6,.L4
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bng cr6,.L4
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fadd fp1,fp1,fp13 /* x+= TWO52; */
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fadd fp1,fp1,fp13 /* x+= TWO52; */
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fsub fp1,fp1,fp13 /* x-= TWO52; */
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fsub fp1,fp1,fp13 /* x-= TWO52; */
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@ -57,6 +57,12 @@ ENTRY (__rint)
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fadd fp1,fp1,fp13 /* x+= TWO52; */
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fadd fp1,fp1,fp13 /* x+= TWO52; */
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fnabs fp1,fp1 /* if (x == 0.0) */
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fnabs fp1,fp1 /* if (x == 0.0) */
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blr /* x = -0.0; */
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blr /* x = -0.0; */
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.L10:
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/* Ensure sNaN input is converted to qNaN. */
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fcmpu cr7,fp1,fp1
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beqlr cr7
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fadd fp1,fp1,fp1
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blr
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END (__rint)
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END (__rint)
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weak_alias (__rint, rint)
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weak_alias (__rint, rint)
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@ -41,7 +41,7 @@ ENTRY (__rintf)
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fsubs fp12,fp13,fp13 /* generate 0.0 */
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fsubs fp12,fp13,fp13 /* generate 0.0 */
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fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */
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fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr cr7
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bnl cr7,.L10
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bng cr6,.L4
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bng cr6,.L4
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fadds fp1,fp1,fp13 /* x+= TWO23; */
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fadds fp1,fp1,fp13 /* x+= TWO23; */
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fsubs fp1,fp1,fp13 /* x-= TWO23; */
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fsubs fp1,fp1,fp13 /* x-= TWO23; */
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@ -53,6 +53,12 @@ ENTRY (__rintf)
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fadds fp1,fp1,fp13 /* x+= TWO23; */
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fadds fp1,fp1,fp13 /* x+= TWO23; */
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fnabs fp1,fp1 /* if (x == 0.0) */
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fnabs fp1,fp1 /* if (x == 0.0) */
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blr /* x = -0.0; */
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blr /* x = -0.0; */
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.L10:
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/* Ensure sNaN input is converted to qNaN. */
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fcmpu cr7,fp1,fp1
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beqlr cr7
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fadds fp1,fp1,fp1
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blr
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END (__rintf)
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END (__rintf)
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weak_alias (__rintf, rintf)
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weak_alias (__rintf, rintf)
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@ -57,7 +57,7 @@ ENTRY (__round)
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mffs fp11 /* Save current FPU rounding mode and
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mffs fp11 /* Save current FPU rounding mode and
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"inexact" state. */
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"inexact" state. */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr- cr7
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bnl- cr7,.L10
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mtfsfi 7,1 /* Set rounding mode toward 0. */
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mtfsfi 7,1 /* Set rounding mode toward 0. */
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#ifdef SHARED
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#ifdef SHARED
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lfs fp10,.LC1-.LC0(r9)
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lfs fp10,.LC1-.LC0(r9)
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@ -85,6 +85,12 @@ ENTRY (__round)
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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"inexact" state. */
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blr
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blr
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.L10:
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/* Ensure sNaN input is converted to qNaN. */
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fcmpu cr7,fp1,fp1
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beqlr cr7
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fadd fp1,fp1,fp1
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blr
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END (__round)
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END (__round)
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weak_alias (__round, round)
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weak_alias (__round, round)
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@ -56,7 +56,7 @@ ENTRY (__roundf )
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mffs fp11 /* Save current FPU rounding mode and
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mffs fp11 /* Save current FPU rounding mode and
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"inexact" state. */
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"inexact" state. */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr- cr7
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bnl- cr7,.L10
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mtfsfi 7,1 /* Set rounding mode toward 0. */
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mtfsfi 7,1 /* Set rounding mode toward 0. */
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#ifdef SHARED
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#ifdef SHARED
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lfs fp10,.LC1-.LC0(r9)
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lfs fp10,.LC1-.LC0(r9)
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@ -83,6 +83,12 @@ ENTRY (__roundf )
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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"inexact" state. */
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blr
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blr
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.L10:
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/* Ensure sNaN input is converted to qNaN. */
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fcmpu cr7,fp1,fp1
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beqlr cr7
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fadds fp1,fp1,fp1
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blr
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END (__roundf)
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END (__roundf)
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weak_alias (__roundf, roundf)
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weak_alias (__roundf, roundf)
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@ -51,7 +51,7 @@ ENTRY (__trunc)
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mffs fp11 /* Save current FPU rounding mode and
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mffs fp11 /* Save current FPU rounding mode and
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"inexact" state. */
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"inexact" state. */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr- cr7
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bnl- cr7,.L10
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mtfsfi 7,1 /* Set rounding toward 0 mode. */
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mtfsfi 7,1 /* Set rounding toward 0 mode. */
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ble- cr6,.L4
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ble- cr6,.L4
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fadd fp1,fp1,fp13 /* x+= TWO52; */
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fadd fp1,fp1,fp13 /* x+= TWO52; */
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@ -71,6 +71,12 @@ ENTRY (__trunc)
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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"inexact" state. */
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blr
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blr
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.L10:
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/* Ensure sNaN input is converted to qNaN. */
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fcmpu cr7,fp1,fp1
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beqlr cr7
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fadd fp1,fp1,fp1
|
||||||
|
blr
|
||||||
END (__trunc)
|
END (__trunc)
|
||||||
|
|
||||||
weak_alias (__trunc, trunc)
|
weak_alias (__trunc, trunc)
|
||||||
|
@ -50,7 +50,7 @@ ENTRY (__truncf)
|
|||||||
mffs fp11 /* Save current FPU rounding mode and
|
mffs fp11 /* Save current FPU rounding mode and
|
||||||
"inexact" state. */
|
"inexact" state. */
|
||||||
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
|
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
|
||||||
bnllr- cr7
|
bnl- cr7,.L10
|
||||||
mtfsfi 7,1 /* Set rounding toward 0 mode. */
|
mtfsfi 7,1 /* Set rounding toward 0 mode. */
|
||||||
ble- cr6,.L4
|
ble- cr6,.L4
|
||||||
fadds fp1,fp1,fp13 /* x+= TWO23; */
|
fadds fp1,fp1,fp13 /* x+= TWO23; */
|
||||||
@ -70,6 +70,12 @@ ENTRY (__truncf)
|
|||||||
mtfsf 0xff,fp11 /* Restore previous rounding mode and
|
mtfsf 0xff,fp11 /* Restore previous rounding mode and
|
||||||
"inexact" state. */
|
"inexact" state. */
|
||||||
blr
|
blr
|
||||||
|
.L10:
|
||||||
|
/* Ensure sNaN input is converted to qNaN. */
|
||||||
|
fcmpu cr7,fp1,fp1
|
||||||
|
beqlr cr7
|
||||||
|
fadds fp1,fp1,fp1
|
||||||
|
blr
|
||||||
END (__truncf)
|
END (__truncf)
|
||||||
|
|
||||||
weak_alias (__truncf, truncf)
|
weak_alias (__truncf, truncf)
|
||||||
|
Loading…
Reference in New Issue
Block a user