Fix powerpc32 ceil, rint etc. on sNaN input (bug 20160).

The powerpc32 versions of ceil, floor, round, trunc, rint, nearbyint
and their float versions return sNaN for sNaN input when they should
return qNaN.  This patch fixes them to add a NaN argument to itself to
quiet sNaNs before returning.  The powerpc64 versions, which have the
same bug, will be addressed separately.

Tested for powerpc32.

	[BZ #20160]
	* sysdeps/powerpc/powerpc32/fpu/s_ceil.S (__ceil): Add NaN
	argument to itself before returning the result.
	* sysdeps/powerpc/powerpc32/fpu/s_ceilf.S (__ceilf): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_floor.S (__floor): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_floorf.S (__floorf): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S (__nearbyint):
	Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S (__nearbyintf):
	Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_rint.S (__rint): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_rintf.S (__rintf): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_round.S (__round): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_roundf.S (__roundf): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_trunc.S (__trunc): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_truncf.S (__truncf): Likewise.
This commit is contained in:
Joseph Myers 2016-05-27 17:31:21 +00:00
parent f64f68f53b
commit debf7618f6
13 changed files with 103 additions and 12 deletions

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@ -1,3 +1,22 @@
2016-05-27 Joseph Myers <joseph@codesourcery.com>
[BZ #20160]
* sysdeps/powerpc/powerpc32/fpu/s_ceil.S (__ceil): Add NaN
argument to itself before returning the result.
* sysdeps/powerpc/powerpc32/fpu/s_ceilf.S (__ceilf): Likewise.
* sysdeps/powerpc/powerpc32/fpu/s_floor.S (__floor): Likewise.
* sysdeps/powerpc/powerpc32/fpu/s_floorf.S (__floorf): Likewise.
* sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S (__nearbyint):
Likewise.
* sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S (__nearbyintf):
Likewise.
* sysdeps/powerpc/powerpc32/fpu/s_rint.S (__rint): Likewise.
* sysdeps/powerpc/powerpc32/fpu/s_rintf.S (__rintf): Likewise.
* sysdeps/powerpc/powerpc32/fpu/s_round.S (__round): Likewise.
* sysdeps/powerpc/powerpc32/fpu/s_roundf.S (__roundf): Likewise.
* sysdeps/powerpc/powerpc32/fpu/s_trunc.S (__trunc): Likewise.
* sysdeps/powerpc/powerpc32/fpu/s_truncf.S (__truncf): Likewise.
2016-05-27 Paul E. Murphy <murphyp@linux.vnet.ibm.com> 2016-05-27 Paul E. Murphy <murphyp@linux.vnet.ibm.com>
* libm-test.inc: Replace usage of M_El with * libm-test.inc: Replace usage of M_El with

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@ -44,7 +44,7 @@ ENTRY (__ceil)
mffs fp11 /* Save current FPU rounding mode and mffs fp11 /* Save current FPU rounding mode and
"inexact" state. */ "inexact" state. */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
bnllr- cr7 bnl- cr7,.L10
mtfsfi 7,2 /* Set rounding mode toward +inf. */ mtfsfi 7,2 /* Set rounding mode toward +inf. */
ble- cr6,.L4 ble- cr6,.L4
fadd fp1,fp1,fp13 /* x+= TWO52; */ fadd fp1,fp1,fp13 /* x+= TWO52; */
@ -64,6 +64,12 @@ ENTRY (__ceil)
mtfsf 0xff,fp11 /* Restore previous rounding mode and mtfsf 0xff,fp11 /* Restore previous rounding mode and
"inexact" state. */ "inexact" state. */
blr blr
.L10:
/* Ensure sNaN input is converted to qNaN. */
fcmpu cr7,fp1,fp1
beqlr cr7
fadd fp1,fp1,fp1
blr
END (__ceil) END (__ceil)
weak_alias (__ceil, ceil) weak_alias (__ceil, ceil)

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@ -43,7 +43,7 @@ ENTRY (__ceilf)
mffs fp11 /* Save current FPU rounding mode and mffs fp11 /* Save current FPU rounding mode and
"inexact" state. */ "inexact" state. */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
bnllr- cr7 bnl- cr7,.L10
mtfsfi 7,2 /* Set rounding mode toward +inf. */ mtfsfi 7,2 /* Set rounding mode toward +inf. */
ble- cr6,.L4 ble- cr6,.L4
fadds fp1,fp1,fp13 /* x+= TWO23; */ fadds fp1,fp1,fp13 /* x+= TWO23; */
@ -63,6 +63,12 @@ ENTRY (__ceilf)
mtfsf 0xff,fp11 /* Restore previous rounding mode and mtfsf 0xff,fp11 /* Restore previous rounding mode and
"inexact" state. */ "inexact" state. */
blr blr
.L10:
/* Ensure sNaN input is converted to qNaN. */
fcmpu cr7,fp1,fp1
beqlr cr7
fadds fp1,fp1,fp1
blr
END (__ceilf) END (__ceilf)
weak_alias (__ceilf, ceilf) weak_alias (__ceilf, ceilf)

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@ -44,7 +44,7 @@ ENTRY (__floor)
mffs fp11 /* Save current FPU rounding mode and mffs fp11 /* Save current FPU rounding mode and
"inexact" state. */ "inexact" state. */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
bnllr- cr7 bnl- cr7,.L10
mtfsfi 7,3 /* Set rounding mode toward -inf. */ mtfsfi 7,3 /* Set rounding mode toward -inf. */
ble- cr6,.L4 ble- cr6,.L4
fadd fp1,fp1,fp13 /* x+= TWO52; */ fadd fp1,fp1,fp13 /* x+= TWO52; */
@ -64,6 +64,12 @@ ENTRY (__floor)
mtfsf 0xff,fp11 /* Restore previous rounding mode and mtfsf 0xff,fp11 /* Restore previous rounding mode and
"inexact" state. */ "inexact" state. */
blr blr
.L10:
/* Ensure sNaN input is converted to qNaN. */
fcmpu cr7,fp1,fp1
beqlr cr7
fadd fp1,fp1,fp1
blr
END (__floor) END (__floor)
weak_alias (__floor, floor) weak_alias (__floor, floor)

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@ -43,7 +43,7 @@ ENTRY (__floorf)
mffs fp11 /* Save current FPU rounding mode and mffs fp11 /* Save current FPU rounding mode and
"inexact" state. */ "inexact" state. */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
bnllr- cr7 bnl- cr7,.L10
mtfsfi 7,3 /* Set rounding mode toward -inf. */ mtfsfi 7,3 /* Set rounding mode toward -inf. */
ble- cr6,.L4 ble- cr6,.L4
fadds fp1,fp1,fp13 /* x+= TWO23; */ fadds fp1,fp1,fp13 /* x+= TWO23; */
@ -63,6 +63,12 @@ ENTRY (__floorf)
mtfsf 0xff,fp11 /* Restore previous rounding mode and mtfsf 0xff,fp11 /* Restore previous rounding mode and
"inexact" state. */ "inexact" state. */
blr blr
.L10:
/* Ensure sNaN input is converted to qNaN. */
fcmpu cr7,fp1,fp1
beqlr cr7
fadds fp1,fp1,fp1
blr
END (__floorf) END (__floorf)
weak_alias (__floorf, floorf) weak_alias (__floorf, floorf)

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@ -49,7 +49,7 @@ ENTRY (__nearbyint)
fabs fp0,fp1 fabs fp0,fp1
fsub fp12,fp13,fp13 /* generate 0.0 */ fsub fp12,fp13,fp13 /* generate 0.0 */
fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52 */
bgelr cr7 bge cr7,.L10
fcmpu cr7,fp1,fp12 /* if (x > 0.0 */ fcmpu cr7,fp1,fp12 /* if (x > 0.0 */
ble cr7,L(lessthanzero) ble cr7,L(lessthanzero)
mffs fp11 mffs fp11
@ -68,6 +68,12 @@ L(lessthanzero):
fnabs fp1,fp1 /* if (x == 0.0) */ fnabs fp1,fp1 /* if (x == 0.0) */
mtfsf 0xff,fp11 /* Restore FE_INEXACT state. */ mtfsf 0xff,fp11 /* Restore FE_INEXACT state. */
blr blr
.L10:
/* Ensure sNaN input is converted to qNaN. */
fcmpu cr7,fp1,fp1
beqlr cr7
fadd fp1,fp1,fp1
blr
END (__nearbyint) END (__nearbyint)
weak_alias (__nearbyint, nearbyint) weak_alias (__nearbyint, nearbyint)

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@ -48,7 +48,7 @@ ENTRY (__nearbyintf)
fabs fp0,fp1 fabs fp0,fp1
fsub fp12,fp13,fp13 /* generate 0.0 */ fsub fp12,fp13,fp13 /* generate 0.0 */
fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23 */
bgelr cr7 bge cr7,.L10
fcmpu cr7,fp1,fp12 /* if (x > 0.0 */ fcmpu cr7,fp1,fp12 /* if (x > 0.0 */
ble cr7,L(lessthanzero) ble cr7,L(lessthanzero)
mffs fp11 mffs fp11
@ -67,6 +67,12 @@ L(lessthanzero):
fnabs fp1,fp1 /* if (x == 0.0) */ fnabs fp1,fp1 /* if (x == 0.0) */
mtfsf 0xff,fp11 /* Restore FE_INEXACT state. */ mtfsf 0xff,fp11 /* Restore FE_INEXACT state. */
blr blr
.L10:
/* Ensure sNaN input is converted to qNaN. */
fcmpu cr7,fp1,fp1
beqlr cr7
fadds fp1,fp1,fp1
blr
END (__nearbyintf) END (__nearbyintf)
weak_alias (__nearbyintf, nearbyintf) weak_alias (__nearbyintf, nearbyintf)

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@ -45,7 +45,7 @@ ENTRY (__rint)
fsub fp12,fp13,fp13 /* generate 0.0 */ fsub fp12,fp13,fp13 /* generate 0.0 */
fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
bnllr cr7 bnl cr7,.L10
bng cr6,.L4 bng cr6,.L4
fadd fp1,fp1,fp13 /* x+= TWO52; */ fadd fp1,fp1,fp13 /* x+= TWO52; */
fsub fp1,fp1,fp13 /* x-= TWO52; */ fsub fp1,fp1,fp13 /* x-= TWO52; */
@ -57,6 +57,12 @@ ENTRY (__rint)
fadd fp1,fp1,fp13 /* x+= TWO52; */ fadd fp1,fp1,fp13 /* x+= TWO52; */
fnabs fp1,fp1 /* if (x == 0.0) */ fnabs fp1,fp1 /* if (x == 0.0) */
blr /* x = -0.0; */ blr /* x = -0.0; */
.L10:
/* Ensure sNaN input is converted to qNaN. */
fcmpu cr7,fp1,fp1
beqlr cr7
fadd fp1,fp1,fp1
blr
END (__rint) END (__rint)
weak_alias (__rint, rint) weak_alias (__rint, rint)

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@ -41,7 +41,7 @@ ENTRY (__rintf)
fsubs fp12,fp13,fp13 /* generate 0.0 */ fsubs fp12,fp13,fp13 /* generate 0.0 */
fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
bnllr cr7 bnl cr7,.L10
bng cr6,.L4 bng cr6,.L4
fadds fp1,fp1,fp13 /* x+= TWO23; */ fadds fp1,fp1,fp13 /* x+= TWO23; */
fsubs fp1,fp1,fp13 /* x-= TWO23; */ fsubs fp1,fp1,fp13 /* x-= TWO23; */
@ -53,6 +53,12 @@ ENTRY (__rintf)
fadds fp1,fp1,fp13 /* x+= TWO23; */ fadds fp1,fp1,fp13 /* x+= TWO23; */
fnabs fp1,fp1 /* if (x == 0.0) */ fnabs fp1,fp1 /* if (x == 0.0) */
blr /* x = -0.0; */ blr /* x = -0.0; */
.L10:
/* Ensure sNaN input is converted to qNaN. */
fcmpu cr7,fp1,fp1
beqlr cr7
fadds fp1,fp1,fp1
blr
END (__rintf) END (__rintf)
weak_alias (__rintf, rintf) weak_alias (__rintf, rintf)

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@ -57,7 +57,7 @@ ENTRY (__round)
mffs fp11 /* Save current FPU rounding mode and mffs fp11 /* Save current FPU rounding mode and
"inexact" state. */ "inexact" state. */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
bnllr- cr7 bnl- cr7,.L10
mtfsfi 7,1 /* Set rounding mode toward 0. */ mtfsfi 7,1 /* Set rounding mode toward 0. */
#ifdef SHARED #ifdef SHARED
lfs fp10,.LC1-.LC0(r9) lfs fp10,.LC1-.LC0(r9)
@ -85,6 +85,12 @@ ENTRY (__round)
mtfsf 0xff,fp11 /* Restore previous rounding mode and mtfsf 0xff,fp11 /* Restore previous rounding mode and
"inexact" state. */ "inexact" state. */
blr blr
.L10:
/* Ensure sNaN input is converted to qNaN. */
fcmpu cr7,fp1,fp1
beqlr cr7
fadd fp1,fp1,fp1
blr
END (__round) END (__round)
weak_alias (__round, round) weak_alias (__round, round)

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@ -56,7 +56,7 @@ ENTRY (__roundf )
mffs fp11 /* Save current FPU rounding mode and mffs fp11 /* Save current FPU rounding mode and
"inexact" state. */ "inexact" state. */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
bnllr- cr7 bnl- cr7,.L10
mtfsfi 7,1 /* Set rounding mode toward 0. */ mtfsfi 7,1 /* Set rounding mode toward 0. */
#ifdef SHARED #ifdef SHARED
lfs fp10,.LC1-.LC0(r9) lfs fp10,.LC1-.LC0(r9)
@ -83,6 +83,12 @@ ENTRY (__roundf )
mtfsf 0xff,fp11 /* Restore previous rounding mode and mtfsf 0xff,fp11 /* Restore previous rounding mode and
"inexact" state. */ "inexact" state. */
blr blr
.L10:
/* Ensure sNaN input is converted to qNaN. */
fcmpu cr7,fp1,fp1
beqlr cr7
fadds fp1,fp1,fp1
blr
END (__roundf) END (__roundf)
weak_alias (__roundf, roundf) weak_alias (__roundf, roundf)

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@ -51,7 +51,7 @@ ENTRY (__trunc)
mffs fp11 /* Save current FPU rounding mode and mffs fp11 /* Save current FPU rounding mode and
"inexact" state. */ "inexact" state. */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
bnllr- cr7 bnl- cr7,.L10
mtfsfi 7,1 /* Set rounding toward 0 mode. */ mtfsfi 7,1 /* Set rounding toward 0 mode. */
ble- cr6,.L4 ble- cr6,.L4
fadd fp1,fp1,fp13 /* x+= TWO52; */ fadd fp1,fp1,fp13 /* x+= TWO52; */
@ -71,6 +71,12 @@ ENTRY (__trunc)
mtfsf 0xff,fp11 /* Restore previous rounding mode and mtfsf 0xff,fp11 /* Restore previous rounding mode and
"inexact" state. */ "inexact" state. */
blr blr
.L10:
/* Ensure sNaN input is converted to qNaN. */
fcmpu cr7,fp1,fp1
beqlr cr7
fadd fp1,fp1,fp1
blr
END (__trunc) END (__trunc)
weak_alias (__trunc, trunc) weak_alias (__trunc, trunc)

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@ -50,7 +50,7 @@ ENTRY (__truncf)
mffs fp11 /* Save current FPU rounding mode and mffs fp11 /* Save current FPU rounding mode and
"inexact" state. */ "inexact" state. */
fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
bnllr- cr7 bnl- cr7,.L10
mtfsfi 7,1 /* Set rounding toward 0 mode. */ mtfsfi 7,1 /* Set rounding toward 0 mode. */
ble- cr6,.L4 ble- cr6,.L4
fadds fp1,fp1,fp13 /* x+= TWO23; */ fadds fp1,fp1,fp13 /* x+= TWO23; */
@ -70,6 +70,12 @@ ENTRY (__truncf)
mtfsf 0xff,fp11 /* Restore previous rounding mode and mtfsf 0xff,fp11 /* Restore previous rounding mode and
"inexact" state. */ "inexact" state. */
blr blr
.L10:
/* Ensure sNaN input is converted to qNaN. */
fcmpu cr7,fp1,fp1
beqlr cr7
fadds fp1,fp1,fp1
blr
END (__truncf) END (__truncf)
weak_alias (__truncf, truncf) weak_alias (__truncf, truncf)