* sysdeps/unix/sysv/linux/i386/sysconf.c (intel_check_word):
Update handling of cache descriptor 0x49 for new models. * sysdeps/unix/sysv/linux/x86_64/sysconf.c (intel_check_word): Likewise.
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@ -1,3 +1,10 @@
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2006-11-05 Ulrich Drepper <drepper@redhat.com>
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* sysdeps/unix/sysv/linux/i386/sysconf.c (intel_check_word):
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Update handling of cache descriptor 0x49 for new models.
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* sysdeps/unix/sysv/linux/x86_64/sysconf.c (intel_check_word):
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Likewise.
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2006-11-02 Jakub Jelinek <jakub@redhat.com>
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2006-11-02 Jakub Jelinek <jakub@redhat.com>
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* malloc/memusage.c (dest): Reset not_me back to false after
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* malloc/memusage.c (dest): Reset not_me back to false after
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@ -97,7 +97,7 @@ static const struct intel_02_cache_info
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{ 0x45, _SC_LEVEL2_CACHE_SIZE, 2097152, 4, 32 },
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{ 0x45, _SC_LEVEL2_CACHE_SIZE, 2097152, 4, 32 },
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{ 0x46, _SC_LEVEL3_CACHE_SIZE, 4194304, 4, 64 },
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{ 0x46, _SC_LEVEL3_CACHE_SIZE, 4194304, 4, 64 },
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{ 0x47, _SC_LEVEL3_CACHE_SIZE, 8388608, 8, 64 },
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{ 0x47, _SC_LEVEL3_CACHE_SIZE, 8388608, 8, 64 },
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{ 0x49, _SC_LEVEL3_CACHE_SIZE, 4194304, 16, 64 },
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{ 0x49, _SC_LEVEL2_CACHE_SIZE, 4194304, 16, 64 },
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{ 0x4a, _SC_LEVEL3_CACHE_SIZE, 6291456, 12, 64 },
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{ 0x4a, _SC_LEVEL3_CACHE_SIZE, 6291456, 12, 64 },
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{ 0x4b, _SC_LEVEL3_CACHE_SIZE, 8388608, 16, 64 },
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{ 0x4b, _SC_LEVEL3_CACHE_SIZE, 8388608, 16, 64 },
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{ 0x4c, _SC_LEVEL3_CACHE_SIZE, 12582912, 12, 64 },
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{ 0x4c, _SC_LEVEL3_CACHE_SIZE, 12582912, 12, 64 },
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@ -166,6 +166,33 @@ intel_check_word (int name, unsigned int value, bool *has_level_2,
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}
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}
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else
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else
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{
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{
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if (byte == 0x49 && folded_name == _SC_LEVEL3_CACHE_SIZE)
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{
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/* Intel reused this value. For family 15, model 6 it
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specifies the 3rd level cache. Otherwise the 2nd
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level cache. */
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unsigned int eax;
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unsigned int ebx;
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unsigned int ecx;
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unsigned int edx;
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asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
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: "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx)
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: "0" (1));
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unsigned int family = ((eax >> 20) & 0xff) + ((eax >> 8) & 0xf);
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unsigned int model = ((((eax >>16) & 0xf) << 4)
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+ ((eax >> 4) & 0xf));
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if (family == 15 && model == 6)
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{
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/* The level 3 cache is encoded for this model like
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the level 2 cache is for other models. Pretend
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the caller asked for the level 2 cache. */
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name = (_SC_LEVEL2_CACHE_SIZE
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+ (name - _SC_LEVEL3_CACHE_SIZE));
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folded_name = _SC_LEVEL3_CACHE_SIZE;
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}
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}
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struct intel_02_cache_info *found;
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struct intel_02_cache_info *found;
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struct intel_02_cache_info search;
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struct intel_02_cache_info search;
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@ -58,7 +58,7 @@ static const struct intel_02_cache_info
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{ 0x45, _SC_LEVEL2_CACHE_SIZE, 2097152, 4, 32 },
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{ 0x45, _SC_LEVEL2_CACHE_SIZE, 2097152, 4, 32 },
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{ 0x46, _SC_LEVEL3_CACHE_SIZE, 4194304, 4, 64 },
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{ 0x46, _SC_LEVEL3_CACHE_SIZE, 4194304, 4, 64 },
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{ 0x47, _SC_LEVEL3_CACHE_SIZE, 8388608, 8, 64 },
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{ 0x47, _SC_LEVEL3_CACHE_SIZE, 8388608, 8, 64 },
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{ 0x49, _SC_LEVEL3_CACHE_SIZE, 4194304, 16, 64 },
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{ 0x49, _SC_LEVEL2_CACHE_SIZE, 4194304, 16, 64 },
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{ 0x4a, _SC_LEVEL3_CACHE_SIZE, 6291456, 12, 64 },
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{ 0x4a, _SC_LEVEL3_CACHE_SIZE, 6291456, 12, 64 },
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{ 0x4b, _SC_LEVEL3_CACHE_SIZE, 8388608, 16, 64 },
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{ 0x4b, _SC_LEVEL3_CACHE_SIZE, 8388608, 16, 64 },
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{ 0x4c, _SC_LEVEL3_CACHE_SIZE, 12582912, 12, 64 },
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{ 0x4c, _SC_LEVEL3_CACHE_SIZE, 12582912, 12, 64 },
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@ -127,6 +127,33 @@ intel_check_word (int name, unsigned int value, bool *has_level_2,
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}
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}
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else
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else
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{
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{
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if (byte == 0x49 && folded_name == _SC_LEVEL3_CACHE_SIZE)
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{
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/* Intel reused this value. For family 15, model 6 it
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specifies the 3rd level cache. Otherwise the 2nd
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level cache. */
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unsigned int eax;
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unsigned int ebx;
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unsigned int ecx;
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unsigned int edx;
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asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
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: "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx)
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: "0" (1));
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unsigned int family = ((eax >> 20) & 0xff) + ((eax >> 8) & 0xf);
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unsigned int model = ((((eax >>16) & 0xf) << 4)
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+ ((eax >> 4) & 0xf));
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if (family == 15 && model == 6)
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{
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/* The level 3 cache is encoded for this model like
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the level 2 cache is for other models. Pretend
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the caller asked for the level 2 cache. */
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name = (_SC_LEVEL2_CACHE_SIZE
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+ (name - _SC_LEVEL3_CACHE_SIZE));
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folded_name = _SC_LEVEL3_CACHE_SIZE;
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}
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}
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struct intel_02_cache_info *found;
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struct intel_02_cache_info *found;
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struct intel_02_cache_info search;
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struct intel_02_cache_info search;
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