* stdlib/longlong.h: Update from GCC.
This commit is contained in:
Roland McGrath
parent
d57e74714e
commit
f30070ae4e
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@ -1,3 +1,7 @@
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2005-12-05 Daniel Jacobowitz <dan@codesourcery.com>
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* stdlib/longlong.h: Update from GCC.
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2005-12-04 Joseph S. Myers <joseph@codesourcery.com>
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* soft-fp/soft-fp.h: Include <stdlib.h>.
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@ -1,5 +1,6 @@
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/* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
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Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000
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Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
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2002, 2003, 2004, 2005
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Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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@ -31,8 +32,7 @@
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DItype, UDItype -- Signed and unsigned 64 bit types.
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On a 32 bit machine UWtype should typically be USItype;
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on a 64 bit machine, UWtype should typically be UDItype.
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*/
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on a 64 bit machine, UWtype should typically be UDItype. */
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#define __BITS4 (W_TYPE_SIZE / 4)
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#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
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@ -46,10 +46,12 @@
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#define UDWtype UDItype
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#endif
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extern const UQItype __clz_tab[256];
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/* Define auxiliary asm macros.
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1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
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UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
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1) umul_ppmm(high_prod, low_prod, multiplier, multiplicand) multiplies two
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UWtype integers MULTIPLIER and MULTIPLICAND, and generates a two UWtype
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word product in HIGH_PROD and LOW_PROD.
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2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
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@ -113,10 +115,7 @@
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#define umul_ppmm(ph, pl, m0, m1) \
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do { \
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UDItype __m0 = (m0), __m1 = (m1); \
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__asm__ ("umulh %r1,%2,%0" \
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: "=r" ((UDItype) ph) \
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: "%rJ" (__m0), \
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"rI" (__m1)); \
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(ph) = __builtin_alpha_umulh (__m0, __m1); \
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(pl) = __m0 * __m1; \
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} while (0)
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#define UMUL_TIME 46
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@ -130,30 +129,27 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
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#define UDIV_TIME 220
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#endif /* LONGLONG_STANDALONE */
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#ifdef __alpha_cix__
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#define count_leading_zeros(COUNT,X) \
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__asm__("ctlz %1,%0" : "=r"(COUNT) : "r"(X))
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#define count_trailing_zeros(COUNT,X) \
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__asm__("cttz %1,%0" : "=r"(COUNT) : "r"(X))
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#define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clzl (X))
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#define count_trailing_zeros(COUNT,X) ((COUNT) = __builtin_ctzl (X))
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#define COUNT_LEADING_ZEROS_0 64
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#else
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extern const UQItype __clz_tab[];
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#define count_leading_zeros(COUNT,X) \
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do { \
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UDItype __xr = (X), __t, __a; \
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__asm__("cmpbge $31,%1,%0" : "=r"(__t) : "r"(__xr)); \
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__t = __builtin_alpha_cmpbge (0, __xr); \
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__a = __clz_tab[__t ^ 0xff] - 1; \
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__asm__("extbl %1,%2,%0" : "=r"(__t) : "r"(__xr), "r"(__a)); \
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__t = __builtin_alpha_extbl (__xr, __a); \
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(COUNT) = 64 - (__clz_tab[__t] + __a*8); \
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} while (0)
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#define count_trailing_zeros(COUNT,X) \
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do { \
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UDItype __xr = (X), __t, __a; \
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__asm__("cmpbge $31,%1,%0" : "=r"(__t) : "r"(__xr)); \
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__t = __builtin_alpha_cmpbge (0, __xr); \
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__t = ~__t & -~__t; \
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__a = ((__t & 0xCC) != 0) * 2; \
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__a += ((__t & 0xF0) != 0) * 4; \
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__a += ((__t & 0xAA) != 0); \
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__asm__("extbl %1,%2,%0" : "=r"(__t) : "r"(__xr), "r"(__a)); \
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__t = __builtin_alpha_extbl (__xr, __a); \
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__a <<= 3; \
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__t &= -__t; \
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__a += ((__t & 0xCC) != 0) * 2; \
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@ -193,7 +189,7 @@ do { \
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UDItype __umulsidi3 (USItype, USItype);
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#endif
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#if defined (__arm__) && W_TYPE_SIZE == 32
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#if defined (__arm__) && !defined (__thumb__) && W_TYPE_SIZE == 32
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#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
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__asm__ ("adds %1, %4, %5\n\tadc %0, %2, %3" \
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: "=r" ((USItype) (sh)), \
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@ -201,7 +197,7 @@ UDItype __umulsidi3 (USItype, USItype);
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: "%r" ((USItype) (ah)), \
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"rI" ((USItype) (bh)), \
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"%r" ((USItype) (al)), \
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"rI" ((USItype) (bl)))
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"rI" ((USItype) (bl)) __CLOBBER_CC)
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#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
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__asm__ ("subs %1, %4, %5\n\tsbc %0, %2, %3" \
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: "=r" ((USItype) (sh)), \
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@ -209,7 +205,7 @@ UDItype __umulsidi3 (USItype, USItype);
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: "r" ((USItype) (ah)), \
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"rI" ((USItype) (bh)), \
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"r" ((USItype) (al)), \
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"rI" ((USItype) (bl)))
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"rI" ((USItype) (bl)) __CLOBBER_CC)
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#define umul_ppmm(xh, xl, a, b) \
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{register USItype __t0, __t1, __t2; \
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__asm__ ("%@ Inlined umul_ppmm\n" \
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@ -229,7 +225,7 @@ UDItype __umulsidi3 (USItype, USItype);
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"=r" ((USItype) (xl)), \
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"=&r" (__t0), "=&r" (__t1), "=r" (__t2) \
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: "r" ((USItype) (a)), \
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"r" ((USItype) (b)));}
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"r" ((USItype) (b)) __CLOBBER_CC );}
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#define UMUL_TIME 20
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#define UDIV_TIME 100
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#endif /* __arm__ */
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@ -294,44 +290,27 @@ UDItype __umulsidi3 (USItype, USItype);
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} while (0)
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#endif
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#if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32
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#define umul_ppmm(xh, xl, m0, m1) \
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do { \
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union {UDItype __ll; \
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struct {USItype __h, __l;} __i; \
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} __xx; \
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USItype __m0 = (m0), __m1 = (m1); \
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__asm__ ("mr %0,%3" \
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: "=r" (__xx.__i.__h), \
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"=r" (__xx.__i.__l) \
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: "%1" (__m0), \
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"r" (__m1)); \
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(xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
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(xh) += ((((SItype) __m0 >> 31) & __m1) \
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+ (((SItype) __m1 >> 31) & __m0)); \
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} while (0)
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#if (defined (__i370__) || defined (__s390__) || defined (__mvs__)) && W_TYPE_SIZE == 32
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#define smul_ppmm(xh, xl, m0, m1) \
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do { \
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union {DItype __ll; \
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struct {USItype __h, __l;} __i; \
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} __xx; \
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__asm__ ("mr %0,%3" \
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: "=r" (__xx.__i.__h), \
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"=r" (__xx.__i.__l) \
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: "%1" (m0), \
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"r" (m1)); \
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(xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
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} __x; \
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__asm__ ("lr %N0,%1\n\tmr %0,%2" \
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: "=&r" (__x.__ll) \
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: "r" (m0), "r" (m1)); \
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(xh) = __x.__i.__h; (xl) = __x.__i.__l; \
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} while (0)
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#define sdiv_qrnnd(q, r, n1, n0, d) \
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do { \
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union {DItype __ll; \
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struct {USItype __h, __l;} __i; \
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} __xx; \
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__xx.__i.__h = n1; __xx.__i.__l = n0; \
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} __x; \
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__x.__i.__h = n1; __x.__i.__l = n0; \
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__asm__ ("dr %0,%2" \
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: "=r" (__xx.__ll) \
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: "0" (__xx.__ll), "r" (d)); \
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(q) = __xx.__i.__l; (r) = __xx.__i.__h; \
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: "=r" (__x.__ll) \
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: "0" (__x.__ll), "r" (d)); \
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(q) = __x.__i.__l; (r) = __x.__i.__h; \
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} while (0)
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#endif
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@ -438,11 +417,8 @@ UDItype __umulsidi3 (USItype, USItype);
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"1" ((USItype) (al)), \
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"g" ((USItype) (bl)))
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/* The '020, '030, '040 and CPU32 have 32x32->64 and 64/32->32q-32r. */
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#if defined (__mc68020__) || defined(mc68020) \
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|| defined(__mc68030__) || defined(mc68030) \
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|| defined(__mc68040__) || defined(mc68040) \
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|| defined(__mcpu32__) || defined(mcpu32)
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/* The '020, '030, '040, '060 and CPU32 have 32x32->64 and 64/32->32q-32r. */
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#if (defined (__mc68020__) && !defined (__mc68060__))
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#define umul_ppmm(w1, w0, u, v) \
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__asm__ ("mulu%.l %3,%1:%0" \
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: "=d" ((USItype) (w0)), \
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@ -466,8 +442,43 @@ UDItype __umulsidi3 (USItype, USItype);
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"1" ((USItype) (n1)), \
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"dmi" ((USItype) (d)))
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#else /* not mc68020 */
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#if !defined(__mcf5200__)
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#elif defined (__mcoldfire__) /* not mc68020 */
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#define umul_ppmm(xh, xl, a, b) \
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__asm__ ("| Inlined umul_ppmm\n" \
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" move%.l %2,%/d0\n" \
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" move%.l %3,%/d1\n" \
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" move%.l %/d0,%/d2\n" \
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" swap %/d0\n" \
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" move%.l %/d1,%/d3\n" \
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" swap %/d1\n" \
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" move%.w %/d2,%/d4\n" \
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" mulu %/d3,%/d4\n" \
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" mulu %/d1,%/d2\n" \
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" mulu %/d0,%/d3\n" \
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" mulu %/d0,%/d1\n" \
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" move%.l %/d4,%/d0\n" \
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" clr%.w %/d0\n" \
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" swap %/d0\n" \
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" add%.l %/d0,%/d2\n" \
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" add%.l %/d3,%/d2\n" \
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" jcc 1f\n" \
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" add%.l %#65536,%/d1\n" \
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"1: swap %/d2\n" \
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" moveq %#0,%/d0\n" \
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" move%.w %/d2,%/d0\n" \
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" move%.w %/d4,%/d2\n" \
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" move%.l %/d2,%1\n" \
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" add%.l %/d1,%/d0\n" \
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" move%.l %/d0,%0" \
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: "=g" ((USItype) (xh)), \
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"=g" ((USItype) (xl)) \
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: "g" ((USItype) (a)), \
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"g" ((USItype) (b)) \
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: "d0", "d1", "d2", "d3", "d4")
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#define UMUL_TIME 100
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#define UDIV_TIME 400
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#else /* not ColdFire */
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/* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX. */
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#define umul_ppmm(xh, xl, a, b) \
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__asm__ ("| Inlined umul_ppmm\n" \
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@ -503,14 +514,12 @@ UDItype __umulsidi3 (USItype, USItype);
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: "d0", "d1", "d2", "d3", "d4")
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#define UMUL_TIME 100
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#define UDIV_TIME 400
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#endif /* not mcf5200 */
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#endif /* not mc68020 */
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/* The '020, '030, '040 and '060 have bitfield insns. */
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#if defined (__mc68020__) || defined(mc68020) \
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|| defined(__mc68030__) || defined(mc68030) \
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|| defined(__mc68040__) || defined(mc68040) \
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|| defined(__mc68060__) || defined(mc68060)
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/* The '020, '030, '040 and '060 have bitfield insns.
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cpu32 disguises as a 68020, but lacks them. */
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#if defined (__mc68020__) && !defined (__mcpu32__)
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#define count_leading_zeros(count, x) \
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__asm__ ("bfffo %1{%b2:%b2},%0" \
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: "=d" ((USItype) (count)) \
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@ -671,7 +680,7 @@ UDItype __umulsidi3 (USItype, USItype);
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__asm__ ("{cntlz|cntlzw} %0,%1" : "=r" (count) : "r" (x))
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#define COUNT_LEADING_ZEROS_0 32
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#if defined (_ARCH_PPC) || defined (__powerpc__) || defined (__POWERPC__) \
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|| defined (__ppc__) || defined (PPC) || defined (__vxworks__)
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|| defined (__ppc__) || defined (PPC)
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#define umul_ppmm(ph, pl, m0, m1) \
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do { \
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USItype __m0 = (m0), __m1 = (m1); \
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@ -1203,6 +1212,20 @@ UDItype __umulsidi3 (USItype, USItype);
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} while (0)
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#endif
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/* If we lack umul_ppmm but have smul_ppmm, define umul_ppmm in terms of
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smul_ppmm. */
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#if !defined (umul_ppmm) && defined (smul_ppmm)
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#define umul_ppmm(w1, w0, u, v) \
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do { \
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UWtype __w1; \
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UWtype __xm0 = (u), __xm1 = (v); \
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smul_ppmm (__w1, w0, __xm0, __xm1); \
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(w1) = __w1 + (-(__xm0 >> (W_TYPE_SIZE - 1)) & __xm1) \
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+ (-(__xm1 >> (W_TYPE_SIZE - 1)) & __xm0); \
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} while (0)
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#endif
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/* If we still don't have umul_ppmm, define it using plain C. */
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#if !defined (umul_ppmm)
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#define umul_ppmm(w1, w0, u, v) \
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do { \
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@ -1292,7 +1315,6 @@ UDItype __umulsidi3 (USItype, USItype);
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#endif
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#if !defined (count_leading_zeros)
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extern const UQItype __clz_tab[];
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#define count_leading_zeros(count, x) \
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do { \
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UWtype __xr = (x); \
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