Commit Graph

351 Commits

Author SHA1 Message Date
Carlos O'Donell 86ee76a086 hppa: Update libm-test-ulps
Update libm-test-ulps for hppa. There are a few entries
with 4 or 5 ulps, but these appear to be expected. A more
thorough review will be required if hppa switches long-double
to a different type.

---
ports/

2013-05-15  Carlos O'Donell  <carlos@redhat.com>

	* sysdeps/hppa/fpu/libm-test-ulps: Regenerate.
2013-05-15 12:42:59 -04:00
Carlos O'Donell b7f7d28b61 hppa: Fix _FPU_GETCW and _FPU_SETCW.
The following patch fixes both _FPU_GETCW and
_FPU_SETCW for hppa. The initial implementation was
flawed and not well tested. We failed to set cw,
and passed in the value of a register to fldd.
This patch fixes both of those errors and allows
the libm tests to pass without failure.

Signed-off-by: Guy Martin <gmsoft@tuxicoman.be>
Signed-off-by: Carlos O'Donell <carlos@redhat.com>
---

2013-05-15  Guy Martin  <gmsoft@tuxicoman.be>
	    Carlos O'Donell  <carlos@redhat.com>

	[BZ# 15000]
	* ports/sysdeps/hppa/fpu/fpu_control.h (_FPU_GETCW): Set cw.
	(_FPU_SETCW): Pass address to fldd.
2013-05-15 12:05:10 -04:00
Joseph Myers 0175558aa0 Stop ARM setjmp/longjmp saving/restoring fpscr (bug 14908). 2013-05-14 19:50:14 +00:00
Roland McGrath 5d5ef5dbfc ARM: Make multiarch memcpy always use NEON when compiler does 2013-05-13 16:13:14 -07:00
Marcus Shawcroft d842b1440d [AArch64] Fix out of range branch from ioctl() and clone()
2013-05-12  Marcus Shawcroft  <marcus.shawcroft@linaro.org>

	* sysdeps/unix/sysv/linux/aarch64/clone.S (__clone):
	Do not call sycall_error directly with a confitional branch.

	* sysdeps/unix/sysv/linux/aarch64/ioctl.S (__ioctl):
	Do not call sycall_error directly with a confitional branch.
2013-05-12 18:09:33 +01:00
Will Newton ae65139d14 ARM: Add Cortex-A15 optimized NEON and VFP memcpy routines, with IFUNC. 2013-05-08 12:06:34 +00:00
Roland McGrath 1a0fc08754 ARM: Rewrite elf_machine_dynamic in pure C. 2013-05-07 10:29:13 -07:00
Roland McGrath 12290c0614 ARM: Add missing sfi_breg prefix in _dl_tlsdesc_dynamic code. 2013-05-06 12:53:55 -07:00
Roland McGrath 7214d558d3 ARM: Macroize assembly use of EABI unwind directives. 2013-04-19 11:33:01 -07:00
David Holsgrove 7756ba9d6d MicroBlaze Port
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2013-04-18 11:00:13 +10:00
Andreas Schwab 0a033d342e m68k: update libm test ULPs 2013-04-11 16:37:44 +02:00
Thomas Schwinge 572676160d New <math.h> macro named issignaling to check for a signaling NaN (sNaN).
It is based on draft TS 18661 and currently enabled as a GNU extension.
2013-04-02 13:51:02 +02:00
Mans Rullgard 28831a9a67 ARM: fix preconfigure. 2013-03-26 20:53:16 +00:00
Joseph Myers defa03577f Use LIBC_CONFIG_VAR for MIPS default-abi setting. 2013-03-21 00:41:56 +00:00
Joseph Myers d56ca734b5 Use LIBC_CONFIG_VAR for ARM default-abi setting. 2013-03-20 23:15:42 +00:00
Andreas Schwab 4a97cddffb aarch64: Move rtld link to /lib 2013-03-19 12:08:44 +01:00
Roland McGrath 6bcae14685 ARM: Make dl-tlsdesc.S use sfi_breg, respect ARM_ALWAYS_BX and ARM_NO_INDEX_REGISTER. 2013-03-18 15:02:44 -07:00
Thomas Schwinge 67e971f18f Better distinguish between NaN/qNaN/sNaN. 2013-03-15 19:06:02 +01:00
Thomas Schwinge ae6b60cc5e Avoid duplicate MAP_ANONYMOUS definition for MIPS GNU/Linux.
Follow-up to commit 664a9ce4ca.
2013-03-15 18:59:23 +01:00
Roland McGrath 1362a2aa4e ARM: sfi_sp assembler macro 2013-03-15 09:32:16 -07:00
Roland McGrath a7ac752299 ARM: sfi_breg assembler macro 2013-03-15 09:31:56 -07:00
Andreas Schwab cbc105f8b5 aarch64: use lib64 as default lib and slib directory 2013-03-14 10:00:26 +01:00
Roland McGrath bb48a26acf ARM_BX_ALIGN_LOG2 2013-03-13 12:36:53 -07:00
Roland McGrath ccffb2a2db ARM: Handle ARM_ALWAYS_BX in {add,sub}_n.S code. 2013-03-13 09:51:37 -07:00
Roland McGrath 9e1d4ac924 ARM: Support avoiding pc as destination register. 2013-03-13 09:40:55 -07:00
Roland McGrath 4f510e3aee ARM: Make armv6t2 memchr implementation usable without Thumb. 2013-03-12 17:04:54 -07:00
Roland McGrath 47c71d9323 ARM: Change register allocation in armv6t2 memchr implementation. 2013-03-12 17:04:54 -07:00
Mike Frysinger 4fdd5ec125 ia64: fix set-but-unused warnings with syscalls
These macros often set up a variable that later macros sometimes do
not use.  Add unused attribute to avoid that.

Similarly, the ia64 code tends to check the err field rather than
the val (which is opposite of most arches) leading to the same
kind of warning.  Replace this with a dummy reference.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-03-12 06:01:38 -04:00
Mike Frysinger a186dc916c ia64: fix strict aliasing warnings with libm error
The current code declares double constants by using a char buffer and
then casting the pointer to a different type.  This makes the aliasing
logic unhappy.  Change it to use a union instead to avoid that.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-03-12 06:00:28 -04:00
Mike Frysinger c5abd7ce01 ia64: fix strict aliasing warnings with func descriptors
Function pointers on ia64 are like parisc -- they're plabels.  While
the parisc port enjoys a gcc builtin for extracting the address here,
ia64 has no such luck.

Casting & dereferencing in one go triggers a strict aliasing warning.
Use a union to fix that.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-03-12 06:00:05 -04:00
Joseph Myers b7845b6388 Add comments about ARM configure -fno-unwind-tables handling. 2013-03-11 23:55:55 +00:00
Roland McGrath 7f86996afc ARM: Consolidate setjmp details in include/bits/setjmp.h file. 2013-03-11 16:45:25 -07:00
Roland McGrath 38435a9aff ARM: Convert string/ assembly to unified syntax. 2013-03-11 16:44:31 -07:00
Roland McGrath 791de44658 ARM: Use r10 instead of r9. 2013-03-11 16:43:29 -07:00
Andreas Jaeger cb83063b0c AM33: Use <bits/mman.h> 2013-03-11 19:57:48 +01:00
Andreas Jaeger a0f487b2af Use <bits/mman.h> on ia64 2013-03-11 19:56:44 +01:00
Roland McGrath 3ad6c54707 Clean up ARM preconfigure. 2013-03-11 09:26:43 -07:00
Andreas Schwab fb6b0fcbf1 Remove extra pthread_atfork compat symbols 2013-03-11 09:47:01 +01:00
Mike Frysinger 3c2ef5414f ia64: makecontext: fix signed warnings
The ia64_rse_is_rnat_slot func expects an unsigned pointer, but we're
passing in a signed pointer.  The signness doesn't matter here, so
convert it to unsigned.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-03-10 22:18:28 -04:00
Mike Frysinger 8233957f54 ia64: fix NEED_DL_SYSINFO_DSO conditionals
The recent change to clean up these defines missed the ia64 logic.
Update it accordingly.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-03-10 08:11:55 -04:00
Richard Henderson f5ad94e02a arm: Implement armv6 optimized string routines
The strcpy and strchr (and related) functions are four times faster
than the byte-by-byte default versions.

The strlen function is twice as fast for long strings and 50% faster
for short strings over the armv4 version.
2013-03-07 09:10:33 -08:00
Andreas Jaeger 642e52808d AARCH64: Use <bits/mman-linux.h>
* sysdeps/unix/sysv/linux/aarch64/bits/mman.h: Remove all
	defines provided by bits/mman-linux.h and include <bits/mman-linux.h>.
2013-03-07 15:28:54 +01:00
Andreas Jaeger 664a9ce4ca Use <bits/mman-linux.h> for MIPS
* sysdeps/unix/sysv/linux/bits/mman-linux.h (MAP_ANONYMOUS):
	Allow definition via __MAP_ANONYMOUS.

	* sysdeps/unix/sysv/linux/mips/bits/mman.h: Remove all defines
	provided by bits/mman-linux.h and include <bits/mman-linux.h>.
	(__MAP_ANONYMOUS): Define.
2013-03-06 17:36:37 +01:00
Richard Henderson a6f2f43538 arm: Add optimized add_n and sub_n
Written from scratch rather than copied from GMP, due to LGPL 2.1 vs
GPL 3, but tested with the GMP testsuite.

This is 250% faster than the generic code as measured on Cortex-A15,
and the same speed as GMP on the same core, and probably everywhere.
2013-03-06 07:47:26 -08:00
Richard Henderson fe62ba37a3 arm: Add optimized submul_1
Written from scratch rather than copied from GMP, due to LGPL 2.1 vs
GPL 3, but tested with the GMP testsuite.

This is 50% faster than the generic code as measured on Cortex-A15.
It is 25% slower than the current GMP routine on the same core.
2013-03-06 07:47:25 -08:00
Richard Henderson 21e31515a6 arm: Add optimized addmul_1
Written from scratch rather than copied from GMP, due to LGPL 2.1 vs
GPL 3, but tested with the GMP testsuite.

This is 25% faster than the generic code as measured on Cortex-A15,
and the same speed as GMP on the same core.  It's probably slower
than GMP on the A8 and A9 cores though.
2013-03-06 07:47:25 -08:00
Richard Henderson 5695fc848f arm: Add optimized ffs for armv6t2 2013-03-06 07:47:24 -08:00
Richard Henderson 79fd873111 arm: Implement hard-tp for GET_TLS 2013-03-06 07:47:21 -08:00
Richard Henderson 3377126b0a arm: Tidy architecture selection 2013-03-06 07:46:47 -08:00
Richard Henderson d137b6dc52 arm: Unless arm4t, pop return address directly into pc 2013-03-06 07:46:47 -08:00