e0016b11d6
Add AVX optimized versions for some x86-64 math functions
2011-10-25 21:34:55 -04:00
ed72b6545f
Check for FMA4 support and generate appropriate fma functions
2011-10-20 22:43:15 -04:00
d9a4d2ab27
Add optimized str{,n}casecmp for AVX on x86-64
2011-10-19 12:42:38 -04:00
99710781cc
Improve 64 bit strcat functions with SSE2/SSSE3
2011-07-19 17:11:54 -04:00
0b1cbaaef5
Optimized st{r,p}{,n}cpy for SSE2/SSSE3 on x86-32
2011-06-24 14:15:32 -04:00
ff02d5280b
Use IFUNC on x86-64 memset
2010-11-08 03:41:34 -05:00
e73015f2d6
Unroll 32bit SSE strlen and handle slow bsf
2010-08-25 10:07:37 -07:00
6fb8cbcb58
Improve 64bit memcpy/memmove for Atom, Core 2 and Core i7
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This patch includes optimized 64bit memcpy/memmove for Atom, Core 2 and
Core i7. It improves memcpy by up to 3X on Atom, up to 4X on Core 2 and
up to 1X on Core i7. It also improves memmove by up to 3X on Atom, up to
4X on Core 2 and up to 2X on Core i7.
2010-06-30 08:26:11 -07:00
bbbdd77809
Update x86-64 cpu multiarch selection header.
2010-04-13 19:17:10 -07:00
22f4f44b67
Fix concurrent handling of __cpu_features.
2010-04-04 00:25:46 -07:00
3af48cbdfa
Optimize 32bit memset/memcpy with SSE2/SSSE3.
2010-01-12 11:22:03 -08:00
2510d01ddb
Define bit_SSE2 and index_SSE2.
2009-12-13 15:23:02 -08:00
51ddd2c01e
Define bit_XXX and index_XXX.
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This patch defines bit_XXX and index_XXX and use them to check processor
feature in assembly code. It can prevent typos in processor feature
check.
2009-12-13 09:47:02 -08:00
9d6982d5d2
Clean up x86 multiarch HAS_FOO macros.
2009-10-06 19:59:03 -07:00
6f6f1215f6
Support multiarch for i686.
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This patch adds multiarch support when configured for i686. I modified
some x86-64 functions to support 32bit. I will contribute 32bit SSE string
and memory functions later.
2009-07-31 11:53:35 -07:00
9a1d2d4555
Prepare use if IFUNC functions outside libc.so.
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We use a callback function into libc.so to get access to the data
structure with the information and have special versions of the test
macros which automatically use this function.
2009-07-29 15:22:28 -07:00
0181291385
Determine and store processor family and model on x86-64.
2009-06-30 04:39:09 -07:00
772f4e6a1b
Add SSE4.2 support for strcmp and strncmp on x86-64.
2009-06-22 20:38:41 -07:00
3ab2d57a4d
Optimize x86-64 strlen for SSE4.2.
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The SSE4.2 implementation is used in the DSO only. The patch also adds
some infrastructure to be used in similar code later one.
2009-06-05 11:32:00 -07:00
963cb6fcb4
Simplify CPUID value handling.
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SO far Intel and AMD use exactly the same bits meaning the same
things in CPUID index 1. Simplify the code. Should an architecture
come along which doesn't use the same semantics then it must use a
different index value than COMMON_CPUID_INDEX_1.
2009-05-31 17:52:05 -07:00
425ce2edb9
* config.h.in (USE_MULTIARCH): Define.
...
* configure.in: Handle --enable-multi-arch.
* elf/dl-runtime.c (_dl_fixup): Handle STT_GNU_IFUNC.
(_dl_fixup_profile): Likewise.
* elf/do-lookup.c (dl_lookup_x): Likewise.
* sysdeps/x86_64/dl-machine.h: Handle STT_GNU_IFUNC.
* elf/elf.h (STT_GNU_IFUNC): Define.
* include/libc-symbols.h (libc_ifunc): Define.
* sysdeps/x86_64/cacheinfo.c: If USE_MULTIARCH is defined, use the
framework in init-arch.h to get CPUID values.
* sysdeps/x86_64/multiarch/Makefile: New file.
* sysdeps/x86_64/multiarch/init-arch.c: New file.
* sysdeps/x86_64/multiarch/init-arch.h: New file.
* sysdeps/x86_64/multiarch/sched_cpucount.c: New file.
* config.make.in (experimental-malloc): Define.
* configure.in: Handle --enable-experimental-malloc.
* malloc/Makefile: Handle experimental-malloc flag.
* malloc/malloc.c: Implement PER_THREAD and ATOMIC_FASTBINS features.
* malloc/arena.c: Likewise.
* malloc/hooks.c: Likewise.
* malloc/malloc.h: Define M_ARENA_TEST and M_ARENA_MAX.
2009-03-13 23:53:18 +00:00
Ulrich Drepper
Liubov Dmitrieva
H.J. Lu
Ulrich Drepper
Roland McGrath