190 lines
5.3 KiB
C
190 lines
5.3 KiB
C
/* Assembler macros for ARM.
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Copyright (C) 1997-2013 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdeps/generic/sysdep.h>
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#include <features.h>
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#if (!defined (__ARM_ARCH_2__) && !defined (__ARM_ARCH_3__) \
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&& !defined (__ARM_ARCH_3M__) && !defined (__ARM_ARCH_4__))
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# define __USE_BX__
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#endif
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#ifdef __ASSEMBLER__
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/* Syntactic details of assembler. */
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#define ALIGNARG(log2) log2
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#define ASM_SIZE_DIRECTIVE(name) .size name,.-name
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#define PLTJMP(_x) _x##(PLT)
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/* APCS-32 doesn't preserve the condition codes across function call. */
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#ifdef __APCS_32__
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#define LOADREGS(cond, base, reglist...)\
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ldm##cond base,reglist
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#ifdef __USE_BX__
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#define RETINSTR(cond, reg) \
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bx##cond reg
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#define DO_RET(_reg) \
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bx _reg
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#else
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#define RETINSTR(cond, reg) \
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mov##cond pc, reg
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#define DO_RET(_reg) \
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mov pc, _reg
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#endif
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#else /* APCS-26 */
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#define LOADREGS(cond, base, reglist...)\
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ldm##cond base,reglist^
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#define RETINSTR(cond, reg) \
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mov##cond##s pc, reg
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#define DO_RET(_reg) \
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movs pc, _reg
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#endif
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/* Define an entry point visible from C. */
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#define ENTRY(name) \
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.globl C_SYMBOL_NAME(name); \
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.type C_SYMBOL_NAME(name),%function; \
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.align ALIGNARG(4); \
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C_LABEL(name) \
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CFI_SECTIONS; \
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cfi_startproc; \
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CALL_MCOUNT
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#define CFI_SECTIONS \
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.cfi_sections .debug_frame
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#undef END
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#define END(name) \
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cfi_endproc; \
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ASM_SIZE_DIRECTIVE(name)
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/* If compiled for profiling, call `mcount' at the start of each function. */
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#ifdef PROF
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/* Call __gnu_mcount_nc if GCC >= 4.4. */
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#if __GNUC_PREREQ(4,4)
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#define CALL_MCOUNT \
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str lr,[sp, #-4]!; \
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cfi_adjust_cfa_offset (4); \
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cfi_rel_offset (lr, 0); \
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bl PLTJMP(mcount); \
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cfi_adjust_cfa_offset (-4); \
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cfi_restore (lr)
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#else /* else call _mcount */
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#define CALL_MCOUNT \
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str lr,[sp, #-4]!; \
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cfi_adjust_cfa_offset (4); \
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cfi_rel_offset (lr, 0); \
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bl PLTJMP(mcount); \
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ldr lr, [sp], #4; \
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cfi_adjust_cfa_offset (-4); \
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cfi_restore (lr)
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#endif
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#else
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#define CALL_MCOUNT /* Do nothing. */
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#endif
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/* Since C identifiers are not normally prefixed with an underscore
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on this system, the asm identifier `syscall_error' intrudes on the
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C name space. Make sure we use an innocuous name. */
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#define syscall_error __syscall_error
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#if __GNUC_PREREQ(4,4)
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#define mcount __gnu_mcount_nc
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#else
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#define mcount _mcount
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#endif
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/* Tag_ABI_align8_preserved: This code preserves 8-byte
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alignment in any callee. */
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.eabi_attribute 25, 1
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/* Tag_ABI_align8_needed: This code may require 8-byte alignment from
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the caller. */
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.eabi_attribute 24, 1
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/* The thumb2 encoding is reasonably complete. Unless suppressed, use it. */
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.syntax unified
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# if defined(__thumb2__) && !defined(NO_THUMB)
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.thumb
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#else
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# undef __thumb__
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# undef __thumb2__
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.arm
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# endif
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/* Load or store to/from a pc-relative EXPR into/from R, using T. */
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# ifdef __thumb2__
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# define LDST_PCREL(OP, R, T, EXPR) \
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ldr T, 98f; \
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.subsection 2; \
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98: .word EXPR - 99f - PC_OFS; \
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.previous; \
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99: add T, T, pc; \
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OP R, [T]
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# else
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# define LDST_PCREL(OP, R, T, EXPR) \
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ldr T, 98f; \
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.subsection 2; \
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98: .word EXPR - 99f - PC_OFS; \
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.previous; \
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99: OP R, [pc, T]
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# endif
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/* Cope with negative memory offsets, which thumb can't encode.
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Use NEGOFF_ADJ_BASE to (conditionally) alter the base register,
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and then NEGOFF_OFF1 to use 0 for thumb and the offset for arm,
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or NEGOFF_OFF2 to use A-B for thumb and A for arm. */
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# ifdef __thumb2__
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# define NEGOFF_ADJ_BASE(R, OFF) add R, R, $OFF
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# define NEGOFF_ADJ_BASE2(D, S, OFF) add D, S, $OFF
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# define NEGOFF_OFF1(R, OFF) [R]
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# define NEGOFF_OFF2(R, OFFA, OFFB) [R, $((OFFA) - (OFFB))]
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# else
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# define NEGOFF_ADJ_BASE(R, OFF)
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# define NEGOFF_ADJ_BASE2(D, S, OFF) mov D, S
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# define NEGOFF_OFF1(R, OFF) [R, $OFF]
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# define NEGOFF_OFF2(R, OFFA, OFFB) [R, $OFFA]
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# endif
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/* Helper to get the TLS base pointer. The interface is that TMP is a
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register that may be used to hold the LR, if necessary. TMP may be
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LR itself to indicate that LR need not be saved. The base pointer
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is returned in R0. Only R0 and TMP are modified.
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At this generic level we have no tricks to pull. Call the ABI routine. */
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# define GET_TLS(TMP) \
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push { r1, r2, r3, lr }; \
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cfi_remember_state; \
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cfi_adjust_cfa_offset (16); \
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cfi_rel_offset (r1, 0); \
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cfi_rel_offset (r2, 4); \
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cfi_rel_offset (r3, 8); \
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cfi_rel_offset (lr, 12); \
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bl __aeabi_read_tp; \
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pop { r1, r2, r3, lr }; \
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cfi_restore_state
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#endif /* __ASSEMBLER__ */
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/* This number is the offset from the pc at the current location. */
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#ifdef __thumb__
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# define PC_OFS 4
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#else
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# define PC_OFS 8
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#endif
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