621 lines
20 KiB
C
621 lines
20 KiB
C
/* Machine-dependent ELF dynamic relocation functions. PowerPC version.
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Copyright (C) 1995-2003, 2004, 2005 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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#include <unistd.h>
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#include <string.h>
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#include <sys/param.h>
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#include <link.h>
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#include <ldsodefs.h>
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#include <elf/dynamic-link.h>
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#include <dl-machine.h>
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#include <stdio-common/_itoa.h>
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/* The value __cache_line_size is defined in memset.S and is initialised
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by _dl_sysdep_start via DL_PLATFORM_INIT. */
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extern int __cache_line_size;
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weak_extern (__cache_line_size)
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/* Because ld.so is now versioned, these functions can be in their own file;
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no relocations need to be done to call them.
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Of course, if ld.so is not versioned... */
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#if defined SHARED && !(DO_VERSIONING - 0)
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#error This will not work with versioning turned off, sorry.
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#endif
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/* Stuff for the PLT. */
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#define PLT_INITIAL_ENTRY_WORDS 18
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#define PLT_LONGBRANCH_ENTRY_WORDS 0
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#define PLT_TRAMPOLINE_ENTRY_WORDS 6
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#define PLT_DOUBLE_SIZE (1<<13)
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#define PLT_ENTRY_START_WORDS(entry_number) \
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(PLT_INITIAL_ENTRY_WORDS + (entry_number)*2 \
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+ ((entry_number) > PLT_DOUBLE_SIZE \
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? ((entry_number) - PLT_DOUBLE_SIZE)*2 \
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: 0))
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#define PLT_DATA_START_WORDS(num_entries) PLT_ENTRY_START_WORDS(num_entries)
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/* Macros to build PowerPC opcode words. */
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#define OPCODE_ADDI(rd,ra,simm) \
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(0x38000000 | (rd) << 21 | (ra) << 16 | ((simm) & 0xffff))
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#define OPCODE_ADDIS(rd,ra,simm) \
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(0x3c000000 | (rd) << 21 | (ra) << 16 | ((simm) & 0xffff))
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#define OPCODE_ADD(rd,ra,rb) \
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(0x7c000214 | (rd) << 21 | (ra) << 16 | (rb) << 11)
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#define OPCODE_B(target) (0x48000000 | ((target) & 0x03fffffc))
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#define OPCODE_BA(target) (0x48000002 | ((target) & 0x03fffffc))
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#define OPCODE_BCTR() 0x4e800420
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#define OPCODE_LWZ(rd,d,ra) \
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(0x80000000 | (rd) << 21 | (ra) << 16 | ((d) & 0xffff))
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#define OPCODE_LWZU(rd,d,ra) \
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(0x84000000 | (rd) << 21 | (ra) << 16 | ((d) & 0xffff))
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#define OPCODE_MTCTR(rd) (0x7C0903A6 | (rd) << 21)
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#define OPCODE_RLWINM(ra,rs,sh,mb,me) \
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(0x54000000 | (rs) << 21 | (ra) << 16 | (sh) << 11 | (mb) << 6 | (me) << 1)
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#define OPCODE_LI(rd,simm) OPCODE_ADDI(rd,0,simm)
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#define OPCODE_ADDIS_HI(rd,ra,value) \
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OPCODE_ADDIS(rd,ra,((value) + 0x8000) >> 16)
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#define OPCODE_LIS_HI(rd,value) OPCODE_ADDIS_HI(rd,0,value)
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#define OPCODE_SLWI(ra,rs,sh) OPCODE_RLWINM(ra,rs,sh,0,31-sh)
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#define PPC_DCBST(where) asm volatile ("dcbst 0,%0" : : "r"(where) : "memory")
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#define PPC_SYNC asm volatile ("sync" : : : "memory")
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#define PPC_ISYNC asm volatile ("sync; isync" : : : "memory")
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#define PPC_ICBI(where) asm volatile ("icbi 0,%0" : : "r"(where) : "memory")
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#define PPC_DIE asm volatile ("tweq 0,0")
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/* Use this when you've modified some code, but it won't be in the
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instruction fetch queue (or when it doesn't matter if it is). */
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#define MODIFIED_CODE_NOQUEUE(where) \
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do { PPC_DCBST(where); PPC_SYNC; PPC_ICBI(where); } while (0)
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/* Use this when it might be in the instruction queue. */
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#define MODIFIED_CODE(where) \
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do { PPC_DCBST(where); PPC_SYNC; PPC_ICBI(where); PPC_ISYNC; } while (0)
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/* The idea here is that to conform to the ABI, we are supposed to try
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to load dynamic objects between 0x10000 (we actually use 0x40000 as
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the lower bound, to increase the chance of a memory reference from
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a null pointer giving a segfault) and the program's load address;
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this may allow us to use a branch instruction in the PLT rather
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than a computed jump. The address is only used as a preference for
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mmap, so if we get it wrong the worst that happens is that it gets
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mapped somewhere else. */
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ElfW(Addr)
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__elf_preferred_address (struct link_map *loader, size_t maplength,
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ElfW(Addr) mapstartpref)
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{
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ElfW(Addr) low, high;
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struct link_map *l;
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Lmid_t nsid;
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/* If the object has a preference, load it there! */
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if (mapstartpref != 0)
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return mapstartpref;
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/* Otherwise, quickly look for a suitable gap between 0x3FFFF and
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0x70000000. 0x3FFFF is so that references off NULL pointers will
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cause a segfault, 0x70000000 is just paranoia (it should always
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be superceded by the program's load address). */
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low = 0x0003FFFF;
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high = 0x70000000;
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for (nsid = 0; nsid < DL_NNS; ++nsid)
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for (l = GL(dl_ns)[nsid]._ns_loaded; l; l = l->l_next)
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{
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ElfW(Addr) mapstart, mapend;
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mapstart = l->l_map_start & ~(GLRO(dl_pagesize) - 1);
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mapend = l->l_map_end | (GLRO(dl_pagesize) - 1);
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assert (mapend > mapstart);
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/* Prefer gaps below the main executable, note that l ==
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_dl_loaded does not work for static binaries loading
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e.g. libnss_*.so. */
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if ((mapend >= high || l->l_type == lt_executable)
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&& high >= mapstart)
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high = mapstart;
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else if (mapend >= low && low >= mapstart)
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low = mapend;
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else if (high >= mapend && mapstart >= low)
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{
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if (high - mapend >= mapstart - low)
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low = mapend;
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else
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high = mapstart;
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}
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}
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high -= 0x10000; /* Allow some room between objects. */
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maplength = (maplength | (GLRO(dl_pagesize) - 1)) + 1;
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if (high <= low || high - low < maplength )
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return 0;
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return high - maplength; /* Both high and maplength are page-aligned. */
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}
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/* Set up the loaded object described by L so its unrelocated PLT
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entries will jump to the on-demand fixup code in dl-runtime.c.
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Also install a small trampoline to be used by entries that have
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been relocated to an address too far away for a single branch. */
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/* There are many kinds of PLT entries:
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(1) A direct jump to the actual routine, either a relative or
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absolute branch. These are set up in __elf_machine_fixup_plt.
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(2) Short lazy entries. These cover the first 8192 slots in
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the PLT, and look like (where 'index' goes from 0 to 8191):
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li %r11, index*4
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b &plt[PLT_TRAMPOLINE_ENTRY_WORDS+1]
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(3) Short indirect jumps. These replace (2) when a direct jump
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wouldn't reach. They look the same except that the branch
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is 'b &plt[PLT_LONGBRANCH_ENTRY_WORDS]'.
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(4) Long lazy entries. These cover the slots when a short entry
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won't fit ('index*4' overflows its field), and look like:
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lis %r11, %hi(index*4 + &plt[PLT_DATA_START_WORDS])
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lwzu %r12, %r11, %lo(index*4 + &plt[PLT_DATA_START_WORDS])
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b &plt[PLT_TRAMPOLINE_ENTRY_WORDS]
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bctr
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(5) Long indirect jumps. These replace (4) when a direct jump
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wouldn't reach. They look like:
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lis %r11, %hi(index*4 + &plt[PLT_DATA_START_WORDS])
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lwz %r12, %r11, %lo(index*4 + &plt[PLT_DATA_START_WORDS])
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mtctr %r12
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bctr
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(6) Long direct jumps. These are used when thread-safety is not
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required. They look like:
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lis %r12, %hi(finaladdr)
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addi %r12, %r12, %lo(finaladdr)
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mtctr %r12
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bctr
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The lazy entries, (2) and (4), are set up here in
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__elf_machine_runtime_setup. (1), (3), and (5) are set up in
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__elf_machine_fixup_plt. (1), (3), and (6) can also be constructed
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in __process_machine_rela.
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The reason for the somewhat strange construction of the long
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entries, (4) and (5), is that we need to ensure thread-safety. For
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(1) and (3), this is obvious because only one instruction is
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changed and the PPC architecture guarantees that aligned stores are
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atomic. For (5), this is more tricky. When changing (4) to (5),
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the `b' instruction is first changed to to `mtctr'; this is safe
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and is why the `lwzu' instruction is not just a simple `addi'.
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Once this is done, and is visible to all processors, the `lwzu' can
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safely be changed to a `lwz'. */
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int
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__elf_machine_runtime_setup (struct link_map *map, int lazy, int profile)
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{
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if (map->l_info[DT_JMPREL])
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{
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Elf32_Word i;
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Elf32_Word *plt = (Elf32_Word *) D_PTR (map, l_info[DT_PLTGOT]);
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Elf32_Word num_plt_entries = (map->l_info[DT_PLTRELSZ]->d_un.d_val
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/ sizeof (Elf32_Rela));
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Elf32_Word rel_offset_words = PLT_DATA_START_WORDS (num_plt_entries);
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Elf32_Word data_words = (Elf32_Word) (plt + rel_offset_words);
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Elf32_Word size_modified;
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extern void _dl_runtime_resolve (void);
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extern void _dl_prof_resolve (void);
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/* Convert the index in r11 into an actual address, and get the
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word at that address. */
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plt[PLT_LONGBRANCH_ENTRY_WORDS] = OPCODE_ADDIS_HI (11, 11, data_words);
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plt[PLT_LONGBRANCH_ENTRY_WORDS + 1] = OPCODE_LWZ (11, data_words, 11);
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/* Call the procedure at that address. */
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plt[PLT_LONGBRANCH_ENTRY_WORDS + 2] = OPCODE_MTCTR (11);
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plt[PLT_LONGBRANCH_ENTRY_WORDS + 3] = OPCODE_BCTR ();
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if (lazy)
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{
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Elf32_Word *tramp = plt + PLT_TRAMPOLINE_ENTRY_WORDS;
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Elf32_Word dlrr = (Elf32_Word)(profile
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? _dl_prof_resolve
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: _dl_runtime_resolve);
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Elf32_Word offset;
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if (profile && GLRO(dl_profile) != NULL
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&& _dl_name_match_p (GLRO(dl_profile), map))
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/* This is the object we are looking for. Say that we really
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want profiling and the timers are started. */
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GL(dl_profile_map) = map;
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/* For the long entries, subtract off data_words. */
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tramp[0] = OPCODE_ADDIS_HI (11, 11, -data_words);
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tramp[1] = OPCODE_ADDI (11, 11, -data_words);
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/* Multiply index of entry by 3 (in r11). */
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tramp[2] = OPCODE_SLWI (12, 11, 1);
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tramp[3] = OPCODE_ADD (11, 12, 11);
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if (dlrr <= 0x01fffffc || dlrr >= 0xfe000000)
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{
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/* Load address of link map in r12. */
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tramp[4] = OPCODE_LI (12, (Elf32_Word) map);
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tramp[5] = OPCODE_ADDIS_HI (12, 12, (Elf32_Word) map);
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/* Call _dl_runtime_resolve. */
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tramp[6] = OPCODE_BA (dlrr);
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}
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else
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{
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/* Get address of _dl_runtime_resolve in CTR. */
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tramp[4] = OPCODE_LI (12, dlrr);
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tramp[5] = OPCODE_ADDIS_HI (12, 12, dlrr);
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tramp[6] = OPCODE_MTCTR (12);
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/* Load address of link map in r12. */
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tramp[7] = OPCODE_LI (12, (Elf32_Word) map);
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tramp[8] = OPCODE_ADDIS_HI (12, 12, (Elf32_Word) map);
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/* Call _dl_runtime_resolve. */
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tramp[9] = OPCODE_BCTR ();
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}
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/* Set up the lazy PLT entries. */
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offset = PLT_INITIAL_ENTRY_WORDS;
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i = 0;
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while (i < num_plt_entries && i < PLT_DOUBLE_SIZE)
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{
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plt[offset ] = OPCODE_LI (11, i * 4);
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plt[offset+1] = OPCODE_B ((PLT_TRAMPOLINE_ENTRY_WORDS + 2
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- (offset+1))
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* 4);
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i++;
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offset += 2;
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}
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while (i < num_plt_entries)
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{
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plt[offset ] = OPCODE_LIS_HI (11, i * 4 + data_words);
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plt[offset+1] = OPCODE_LWZU (12, i * 4 + data_words, 11);
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plt[offset+2] = OPCODE_B ((PLT_TRAMPOLINE_ENTRY_WORDS
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- (offset+2))
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* 4);
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plt[offset+3] = OPCODE_BCTR ();
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i++;
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offset += 4;
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}
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}
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/* Now, we've modified code. We need to write the changes from
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the data cache to a second-level unified cache, then make
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sure that stale data in the instruction cache is removed.
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(In a multiprocessor system, the effect is more complex.)
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Most of the PLT shouldn't be in the instruction cache, but
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there may be a little overlap at the start and the end.
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Assumes that dcbst and icbi apply to lines of 16 bytes or
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more. Current known line sizes are 16, 32, and 128 bytes.
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The following gets the __cache_line_size, when available. */
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/* Default minimum 4 words per cache line. */
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int line_size_words = 4;
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/* Don't try this until ld.so has relocated itself! */
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int *line_size_ptr = &__cache_line_size;
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if (lazy && line_size_ptr != NULL)
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{
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/* Verify that __cache_line_size is defined and set. */
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if (*line_size_ptr != 0)
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/* Convert bytes to words. */
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line_size_words = *line_size_ptr / 4;
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}
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size_modified = lazy ? rel_offset_words : 6;
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for (i = 0; i < size_modified; i += line_size_words)
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PPC_DCBST (plt + i);
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PPC_DCBST (plt + size_modified - 1);
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PPC_SYNC;
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for (i = 0; i < size_modified; i += line_size_words)
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PPC_ICBI (plt + i);
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PPC_ICBI (plt + size_modified - 1);
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PPC_ISYNC;
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}
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return lazy;
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}
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Elf32_Addr
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__elf_machine_fixup_plt (struct link_map *map, const Elf32_Rela *reloc,
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Elf32_Addr *reloc_addr, Elf32_Addr finaladdr)
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{
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Elf32_Sword delta = finaladdr - (Elf32_Word) reloc_addr;
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if (delta << 6 >> 6 == delta)
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*reloc_addr = OPCODE_B (delta);
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else if (finaladdr <= 0x01fffffc || finaladdr >= 0xfe000000)
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*reloc_addr = OPCODE_BA (finaladdr);
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else
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{
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Elf32_Word *plt, *data_words;
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Elf32_Word index, offset, num_plt_entries;
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num_plt_entries = (map->l_info[DT_PLTRELSZ]->d_un.d_val
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/ sizeof(Elf32_Rela));
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plt = (Elf32_Word *) D_PTR (map, l_info[DT_PLTGOT]);
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offset = reloc_addr - plt;
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index = (offset - PLT_INITIAL_ENTRY_WORDS)/2;
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data_words = plt + PLT_DATA_START_WORDS (num_plt_entries);
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reloc_addr += 1;
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if (index < PLT_DOUBLE_SIZE)
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{
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data_words[index] = finaladdr;
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PPC_SYNC;
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*reloc_addr = OPCODE_B ((PLT_LONGBRANCH_ENTRY_WORDS - (offset+1))
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* 4);
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}
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else
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{
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index -= (index - PLT_DOUBLE_SIZE)/2;
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data_words[index] = finaladdr;
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PPC_SYNC;
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reloc_addr[1] = OPCODE_MTCTR (12);
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MODIFIED_CODE_NOQUEUE (reloc_addr + 1);
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PPC_SYNC;
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reloc_addr[0] = OPCODE_LWZ (12,
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(Elf32_Word) (data_words + index), 11);
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}
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}
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MODIFIED_CODE (reloc_addr);
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return finaladdr;
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}
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void
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_dl_reloc_overflow (struct link_map *map,
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const char *name,
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Elf32_Addr *const reloc_addr,
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const Elf32_Sym *refsym)
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{
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char buffer[128];
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char *t;
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t = stpcpy (buffer, name);
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t = stpcpy (t, " relocation at 0x00000000");
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_itoa_word ((unsigned) reloc_addr, t, 16, 0);
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if (refsym)
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{
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const char *strtab;
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strtab = (const void *) D_PTR (map, l_info[DT_STRTAB]);
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t = stpcpy (t, " for symbol `");
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t = stpcpy (t, strtab + refsym->st_name);
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t = stpcpy (t, "'");
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}
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t = stpcpy (t, " out of range");
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_dl_signal_error (0, map->l_name, NULL, buffer);
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}
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void
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__process_machine_rela (struct link_map *map,
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const Elf32_Rela *reloc,
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struct link_map *sym_map,
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const Elf32_Sym *sym,
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const Elf32_Sym *refsym,
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Elf32_Addr *const reloc_addr,
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Elf32_Addr const finaladdr,
|
|
int rinfo)
|
|
{
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|
switch (rinfo)
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|
{
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|
case R_PPC_NONE:
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|
return;
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|
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case R_PPC_ADDR32:
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case R_PPC_GLOB_DAT:
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case R_PPC_RELATIVE:
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*reloc_addr = finaladdr;
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return;
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|
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case R_PPC_UADDR32:
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((char *) reloc_addr)[0] = finaladdr >> 24;
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((char *) reloc_addr)[1] = finaladdr >> 16;
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((char *) reloc_addr)[2] = finaladdr >> 8;
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((char *) reloc_addr)[3] = finaladdr;
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break;
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|
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case R_PPC_ADDR24:
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if (__builtin_expect (finaladdr > 0x01fffffc && finaladdr < 0xfe000000, 0))
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_dl_reloc_overflow (map, "R_PPC_ADDR24", reloc_addr, refsym);
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*reloc_addr = (*reloc_addr & 0xfc000003) | (finaladdr & 0x3fffffc);
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break;
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|
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case R_PPC_ADDR16:
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if (__builtin_expect (finaladdr > 0x7fff && finaladdr < 0xffff8000, 0))
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_dl_reloc_overflow (map, "R_PPC_ADDR16", reloc_addr, refsym);
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*(Elf32_Half*) reloc_addr = finaladdr;
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break;
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|
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|
case R_PPC_UADDR16:
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if (__builtin_expect (finaladdr > 0x7fff && finaladdr < 0xffff8000, 0))
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_dl_reloc_overflow (map, "R_PPC_UADDR16", reloc_addr, refsym);
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((char *) reloc_addr)[0] = finaladdr >> 8;
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((char *) reloc_addr)[1] = finaladdr;
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break;
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|
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case R_PPC_ADDR16_LO:
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*(Elf32_Half*) reloc_addr = finaladdr;
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break;
|
|
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case R_PPC_ADDR16_HI:
|
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*(Elf32_Half*) reloc_addr = finaladdr >> 16;
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break;
|
|
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case R_PPC_ADDR16_HA:
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*(Elf32_Half*) reloc_addr = (finaladdr + 0x8000) >> 16;
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break;
|
|
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|
case R_PPC_ADDR14:
|
|
case R_PPC_ADDR14_BRTAKEN:
|
|
case R_PPC_ADDR14_BRNTAKEN:
|
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if (__builtin_expect (finaladdr > 0x7fff && finaladdr < 0xffff8000, 0))
|
|
_dl_reloc_overflow (map, "R_PPC_ADDR14", reloc_addr, refsym);
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*reloc_addr = (*reloc_addr & 0xffff0003) | (finaladdr & 0xfffc);
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if (rinfo != R_PPC_ADDR14)
|
|
*reloc_addr = ((*reloc_addr & 0xffdfffff)
|
|
| ((rinfo == R_PPC_ADDR14_BRTAKEN)
|
|
^ (finaladdr >> 31)) << 21);
|
|
break;
|
|
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|
case R_PPC_REL24:
|
|
{
|
|
Elf32_Sword delta = finaladdr - (Elf32_Word) reloc_addr;
|
|
if (delta << 6 >> 6 != delta)
|
|
_dl_reloc_overflow (map, "R_PPC_REL24", reloc_addr, refsym);
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|
*reloc_addr = (*reloc_addr & 0xfc000003) | (delta & 0x3fffffc);
|
|
}
|
|
break;
|
|
|
|
case R_PPC_COPY:
|
|
if (sym == NULL)
|
|
/* This can happen in trace mode when an object could not be
|
|
found. */
|
|
return;
|
|
if (sym->st_size > refsym->st_size
|
|
|| (GLRO(dl_verbose) && sym->st_size < refsym->st_size))
|
|
{
|
|
const char *strtab;
|
|
|
|
strtab = (const void *) D_PTR (map, l_info[DT_STRTAB]);
|
|
_dl_error_printf ("\
|
|
%s: Symbol `%s' has different size in shared object, onsider re-linking\n",
|
|
rtld_progname ?: "<program name unknown>",
|
|
strtab + refsym->st_name);
|
|
}
|
|
memcpy (reloc_addr, (char *) finaladdr, MIN (sym->st_size,
|
|
refsym->st_size));
|
|
return;
|
|
|
|
case R_PPC_REL32:
|
|
*reloc_addr = finaladdr - (Elf32_Word) reloc_addr;
|
|
return;
|
|
|
|
case R_PPC_JMP_SLOT:
|
|
/* It used to be that elf_machine_fixup_plt was used here,
|
|
but that doesn't work when ld.so relocates itself
|
|
for the second time. On the bright side, there's
|
|
no need to worry about thread-safety here. */
|
|
{
|
|
Elf32_Sword delta = finaladdr - (Elf32_Word) reloc_addr;
|
|
if (delta << 6 >> 6 == delta)
|
|
*reloc_addr = OPCODE_B (delta);
|
|
else if (finaladdr <= 0x01fffffc || finaladdr >= 0xfe000000)
|
|
*reloc_addr = OPCODE_BA (finaladdr);
|
|
else
|
|
{
|
|
Elf32_Word *plt, *data_words;
|
|
Elf32_Word index, offset, num_plt_entries;
|
|
|
|
plt = (Elf32_Word *) D_PTR (map, l_info[DT_PLTGOT]);
|
|
offset = reloc_addr - plt;
|
|
|
|
if (offset < PLT_DOUBLE_SIZE*2 + PLT_INITIAL_ENTRY_WORDS)
|
|
{
|
|
index = (offset - PLT_INITIAL_ENTRY_WORDS)/2;
|
|
num_plt_entries = (map->l_info[DT_PLTRELSZ]->d_un.d_val
|
|
/ sizeof(Elf32_Rela));
|
|
data_words = plt + PLT_DATA_START_WORDS (num_plt_entries);
|
|
data_words[index] = finaladdr;
|
|
reloc_addr[0] = OPCODE_LI (11, index * 4);
|
|
reloc_addr[1] = OPCODE_B ((PLT_LONGBRANCH_ENTRY_WORDS
|
|
- (offset+1))
|
|
* 4);
|
|
MODIFIED_CODE_NOQUEUE (reloc_addr + 1);
|
|
}
|
|
else
|
|
{
|
|
reloc_addr[0] = OPCODE_LIS_HI (12, finaladdr);
|
|
reloc_addr[1] = OPCODE_ADDI (12, 12, finaladdr);
|
|
reloc_addr[2] = OPCODE_MTCTR (12);
|
|
reloc_addr[3] = OPCODE_BCTR ();
|
|
MODIFIED_CODE_NOQUEUE (reloc_addr + 3);
|
|
}
|
|
}
|
|
}
|
|
break;
|
|
|
|
#ifdef USE_TLS
|
|
#define CHECK_STATIC_TLS(map, sym_map) \
|
|
do { \
|
|
if (__builtin_expect ((sym_map)->l_tls_offset == NO_TLS_OFFSET, 0)) \
|
|
_dl_allocate_static_tls (sym_map); \
|
|
} while (0)
|
|
# define DO_TLS_RELOC(suffix) \
|
|
case R_PPC_DTPREL##suffix: \
|
|
/* During relocation all TLS symbols are defined and used. \
|
|
Therefore the offset is already correct. */ \
|
|
if (sym_map != NULL) \
|
|
do_reloc##suffix ("R_PPC_DTPREL"#suffix, \
|
|
TLS_DTPREL_VALUE (sym, reloc)); \
|
|
break; \
|
|
case R_PPC_TPREL##suffix: \
|
|
if (sym_map != NULL) \
|
|
{ \
|
|
CHECK_STATIC_TLS (map, sym_map); \
|
|
do_reloc##suffix ("R_PPC_TPREL"#suffix, \
|
|
TLS_TPREL_VALUE (sym_map, sym, reloc)); \
|
|
} \
|
|
break;
|
|
|
|
inline void do_reloc16 (const char *r_name, Elf32_Addr value)
|
|
{
|
|
if (__builtin_expect (value > 0x7fff && value < 0xffff8000, 0))
|
|
_dl_reloc_overflow (map, r_name, reloc_addr, refsym);
|
|
*(Elf32_Half *) reloc_addr = value;
|
|
}
|
|
inline void do_reloc16_LO (const char *r_name, Elf32_Addr value)
|
|
{
|
|
*(Elf32_Half *) reloc_addr = value;
|
|
}
|
|
inline void do_reloc16_HI (const char *r_name, Elf32_Addr value)
|
|
{
|
|
*(Elf32_Half *) reloc_addr = value >> 16;
|
|
}
|
|
inline void do_reloc16_HA (const char *r_name, Elf32_Addr value)
|
|
{
|
|
*(Elf32_Half *) reloc_addr = (value + 0x8000) >> 16;
|
|
}
|
|
DO_TLS_RELOC (16)
|
|
DO_TLS_RELOC (16_LO)
|
|
DO_TLS_RELOC (16_HI)
|
|
DO_TLS_RELOC (16_HA)
|
|
#endif
|
|
|
|
default:
|
|
_dl_reloc_bad_type (map, rinfo, 0);
|
|
return;
|
|
}
|
|
|
|
MODIFIED_CODE_NOQUEUE (reloc_addr);
|
|
}
|