424 lines
12 KiB
ArmAsm
424 lines
12 KiB
ArmAsm
/* PLT trampolines. x86-64 version.
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Copyright (C) 2004-2014 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <config.h>
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#include <sysdep.h>
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#include <link-defines.h>
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#if (RTLD_SAVESPACE_SSE % 32) != 0
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# error RTLD_SAVESPACE_SSE must be aligned to 32 bytes
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#endif
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/* Area on stack to save and restore registers used for parameter
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passing when calling _dl_fixup. */
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#ifdef __ILP32__
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/* X32 saves RCX, RDX, RSI, RDI, R8 and R9 plus RAX. */
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# define REGISTER_SAVE_AREA (8 * 7)
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# define REGISTER_SAVE_RAX 0
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#else
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/* X86-64 saves RCX, RDX, RSI, RDI, R8 and R9 plus RAX as well as BND0,
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BND1, BND2, BND3. */
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# define REGISTER_SAVE_AREA (8 * 7 + 16 * 4)
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/* Align bound register save area to 16 bytes. */
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# define REGISTER_SAVE_BND0 0
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# define REGISTER_SAVE_BND1 (REGISTER_SAVE_BND0 + 16)
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# define REGISTER_SAVE_BND2 (REGISTER_SAVE_BND1 + 16)
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# define REGISTER_SAVE_BND3 (REGISTER_SAVE_BND2 + 16)
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# define REGISTER_SAVE_RAX (REGISTER_SAVE_BND3 + 16)
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#endif
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#define REGISTER_SAVE_RCX (REGISTER_SAVE_RAX + 8)
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#define REGISTER_SAVE_RDX (REGISTER_SAVE_RCX + 8)
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#define REGISTER_SAVE_RSI (REGISTER_SAVE_RDX + 8)
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#define REGISTER_SAVE_RDI (REGISTER_SAVE_RSI + 8)
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#define REGISTER_SAVE_R8 (REGISTER_SAVE_RDI + 8)
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#define REGISTER_SAVE_R9 (REGISTER_SAVE_R8 + 8)
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.text
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.globl _dl_runtime_resolve
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.type _dl_runtime_resolve, @function
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.align 16
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cfi_startproc
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_dl_runtime_resolve:
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cfi_adjust_cfa_offset(16) # Incorporate PLT
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subq $REGISTER_SAVE_AREA,%rsp
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cfi_adjust_cfa_offset(REGISTER_SAVE_AREA)
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# Preserve registers otherwise clobbered.
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movq %rax, REGISTER_SAVE_RAX(%rsp)
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movq %rcx, REGISTER_SAVE_RCX(%rsp)
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movq %rdx, REGISTER_SAVE_RDX(%rsp)
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movq %rsi, REGISTER_SAVE_RSI(%rsp)
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movq %rdi, REGISTER_SAVE_RDI(%rsp)
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movq %r8, REGISTER_SAVE_R8(%rsp)
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movq %r9, REGISTER_SAVE_R9(%rsp)
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#ifndef __ILP32__
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# We also have to preserve bound registers. These are nops if
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# Intel MPX isn't available or disabled.
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# ifdef HAVE_MPX_SUPPORT
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bndmov %bnd0, REGISTER_SAVE_BND0(%rsp)
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bndmov %bnd1, REGISTER_SAVE_BND1(%rsp)
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bndmov %bnd2, REGISTER_SAVE_BND2(%rsp)
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bndmov %bnd3, REGISTER_SAVE_BND3(%rsp)
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# else
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.byte 0x66,0x0f,0x1b,0x44,0x24,REGISTER_SAVE_BND0
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.byte 0x66,0x0f,0x1b,0x4c,0x24,REGISTER_SAVE_BND1
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.byte 0x66,0x0f,0x1b,0x54,0x24,REGISTER_SAVE_BND2
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.byte 0x66,0x0f,0x1b,0x5c,0x24,REGISTER_SAVE_BND3
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# endif
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#endif
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# Copy args pushed by PLT in register.
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# %rdi: link_map, %rsi: reloc_index
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movq (REGISTER_SAVE_AREA + 8)(%rsp), %rsi
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movq REGISTER_SAVE_AREA(%rsp), %rdi
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call _dl_fixup # Call resolver.
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movq %rax, %r11 # Save return value
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#ifndef __ILP32__
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# Restore bound registers. These are nops if Intel MPX isn't
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# avaiable or disabled.
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# ifdef HAVE_MPX_SUPPORT
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bndmov REGISTER_SAVE_BND3(%rsp), %bnd3
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bndmov REGISTER_SAVE_BND2(%rsp), %bnd2
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bndmov REGISTER_SAVE_BND1(%rsp), %bnd1
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bndmov REGISTER_SAVE_BND0(%rsp), %bnd0
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# else
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.byte 0x66,0x0f,0x1a,0x5c,0x24,REGISTER_SAVE_BND3
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.byte 0x66,0x0f,0x1a,0x54,0x24,REGISTER_SAVE_BND2
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.byte 0x66,0x0f,0x1a,0x4c,0x24,REGISTER_SAVE_BND1
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.byte 0x66,0x0f,0x1a,0x44,0x24,REGISTER_SAVE_BND0
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# endif
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#endif
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# Get register content back.
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movq REGISTER_SAVE_R9(%rsp), %r9
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movq REGISTER_SAVE_R8(%rsp), %r8
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movq REGISTER_SAVE_RDI(%rsp), %rdi
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movq REGISTER_SAVE_RSI(%rsp), %rsi
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movq REGISTER_SAVE_RDX(%rsp), %rdx
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movq REGISTER_SAVE_RCX(%rsp), %rcx
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movq REGISTER_SAVE_RAX(%rsp), %rax
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# Adjust stack(PLT did 2 pushes)
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addq $(REGISTER_SAVE_AREA + 16), %rsp
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cfi_adjust_cfa_offset(-(REGISTER_SAVE_AREA + 16))
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jmp *%r11 # Jump to function address.
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cfi_endproc
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.size _dl_runtime_resolve, .-_dl_runtime_resolve
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#ifndef PROF
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.globl _dl_runtime_profile
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.type _dl_runtime_profile, @function
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.align 16
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cfi_startproc
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_dl_runtime_profile:
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cfi_adjust_cfa_offset(16) # Incorporate PLT
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/* The La_x86_64_regs data structure pointed to by the
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fourth paramater must be 16-byte aligned. This must
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be explicitly enforced. We have the set up a dynamically
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sized stack frame. %rbx points to the top half which
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has a fixed size and preserves the original stack pointer. */
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subq $32, %rsp # Allocate the local storage.
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cfi_adjust_cfa_offset(32)
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movq %rbx, (%rsp)
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cfi_rel_offset(%rbx, 0)
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/* On the stack:
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56(%rbx) parameter #1
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48(%rbx) return address
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40(%rbx) reloc index
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32(%rbx) link_map
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24(%rbx) La_x86_64_regs pointer
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16(%rbx) framesize
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8(%rbx) rax
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(%rbx) rbx
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*/
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movq %rax, 8(%rsp)
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movq %rsp, %rbx
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cfi_def_cfa_register(%rbx)
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/* Actively align the La_x86_64_regs structure. */
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andq $0xfffffffffffffff0, %rsp
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# if defined HAVE_AVX_SUPPORT || defined HAVE_AVX512_ASM_SUPPORT
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/* sizeof(La_x86_64_regs). Need extra space for 8 SSE registers
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to detect if any xmm0-xmm7 registers are changed by audit
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module. */
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subq $(LR_SIZE + XMM_SIZE*8), %rsp
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# else
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subq $LR_SIZE, %rsp # sizeof(La_x86_64_regs)
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# endif
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movq %rsp, 24(%rbx)
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/* Fill the La_x86_64_regs structure. */
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movq %rdx, LR_RDX_OFFSET(%rsp)
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movq %r8, LR_R8_OFFSET(%rsp)
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movq %r9, LR_R9_OFFSET(%rsp)
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movq %rcx, LR_RCX_OFFSET(%rsp)
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movq %rsi, LR_RSI_OFFSET(%rsp)
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movq %rdi, LR_RDI_OFFSET(%rsp)
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movq %rbp, LR_RBP_OFFSET(%rsp)
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leaq 48(%rbx), %rax
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movq %rax, LR_RSP_OFFSET(%rsp)
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/* We always store the XMM registers even if AVX is available.
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This is to provide backward binary compatibility for existing
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audit modules. */
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movaps %xmm0, (LR_XMM_OFFSET)(%rsp)
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movaps %xmm1, (LR_XMM_OFFSET + XMM_SIZE)(%rsp)
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movaps %xmm2, (LR_XMM_OFFSET + XMM_SIZE*2)(%rsp)
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movaps %xmm3, (LR_XMM_OFFSET + XMM_SIZE*3)(%rsp)
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movaps %xmm4, (LR_XMM_OFFSET + XMM_SIZE*4)(%rsp)
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movaps %xmm5, (LR_XMM_OFFSET + XMM_SIZE*5)(%rsp)
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movaps %xmm6, (LR_XMM_OFFSET + XMM_SIZE*6)(%rsp)
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movaps %xmm7, (LR_XMM_OFFSET + XMM_SIZE*7)(%rsp)
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# ifndef __ILP32__
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# ifdef HAVE_MPX_SUPPORT
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bndmov %bnd0, (LR_BND_OFFSET)(%rsp) # Preserve bound
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bndmov %bnd1, (LR_BND_OFFSET + BND_SIZE)(%rsp) # registers. Nops if
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bndmov %bnd2, (LR_BND_OFFSET + BND_SIZE*2)(%rsp) # MPX not available
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bndmov %bnd3, (LR_BND_OFFSET + BND_SIZE*3)(%rsp) # or disabled.
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# else
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.byte 0x66,0x0f,0x1b,0x84,0x24;.long (LR_BND_OFFSET)
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.byte 0x66,0x0f,0x1b,0x8c,0x24;.long (LR_BND_OFFSET + BND_SIZE)
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.byte 0x66,0x0f,0x1b,0x84,0x24;.long (LR_BND_OFFSET + BND_SIZE*2)
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.byte 0x66,0x0f,0x1b,0x8c,0x24;.long (LR_BND_OFFSET + BND_SIZE*3)
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# endif
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# endif
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# if defined HAVE_AVX_SUPPORT || defined HAVE_AVX512_ASM_SUPPORT
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.data
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L(have_avx):
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.zero 4
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.size L(have_avx), 4
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.previous
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cmpl $0, L(have_avx)(%rip)
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jne L(defined)
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movq %rbx, %r11 # Save rbx
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movl $1, %eax
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cpuid
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movq %r11,%rbx # Restore rbx
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xorl %eax, %eax
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// AVX and XSAVE supported?
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andl $((1 << 28) | (1 << 27)), %ecx
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cmpl $((1 << 28) | (1 << 27)), %ecx
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jne 10f
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# ifdef HAVE_AVX512_ASM_SUPPORT
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// AVX512 supported in processor?
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movq %rbx, %r11 # Save rbx
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xorl %ecx, %ecx
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mov $0x7, %eax
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cpuid
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andl $(1 << 16), %ebx
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# endif
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xorl %ecx, %ecx
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// Get XFEATURE_ENABLED_MASK
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xgetbv
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# ifdef HAVE_AVX512_ASM_SUPPORT
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test %ebx, %ebx
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movq %r11, %rbx # Restore rbx
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je 20f
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// Verify that XCR0[7:5] = '111b' and
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// XCR0[2:1] = '11b' which means
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// that zmm state is enabled
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andl $0xe6, %eax
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cmpl $0xe6, %eax
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jne 20f
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movl %eax, L(have_avx)(%rip)
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L(avx512):
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# define RESTORE_AVX
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# define VMOV vmovdqu64
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# define VEC(i) zmm##i
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# define MORE_CODE
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# include "dl-trampoline.h"
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# undef VMOV
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# undef VEC
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# undef RESTORE_AVX
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# endif
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20: andl $0x6, %eax
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10: subl $0x5, %eax
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movl %eax, L(have_avx)(%rip)
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cmpl $0, %eax
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L(defined):
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js L(no_avx)
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# ifdef HAVE_AVX512_ASM_SUPPORT
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cmpl $0xe6, L(have_avx)(%rip)
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je L(avx512)
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# endif
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# define RESTORE_AVX
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# define VMOV vmovdqu
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# define VEC(i) ymm##i
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# define MORE_CODE
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# include "dl-trampoline.h"
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.align 16
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L(no_avx):
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# endif
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# undef RESTORE_AVX
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# include "dl-trampoline.h"
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cfi_endproc
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.size _dl_runtime_profile, .-_dl_runtime_profile
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#endif
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#ifdef SHARED
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.globl _dl_x86_64_save_sse
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.type _dl_x86_64_save_sse, @function
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.align 16
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cfi_startproc
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_dl_x86_64_save_sse:
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# if defined HAVE_AVX_SUPPORT || defined HAVE_AVX512_ASM_SUPPORT
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cmpl $0, L(have_avx)(%rip)
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jne L(defined_5)
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movq %rbx, %r11 # Save rbx
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movl $1, %eax
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cpuid
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movq %r11,%rbx # Restore rbx
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xorl %eax, %eax
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// AVX and XSAVE supported?
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andl $((1 << 28) | (1 << 27)), %ecx
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cmpl $((1 << 28) | (1 << 27)), %ecx
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jne 1f
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# ifdef HAVE_AVX512_ASM_SUPPORT
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// AVX512 supported in a processor?
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movq %rbx, %r11 # Save rbx
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xorl %ecx,%ecx
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mov $0x7,%eax
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cpuid
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andl $(1 << 16), %ebx
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# endif
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xorl %ecx, %ecx
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// Get XFEATURE_ENABLED_MASK
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xgetbv
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# ifdef HAVE_AVX512_ASM_SUPPORT
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test %ebx, %ebx
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movq %r11, %rbx # Restore rbx
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je 2f
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// Verify that XCR0[7:5] = '111b' and
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// XCR0[2:1] = '11b' which means
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// that zmm state is enabled
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andl $0xe6, %eax
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movl %eax, L(have_avx)(%rip)
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cmpl $0xe6, %eax
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je L(avx512_5)
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# endif
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2: andl $0x6, %eax
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1: subl $0x5, %eax
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movl %eax, L(have_avx)(%rip)
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cmpl $0, %eax
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L(defined_5):
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js L(no_avx5)
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# ifdef HAVE_AVX512_ASM_SUPPORT
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cmpl $0xe6, L(have_avx)(%rip)
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je L(avx512_5)
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# endif
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vmovdqa %ymm0, %fs:RTLD_SAVESPACE_SSE+0*YMM_SIZE
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vmovdqa %ymm1, %fs:RTLD_SAVESPACE_SSE+1*YMM_SIZE
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vmovdqa %ymm2, %fs:RTLD_SAVESPACE_SSE+2*YMM_SIZE
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vmovdqa %ymm3, %fs:RTLD_SAVESPACE_SSE+3*YMM_SIZE
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vmovdqa %ymm4, %fs:RTLD_SAVESPACE_SSE+4*YMM_SIZE
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vmovdqa %ymm5, %fs:RTLD_SAVESPACE_SSE+5*YMM_SIZE
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vmovdqa %ymm6, %fs:RTLD_SAVESPACE_SSE+6*YMM_SIZE
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vmovdqa %ymm7, %fs:RTLD_SAVESPACE_SSE+7*YMM_SIZE
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ret
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# ifdef HAVE_AVX512_ASM_SUPPORT
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L(avx512_5):
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vmovdqu64 %zmm0, %fs:RTLD_SAVESPACE_SSE+0*ZMM_SIZE
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vmovdqu64 %zmm1, %fs:RTLD_SAVESPACE_SSE+1*ZMM_SIZE
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vmovdqu64 %zmm2, %fs:RTLD_SAVESPACE_SSE+2*ZMM_SIZE
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vmovdqu64 %zmm3, %fs:RTLD_SAVESPACE_SSE+3*ZMM_SIZE
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vmovdqu64 %zmm4, %fs:RTLD_SAVESPACE_SSE+4*ZMM_SIZE
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vmovdqu64 %zmm5, %fs:RTLD_SAVESPACE_SSE+5*ZMM_SIZE
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vmovdqu64 %zmm6, %fs:RTLD_SAVESPACE_SSE+6*ZMM_SIZE
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vmovdqu64 %zmm7, %fs:RTLD_SAVESPACE_SSE+7*ZMM_SIZE
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ret
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# endif
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L(no_avx5):
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# endif
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movdqa %xmm0, %fs:RTLD_SAVESPACE_SSE+0*XMM_SIZE
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movdqa %xmm1, %fs:RTLD_SAVESPACE_SSE+1*XMM_SIZE
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movdqa %xmm2, %fs:RTLD_SAVESPACE_SSE+2*XMM_SIZE
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movdqa %xmm3, %fs:RTLD_SAVESPACE_SSE+3*XMM_SIZE
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movdqa %xmm4, %fs:RTLD_SAVESPACE_SSE+4*XMM_SIZE
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movdqa %xmm5, %fs:RTLD_SAVESPACE_SSE+5*XMM_SIZE
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movdqa %xmm6, %fs:RTLD_SAVESPACE_SSE+6*XMM_SIZE
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movdqa %xmm7, %fs:RTLD_SAVESPACE_SSE+7*XMM_SIZE
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ret
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cfi_endproc
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.size _dl_x86_64_save_sse, .-_dl_x86_64_save_sse
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.globl _dl_x86_64_restore_sse
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.type _dl_x86_64_restore_sse, @function
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.align 16
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cfi_startproc
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_dl_x86_64_restore_sse:
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# if defined HAVE_AVX_SUPPORT || defined HAVE_AVX512_ASM_SUPPORT
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cmpl $0, L(have_avx)(%rip)
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js L(no_avx6)
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# ifdef HAVE_AVX512_ASM_SUPPORT
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cmpl $0xe6, L(have_avx)(%rip)
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je L(avx512_6)
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# endif
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vmovdqa %fs:RTLD_SAVESPACE_SSE+0*YMM_SIZE, %ymm0
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vmovdqa %fs:RTLD_SAVESPACE_SSE+1*YMM_SIZE, %ymm1
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vmovdqa %fs:RTLD_SAVESPACE_SSE+2*YMM_SIZE, %ymm2
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vmovdqa %fs:RTLD_SAVESPACE_SSE+3*YMM_SIZE, %ymm3
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vmovdqa %fs:RTLD_SAVESPACE_SSE+4*YMM_SIZE, %ymm4
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vmovdqa %fs:RTLD_SAVESPACE_SSE+5*YMM_SIZE, %ymm5
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vmovdqa %fs:RTLD_SAVESPACE_SSE+6*YMM_SIZE, %ymm6
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vmovdqa %fs:RTLD_SAVESPACE_SSE+7*YMM_SIZE, %ymm7
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ret
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# ifdef HAVE_AVX512_ASM_SUPPORT
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L(avx512_6):
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vmovdqu64 %fs:RTLD_SAVESPACE_SSE+0*ZMM_SIZE, %zmm0
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vmovdqu64 %fs:RTLD_SAVESPACE_SSE+1*ZMM_SIZE, %zmm1
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vmovdqu64 %fs:RTLD_SAVESPACE_SSE+2*ZMM_SIZE, %zmm2
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vmovdqu64 %fs:RTLD_SAVESPACE_SSE+3*ZMM_SIZE, %zmm3
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vmovdqu64 %fs:RTLD_SAVESPACE_SSE+4*ZMM_SIZE, %zmm4
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vmovdqu64 %fs:RTLD_SAVESPACE_SSE+5*ZMM_SIZE, %zmm5
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vmovdqu64 %fs:RTLD_SAVESPACE_SSE+6*ZMM_SIZE, %zmm6
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vmovdqu64 %fs:RTLD_SAVESPACE_SSE+7*ZMM_SIZE, %zmm7
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ret
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# endif
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L(no_avx6):
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# endif
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movdqa %fs:RTLD_SAVESPACE_SSE+0*XMM_SIZE, %xmm0
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movdqa %fs:RTLD_SAVESPACE_SSE+1*XMM_SIZE, %xmm1
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movdqa %fs:RTLD_SAVESPACE_SSE+2*XMM_SIZE, %xmm2
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movdqa %fs:RTLD_SAVESPACE_SSE+3*XMM_SIZE, %xmm3
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movdqa %fs:RTLD_SAVESPACE_SSE+4*XMM_SIZE, %xmm4
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movdqa %fs:RTLD_SAVESPACE_SSE+5*XMM_SIZE, %xmm5
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movdqa %fs:RTLD_SAVESPACE_SSE+6*XMM_SIZE, %xmm6
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movdqa %fs:RTLD_SAVESPACE_SSE+7*XMM_SIZE, %xmm7
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ret
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cfi_endproc
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.size _dl_x86_64_restore_sse, .-_dl_x86_64_restore_sse
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#endif
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