glibc/sysdeps/ia64/fpu/fraiseexcpt.c

95 lines
2.9 KiB
C

/* Raise given exceptions.
Copyright (C) 1997, 1998, 2000 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by Jes Sorensen <Jes.Sorensen@cern.ch>, 2000.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Library General Public License as
published by the Free Software Foundation; either version 2 of the
License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Library General Public License for more details.
You should have received a copy of the GNU Library General Public
License along with the GNU C Library; see the file COPYING.LIB. If not,
write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include <fenv.h>
#include <math.h>
#include <signal.h>
#include <unistd.h>
#include <asm/fpu.h>
int
feraiseexcept (int excepts)
{
fenv_t fpsr;
double tmp;
double dummy;
/* Raise exceptions represented by EXPECTS. But we must raise only
one signal at a time. It is important the if the overflow/underflow
exception and the inexact exception are given at the same time,
the overflow/underflow exception precedes the inexact exception. */
/* We do these bits in assembly to be certain GCC doesn't optimize
away something important. */
/* First: invalid exception. */
if (FE_INVALID & excepts)
{
/* One example of a invalid operation is 0 * Infinity. */
tmp = 0;
__asm__ __volatile__ ("frcpa.s0 %0,p1=f0,f0" : "=f" (tmp) : : "p1" );
}
/* Next: division by zero. */
if (FE_DIVBYZERO & excepts)
__asm__ __volatile__ ("frcpa.s0 %0,p1=f1,f0" : "=f" (tmp) : : "p1" );
/* XXX There seem to be no reliable way to generate
overflow/underflow exceptions without causing inexact exceptions
as well. */
/* Next: overflow. */
if (FE_OVERFLOW & excepts)
{
__asm__ __volatile__ ("mov.m %0=ar.fpsr" : "=r" (fpsr));
fpsr |= (FE_OVERFLOW << 13);
__asm__ __volatile__ ("mov.m ar.fpsr=%0" : : "r" (fpsr));
if (!((unsigned long int) fpsr & FE_OVERFLOW))
{
pid_t pid = getpid ();
kill (pid, SIGFPE);
}
}
/* Next: underflow. */
if (FE_UNDERFLOW & excepts)
{
__asm__ __volatile__ ("mov.m %0=ar.fpsr" : "=r" (fpsr));
fpsr |= (FE_UNDERFLOW << 13);
__asm__ __volatile__ ("mov.m ar.fpsr=%0" : : "r" (fpsr));
if (!((unsigned long int) fpsr & FE_UNDERFLOW))
{
pid_t pid = getpid();
kill (pid, SIGFPE);
}
}
/* Last: inexact. */
if (FE_INEXACT & excepts)
{
dummy = DBL_MAX;
__asm__ __volatile__ ("fadd.d.s0 %0=%1,f1" : "=f" (dummy) : "0" (dummy));
}
/* Success. */
return 0;
}