aeb25823d8
2002-06-05 Brian Youmans <3diff@gnu.org> * sysdeps/ia64/fpu/e_acos.S: Added text of Intel license. * sysdeps/ia64/fpu/e_acosf.S: Likewise. * sysdeps/ia64/fpu/e_acosl.S: Likewise. * sysdeps/ia64/fpu/e_asin.S: Likewise. * sysdeps/ia64/fpu/e_asinf.S: Likewise. * sysdeps/ia64/fpu/e_asinl.S: Likewise. * sysdeps/ia64/fpu/e_atan2.S: Likewise. * sysdeps/ia64/fpu/e_atan2f.S: Likewise. * sysdeps/ia64/fpu/e_cosh.S: Likewise. * sysdeps/ia64/fpu/e_coshf.S: Likewise. * sysdeps/ia64/fpu/e_coshl.S: Likewise. * sysdeps/ia64/fpu/e_exp.S: Likewise. * sysdeps/ia64/fpu/e_expf.S: Likewise. * sysdeps/ia64/fpu/e_fmod.S: Likewise. * sysdeps/ia64/fpu/e_fmodf.S: Likewise. * sysdeps/ia64/fpu/e_fmodl.S: Likewise. * sysdeps/ia64/fpu/e_hypot.S: Likewise. * sysdeps/ia64/fpu/e_hypotf.S: Likewise. * sysdeps/ia64/fpu/e_hypotl.S: Likewise. * sysdeps/ia64/fpu/e_log.S: Likewise. * sysdeps/ia64/fpu/e_logf.S: Likewise. * sysdeps/ia64/fpu/e_pow.S: Likewise. * sysdeps/ia64/fpu/e_powf.S: Likewise. * sysdeps/ia64/fpu/e_powl.S: Likewise. * sysdeps/ia64/fpu/e_remainder.S: Likewise. * sysdeps/ia64/fpu/e_remainderf.S: Likewise. * sysdeps/ia64/fpu/e_remainderl.S: Likewise. * sysdeps/ia64/fpu/e_scalb.S: Likewise. * sysdeps/ia64/fpu/e_scalbf.S: Likewise. * sysdeps/ia64/fpu/e_scalbl.S: Likewise. * sysdeps/ia64/fpu/e_sinh.S: Likewise. * sysdeps/ia64/fpu/e_sinhf.S: Likewise. * sysdeps/ia64/fpu/e_sinhl.S: Likewise. * sysdeps/ia64/fpu/e_sqrt.S: Likewise. * sysdeps/ia64/fpu/e_sqrtf.S: Likewise. * sysdeps/ia64/fpu/e_sqrtl.S: Likewise. * sysdeps/ia64/fpu/libm_atan2_req.S: Likewise. * sysdeps/ia64/fpu/libm_error.c: Likewise. * sysdeps/ia64/fpu/libm_frexp4.S: Likewise. * sysdeps/ia64/fpu/libm_frexp4f.S: Likewise. * sysdeps/ia64/fpu/s_frexpl.c: Likewise. * sysdeps/ia64/fpu/s_ilogb.S: Likewise. * sysdeps/ia64/fpu/s_ilogbf.S: Likewise. * sysdeps/ia64/fpu/s_ilogbl.S: Likewise. * sysdeps/ia64/fpu/s_ldexp.S: Likewise. * sysdeps/ia64/fpu/s_ldexpf.S: Likewise. * sysdeps/ia64/fpu/s_ldexpl.S: Likewise. * sysdeps/ia64/fpu/s_log1p.S: Likewise. * sysdeps/ia64/fpu/s_log1pf.S: Likewise. * sysdeps/ia64/fpu/s_log1pl.S: Likewise. * sysdeps/ia64/fpu/s_logb.S: Likewise. * sysdeps/ia64/fpu/s_logbf.S: Likewise. * sysdeps/ia64/fpu/s_logbl.S: Likewise. * sysdeps/ia64/fpu/s_modf.S: Likewise. * sysdeps/ia64/fpu/s_modff.S: Likewise. * sysdeps/ia64/fpu/s_modfl.S: Likewise. * sysdeps/ia64/fpu/s_nearbyint.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintf.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintl.S: Likewise. * sysdeps/ia64/fpu/s_rint.S: Likewise. * sysdeps/ia64/fpu/s_rintf.S: Likewise. * sysdeps/ia64/fpu/s_rintl.S: Likewise. * sysdeps/ia64/fpu/s_round.S: Likewise. * sysdeps/ia64/fpu/s_roundf.S: Likewise. * sysdeps/ia64/fpu/s_roundl.S: Likewise. * sysdeps/ia64/fpu/s_scalbn.S: Likewise. * sysdeps/ia64/fpu/s_scalbnf.S: Likewise. * sysdeps/ia64/fpu/s_scalbnl.S: Likewise. * sysdeps/ia64/fpu/s_significand.S: Likewise. * sysdeps/ia64/fpu/s_significandf.S: Likewise. * sysdeps/ia64/fpu/s_significandl.S: Likewise. * sysdeps/ia64/fpu/s_tan.S: Likewise. * sysdeps/ia64/fpu/s_tanf.S: Likewise. * sysdeps/ia64/fpu/s_tanl.S: Likewise. * sysdeps/ia64/fpu/s_trunc.S: Likewise. * sysdeps/ia64/fpu/s_truncf.S: Likewise. * sysdeps/ia64/fpu/s_truncl.S: Likewise. * sysdeps/ieee754/dbl-64/doasin.c: Changed copyright notice to reflect IBM donation of math library to FSF * sysdeps/ieee754/dbl-64/dosincos.c: Likewise. * sysdeps/ieee754/dbl-64/e_asin.c: Likewise. * sysdeps/ieee754/dbl-64/e_atan2.c: Likewise. * sysdeps/ieee754/dbl-64/e_exp.c: Likewise. * sysdeps/ieee754/dbl-64/e_log.c: Likewise. * sysdeps/ieee754/dbl-64/e_pow.c: Likewise. * sysdeps/ieee754/dbl-64/e_remainder.c: Likewise. * sysdeps/ieee754/dbl-64/e_sqrt.c: Likewise. * sysdeps/ieee754/dbl-64/halfulp.c: Likewise. * sysdeps/ieee754/dbl-64/mpa.c: Likewise. * sysdeps/ieee754/dbl-64/mpatan.c: Likewise. * sysdeps/ieee754/dbl-64/mpatan2.c: Likewise. * sysdeps/ieee754/dbl-64/mpexp.c: Likewise. * sysdeps/ieee754/dbl-64/mplog.c: Likewise. * sysdeps/ieee754/dbl-64/mpsqrt.c: Likewise. * sysdeps/ieee754/dbl-64/mptan.c: Likewise. * sysdeps/ieee754/dbl-64/s_atan.c: Likewise. * sysdeps/ieee754/dbl-64/s_sin.c: Likewise. * sysdeps/ieee754/dbl-64/s_tan.c: Likewise. * sysdeps/ieee754/dbl-64/sincos32.c: Likewise. * sysdeps/ieee754/dbl-64/slowexp.c: Likewise. * sysdeps/ieee754/dbl-64/slowpow.c: Likewise. * sysdeps/gnu/netinet/udp.h: Added BSD copying permission notice * sysdeps/vax/__longjmp.c: Likewise. * sysdeps/vax/setjmp.c: Likewise. * libio/filedoalloc.c: Fixed BSD copying permission notice to remove advertising clause * sysdeps/vax/htonl.s: Likewise. * sysdeps/vax/htons.s: Likewise. * libio/wfiledoalloc.c: Likewise. * stdlib/random.c: Likewise. * stdlib/random_r.c: Likewise. * sysdeps/mach/sys/reboot.h: Likewise. * inet/getnameinfo.c: Deleted advertising clause from Inner Net License * sysdeps/posix/getaddrinfo.c: Likewise. * sunrpc/des_impl.c: Updated license permission notice to Lesser GPL and corrected pointer to point to the correct license.
315 lines
8.2 KiB
ArmAsm
315 lines
8.2 KiB
ArmAsm
.file "logbf.s"
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// Copyright (C) 2000, 2001, Intel Corporation
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// All rights reserved.
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//
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// Contributed 2/2/2000 by John Harrison, Ted Kubaska, Bob Norin, Shane Story,
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// and Ping Tak Peter Tang of the Computational Software Lab, Intel Corporation.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// * The name of Intel Corporation may not be used to endorse or promote
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// products derived from this software without specific prior written
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// permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Intel Corporation is the author of this code, and requests that all
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// problem reports or change requests be submitted to it directly at
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// http://developer.intel.com/opensource.
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//
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// History
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//==============================================================
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// 2/02/00 Initial version
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// 2/16/00 Modified to conform to C9X
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// 3/16/00 Improved speed
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// 4/04/00 Unwind support added
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// 5/30/00 Fixed bug when x double-extended denormal
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// 8/15/00 Bundle added after call to __libm_error_support to properly
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// set [the previously overwritten] GR_Parameter_RESULT.
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//
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// API
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//==============================================================
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// float logbf( float x);
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//
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// Overview of operation
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//==============================================================
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// The logbf function extracts the exponent of x as an integer in
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// floating-point format.
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// logbf computes log2 of x as a float
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// logbf is similar to ilogbf but differs in the following ways:
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// +-inf
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// ilogbf: returns INT_MAX
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// logbf: returns +inf
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// Nan returns FP_LOGBNAN (which is either INT_MAX or INT_MIN)
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// ilogbf: returns INT_MAX (7fffffff)
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// logbf: returns QNAN (quietized SNAN)
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// 0 returns FP_ILOGB0 (which is either INT_MIN or -INT_MAX)
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// ilogbf: returns -INT_MAX (80000001)
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// logbf: returns -inf, raises the divide-by-zero exception,
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// and calls libm_error_support to set domain error
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//
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// Registers used
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//==============================================================
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// general registers used:
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// ar.pfs r32
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// r33 -> r37
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// r38 -> r41 used as parameters to error path
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//
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// predicate registers used:
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// p6, p7, p8
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//
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// floating-point registers used:
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// f9, f10, f11
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// f8, input
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#include "libm_support.h"
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GR_SAVE_B0 = r34
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// r40 is address of table of coefficients
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GR_SAVE_PFS = r32
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GR_SAVE_GP = r35
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GR_Parameter_X = r38
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GR_Parameter_Y = r39
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GR_Parameter_RESULT = r40
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GR_Parameter_TAG = r41
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FR_X = f8
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FR_Y = f0
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FR_RESULT = f10
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.align 32
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.global logbf#
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.section .text
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.proc logbf#
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.align 32
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logbf:
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// qnan snan inf norm unorm 0 -+
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// 0 0 0 0 1 0 11
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// 0 b
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{ .mfi
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alloc r32=ar.pfs,1,5,4,0
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(p0) fclass.m.unc p8,p0 = f8, 0x0b
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nop.i 999
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}
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// X NORMAL
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// r37 = exp(f8) - - 0xffff
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// sig(f8) = r37
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// f8 = convert_to_fp (sig))
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{ .mfi
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(p0) getf.exp r35 = f8
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(p0) fnorm f10=f8
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nop.i 999 ;;
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}
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// qnan snan inf norm unorm 0 -+
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// 1 1 1 0 0 0 11
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// e 3
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{ .mmf
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(p0) mov r33 = 0xffff
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(p0) mov r34 = 0x1ffff
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(p0) fclass.m.unc p6,p0 = f8, 0xe3 ;;
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}
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{ .mfb
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(p0) and r36 = r35, r34
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(p0) fclass.m.unc p7,p0 = f8, 0x07
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(p8) br.cond.spnt L(LOGB_DENORM) ;;
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}
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{ .mib
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(p0) sub r37 = r36, r33
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nop.i 999
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(p6) br.cond.spnt L(LOGB_NAN_INF) ;;
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}
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{ .mib
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(p0) setf.sig f9 = r37
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nop.i 999
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(p7) br.cond.spnt L(LOGB_ZERO) ;;
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}
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{ .mfi
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nop.m 999
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(p0) fcvt.xf f10 = f9
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nop.i 999 ;;
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}
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{ .mfb
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nop.m 999
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(p0) fnorm.s f8 = f10
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(p0) br.ret.sptk b0 ;;
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}
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L(LOGB_DENORM):
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// Form signexp of 2^64 in case need to scale denormal
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// Check to see if double-extended denormal
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{ .mfi
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(p0) mov r38 = 0x1003f
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(p0) fclass.m.unc p8,p0 = f10, 0x0b
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nop.i 999 ;;
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}
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// Form 2^64 in case need to scale denormal
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{ .mfi
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(p0) setf.exp f11 = r38
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nop.f 999
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nop.i 999 ;;
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}
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// If double-extended denormal add 64 to exponent bias for scaling
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// If double-extended denormal form x * 2^64 which is normal
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{ .mfi
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(p8) add r33 = 64, r33
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(p8) fmpy f10 = f10, f11
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nop.i 999 ;;
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}
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// Logic is the same as normal path but use normalized input
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{ .mmi
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(p0) getf.exp r35 = f10 ;;
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nop.m 999
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nop.i 999 ;;
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}
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{ .mmi
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(p0) and r36 = r35, r34 ;;
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(p0) sub r37 = r36, r33
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nop.i 999 ;;
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}
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{ .mmi
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(p0) setf.sig f9 = r37
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nop.m 999
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nop.i 999 ;;
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}
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{ .mfi
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nop.m 999
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(p0) fcvt.xf f10 = f9
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nop.i 999 ;;
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}
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{ .mfb
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nop.m 999
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(p0) fnorm.s f8 = f10
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(p0) br.ret.sptk b0 ;;
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}
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L(LOGB_NAN_INF):
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// X NAN or INFINITY, return f8 * f8
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{ .mfb
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nop.m 999
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(p0) fma.s f8= f8,f8,f0
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(p0) br.ret.sptk b0 ;;
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}
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L(LOGB_ZERO):
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// X ZERO
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// return -1.0/fabs(f8)=-inf, set divide-by-zero flag, call error support
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{ .mfi
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nop.m 999
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(p0) fmerge.s f9 = f0,f8
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nop.i 999 ;;
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}
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{ .mfi
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nop.m 999
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(p0) fmerge.ns f10 = f0,f9
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nop.i 999 ;;
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}
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{ .mfi
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nop.m 999
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(p0) frcpa f10,p6 = f1,f10
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nop.i 999 ;;
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}
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.endp logbf
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ASM_SIZE_DIRECTIVE(logbf)
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.proc __libm_error_region
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__libm_error_region:
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.prologue
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{ .mii
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add GR_Parameter_Y=-32,sp // Parameter 2 value
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(p0) mov GR_Parameter_TAG = 152
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.save ar.pfs,GR_SAVE_PFS
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mov GR_SAVE_PFS=ar.pfs // Save ar.pfs
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}
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{ .mfi
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.fframe 64
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add sp=-64,sp // Create new stack
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nop.f 0
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mov GR_SAVE_GP=gp // Save gp
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};;
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{ .mmi
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stfs [GR_Parameter_Y] = FR_Y,16 // Store Parameter 2 on stack
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add GR_Parameter_X = 16,sp // Parameter 1 address
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.save b0, GR_SAVE_B0
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mov GR_SAVE_B0=b0 // Save b0
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};;
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.body
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{ .mib
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stfs [GR_Parameter_X] = FR_X // Store Parameter 1 on stack
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add GR_Parameter_RESULT = 0,GR_Parameter_Y
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nop.b 0 // Parameter 3 address
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}
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{ .mib
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stfs [GR_Parameter_Y] = FR_RESULT // Store Parameter 3 on stack
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add GR_Parameter_Y = -16,GR_Parameter_Y
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br.call.sptk b0=__libm_error_support# // Call error handling function
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};;
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{ .mmi
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nop.m 0
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nop.m 0
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add GR_Parameter_RESULT = 48,sp
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};;
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{ .mmi
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ldfs f8 = [GR_Parameter_RESULT] // Get return result off stack
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.restore sp
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add sp = 64,sp // Restore stack pointer
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mov b0 = GR_SAVE_B0 // Restore return address
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};;
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{ .mib
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mov gp = GR_SAVE_GP // Restore gp
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mov ar.pfs = GR_SAVE_PFS // Restore ar.pfs
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br.ret.sptk b0 // Return
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};;
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.endp __libm_error_region
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ASM_SIZE_DIRECTIVE(__libm_error_region)
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.type __libm_error_support#,@function
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.global __libm_error_support#
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