306 lines
9.8 KiB
C
306 lines
9.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __LINUX_PARPORT_PC_H
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#define __LINUX_PARPORT_PC_H
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#include <asm/io.h>
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/* --- register definitions ------------------------------- */
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#define ECONTROL(p) ((p)->base_hi + 0x2)
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#define CONFIGB(p) ((p)->base_hi + 0x1)
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#define CONFIGA(p) ((p)->base_hi + 0x0)
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#define FIFO(p) ((p)->base_hi + 0x0)
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#define EPPDATA(p) ((p)->base + 0x4)
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#define EPPADDR(p) ((p)->base + 0x3)
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#define CONTROL(p) ((p)->base + 0x2)
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#define STATUS(p) ((p)->base + 0x1)
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#define DATA(p) ((p)->base + 0x0)
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#ifdef _WORKAROUND_MCST_PP
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#define PPC_MODE(p) ((p)->base_hi + 0xf)
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#define ICR(p) ((p)->base_hi + 0xe)
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#define HCR(p) ((p)->base_hi + 0xc)
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#define DMACOUNT(p) ((p)->base_hi + 0x8)
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#define DMAADDR(p) ((p)->base_hi + 0x4)
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#define PPC_SR(p) ((p)->base + 0x8)
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/* PPC_SR fields */
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#define reqFIFOdelta (0xf << 12) /* RO Number of PIO requests in reqFIFO buffer (0x8 max) */
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#define WordFrac (0x3 << 10) /* RO Number of bytes of 4-byte word on output of.
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* dataFIFO buffer to write in peripherial device
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* so as to finish current request */
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#define StatusChange (0x1 << 9)..
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#define Threshold (0x1 << 8) /* reqFIFOdelta bit value changing from value 0x5 to 0x4.
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* indication. It shows that second 16 bytes data segment is
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* now able to be filled with another data */
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#define DMA_SysReqErr (0x1 << 7)
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#define PIO_SysReqErr (0x1 << 6)
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#define Periph_Intr (0x1 << 5) /* Peripheral device interrupt */
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#define reqFIFOErr (0x1 << 4) /* reqFIFO buffer overflow indication */
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#define ECP_Err (0x1 << 3)
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#define TO (0x1 << 2) /* Peripheral device hanging during data exchange. Onle hardware
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* mode */
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#define DMA_active (0x1 << 1) /* DMA indication. 1 -> is now running 0 -> isn't running */
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#define TC (0x1 << 0) /* Terminal Count. Data block transmition completion while.
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* DMA mode. 1 if dma_wc (DMACOUNT) counter zeroed */
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#define Normal_Intrs (Threshold | TC | Periph_Intr)
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#define Err_Intrs (DMA_SysReqErr | PIO_SysReqErr | reqFIFOErr | ECP_Err | TO )
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#define Full_Intr_Allowed (Err_Intrs | Normal_Intrs)
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/* ICR fields */
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#define MaskIntr (0x1 << 7) /* disable all interrupts if 1. If 0 enables all interrupts
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* described below. These interrups must be specified by their
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* own masks as disabled or enabled */
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#define Threshold_IntrEn (0x1 << 6) /* If 1 enables interrupt when Threshold event occures */
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#define SysReqErr_IntrEn (0x1 << 5) /* If 1 enables interrupts when DMA_SysReqErr or PIO_SysReqErr
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* events occur */
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#define StatusChange_IntrEn (0x1 << 4) /* If 1 enables interrupt when StatusChange event occures */
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#define reqFIFOErr_IntrEn (0x1 << 3) /* If 1 enables interrupt when reqFIFO event occures */
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#define Periph_IntrEn (0x1 << 2) /* If 1 enables interrupt when Periph_Intr event occures */
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#define BusErr_IntrEn (0x1 << 1) /* If 1 enables interrupts when ECP_Err or TO events occur */
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#define TC_IntrEn (0x1 << 0) /* If 1 enables interrupt when TC event occures */
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#define Normal_IntrsEn (Threshold_IntrEn | TC_IntrEn | Periph_IntrEn)
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#define Err_IntrsEn (SysReqErr_IntrEn | reqFIFOErr_IntrEn | BusErr_IntrEn)
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#define Full_Intr_AllowedEn (Err_IntrsEn | Normal_IntrsEn)
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/* For e3s only */
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#define mSPPs (0x00) /* That mode supports Compatibility and Nibble protocols */
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#define mSPPh (0x04) /* 100 That mode supports Compatibility and Nibble protocols */
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#define mPS2 (0x01)
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/* 001 That mode supports Compatibility, Nibble, Byte, EPP, ECP Protocols.
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and can implement Forward to Reverse, Reverse to Forward, Termination,
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Negotiation, Setup cycles */
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#define mECP (0x07) /* 111 That mode supports ECP protocol */
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#define mEPP (0x06) /* 110 That mode supports EPP protocol */
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#endif /* _WORKAROUND_MCST_PP */
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struct parport_pc_private {
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/* Contents of CTR. */
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unsigned char ctr;
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/* Bitmask of writable CTR bits. */
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unsigned char ctr_writable;
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/* Whether or not there's an ECR. */
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int ecr;
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/* Number of PWords that FIFO will hold. */
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int fifo_depth;
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/* Number of bytes per portword. */
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int pword;
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#ifdef _WORKAROUND_MCST_PP
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int driver_data;
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struct pci_dev *dev;
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u8 parport_rev;
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#endif
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/* Not used yet. */
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int readIntrThreshold;
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int writeIntrThreshold;
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/* buffer suitable for DMA, if DMA enabled */
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char *dma_buf;
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dma_addr_t dma_handle;
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struct list_head list;
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struct parport *port;
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};
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struct parport_pc_via_data
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{
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/* ISA PnP IRQ routing register 1 */
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u8 via_pci_parport_irq_reg;
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/* ISA PnP DMA request routing register */
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u8 via_pci_parport_dma_reg;
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/* Register and value to enable SuperIO configuration access */
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u8 via_pci_superio_config_reg;
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u8 via_pci_superio_config_data;
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/* SuperIO function register number */
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u8 viacfg_function;
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/* parallel port control register number */
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u8 viacfg_parport_control;
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/* Parallel port base address register */
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u8 viacfg_parport_base;
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};
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static __inline__ void parport_pc_write_data(struct parport *p, unsigned char d)
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{
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#ifdef DEBUG_PARPORT
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printk (KERN_DEBUG "parport_pc_write_data(%p,0x%02x)\n", p, d);
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#endif
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outb(d, DATA(p));
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}
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static __inline__ unsigned char parport_pc_read_data(struct parport *p)
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{
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unsigned char val = inb (DATA (p));
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#ifdef DEBUG_PARPORT
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printk (KERN_DEBUG "parport_pc_read_data(%p) = 0x%02x\n",
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p, val);
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#endif
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return val;
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}
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#ifdef DEBUG_PARPORT
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static inline void dump_parport_state (char *str, struct parport *p)
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{
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/* here's hoping that reading these ports won't side-effect anything underneath */
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unsigned char ecr = inb (ECONTROL (p));
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unsigned char dcr = inb (CONTROL (p));
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unsigned char dsr = inb (STATUS (p));
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static const char *const ecr_modes[] = {"SPP", "PS2", "PPFIFO", "ECP", "xXx", "yYy", "TST", "CFG"};
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const struct parport_pc_private *priv = p->physport->private_data;
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int i;
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printk (KERN_DEBUG "*** parport state (%s): ecr=[%s", str, ecr_modes[(ecr & 0xe0) >> 5]);
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if (ecr & 0x10) printk (",nErrIntrEn");
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if (ecr & 0x08) printk (",dmaEn");
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if (ecr & 0x04) printk (",serviceIntr");
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if (ecr & 0x02) printk (",f_full");
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if (ecr & 0x01) printk (",f_empty");
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for (i=0; i<2; i++) {
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printk ("] dcr(%s)=[", i ? "soft" : "hard");
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dcr = i ? priv->ctr : inb (CONTROL (p));
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if (dcr & 0x20) {
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printk ("rev");
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} else {
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printk ("fwd");
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}
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if (dcr & 0x10) printk (",ackIntEn");
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if (!(dcr & 0x08)) printk (",N-SELECT-IN");
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if (dcr & 0x04) printk (",N-INIT");
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if (!(dcr & 0x02)) printk (",N-AUTOFD");
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if (!(dcr & 0x01)) printk (",N-STROBE");
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}
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printk ("] dsr=[");
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if (!(dsr & 0x80)) printk ("BUSY");
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if (dsr & 0x40) printk (",N-ACK");
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if (dsr & 0x20) printk (",PERROR");
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if (dsr & 0x10) printk (",SELECT");
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if (dsr & 0x08) printk (",N-FAULT");
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printk ("]\n");
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return;
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}
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#else /* !DEBUG_PARPORT */
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#define dump_parport_state(args...)
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#endif /* !DEBUG_PARPORT */
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/* __parport_pc_frob_control differs from parport_pc_frob_control in that
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* it doesn't do any extra masking. */
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static __inline__ unsigned char __parport_pc_frob_control (struct parport *p,
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unsigned char mask,
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unsigned char val)
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{
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struct parport_pc_private *priv = p->physport->private_data;
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unsigned char ctr = priv->ctr;
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#ifdef DEBUG_PARPORT
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printk (KERN_DEBUG
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"__parport_pc_frob_control(%02x,%02x): %02x -> %02x\n",
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mask, val, ctr, ((ctr & ~mask) ^ val) & priv->ctr_writable);
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#endif
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ctr = (ctr & ~mask) ^ val;
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ctr &= priv->ctr_writable; /* only write writable bits. */
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outb (ctr, CONTROL (p));
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priv->ctr = ctr; /* Update soft copy */
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return ctr;
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}
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static __inline__ void parport_pc_data_reverse (struct parport *p)
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{
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__parport_pc_frob_control (p, 0x20, 0x20);
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}
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static __inline__ void parport_pc_data_forward (struct parport *p)
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{
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__parport_pc_frob_control (p, 0x20, 0x00);
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}
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static __inline__ void parport_pc_write_control (struct parport *p,
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unsigned char d)
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{
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const unsigned char wm = (PARPORT_CONTROL_STROBE |
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PARPORT_CONTROL_AUTOFD |
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PARPORT_CONTROL_INIT |
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PARPORT_CONTROL_SELECT);
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/* Take this out when drivers have adapted to newer interface. */
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if (d & 0x20) {
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printk (KERN_DEBUG "%s (%s): use data_reverse for this!\n",
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p->name, p->cad->name);
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parport_pc_data_reverse (p);
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}
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__parport_pc_frob_control (p, wm, d & wm);
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}
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static __inline__ unsigned char parport_pc_read_control(struct parport *p)
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{
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const unsigned char rm = (PARPORT_CONTROL_STROBE |
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PARPORT_CONTROL_AUTOFD |
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PARPORT_CONTROL_INIT |
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PARPORT_CONTROL_SELECT);
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const struct parport_pc_private *priv = p->physport->private_data;
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return priv->ctr & rm; /* Use soft copy */
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}
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static __inline__ unsigned char parport_pc_frob_control (struct parport *p,
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unsigned char mask,
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unsigned char val)
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{
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const unsigned char wm = (PARPORT_CONTROL_STROBE |
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PARPORT_CONTROL_AUTOFD |
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PARPORT_CONTROL_INIT |
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PARPORT_CONTROL_SELECT);
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/* Take this out when drivers have adapted to newer interface. */
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if (mask & 0x20) {
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printk (KERN_DEBUG "%s (%s): use data_%s for this!\n",
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p->name, p->cad->name,
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(val & 0x20) ? "reverse" : "forward");
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if (val & 0x20)
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parport_pc_data_reverse (p);
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else
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parport_pc_data_forward (p);
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}
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/* Restrict mask and val to control lines. */
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mask &= wm;
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val &= wm;
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return __parport_pc_frob_control (p, mask, val);
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}
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static __inline__ unsigned char parport_pc_read_status(struct parport *p)
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{
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return inb(STATUS(p));
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}
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static __inline__ void parport_pc_disable_irq(struct parport *p)
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{
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__parport_pc_frob_control (p, 0x10, 0x00);
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}
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static __inline__ void parport_pc_enable_irq(struct parport *p)
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{
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__parport_pc_frob_control (p, 0x10, 0x10);
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}
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extern void parport_pc_release_resources(struct parport *p);
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extern int parport_pc_claim_resources(struct parport *p);
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/* PCMCIA code will want to get us to look at a port. Provide a mechanism. */
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extern struct parport *parport_pc_probe_port(unsigned long base,
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unsigned long base_hi,
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int irq, int dma,
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struct device *dev,
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int irqflags);
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extern void parport_pc_unregister_port(struct parport *p);
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#endif
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