57 lines
1.6 KiB
C
57 lines
1.6 KiB
C
#ifndef _E2K_CACHE_H_
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#define _E2K_CACHE_H_
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#include <asm/e2s.h>
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#include <asm/e8c.h>
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#include <asm/e8c2.h>
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#include <asm/e1cp.h>
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#include <asm/e16c.h>
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#include <asm/e12c.h>
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#include <asm/e2c3.h>
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#define _max_(a, b) ((a) > (b) ? (a) : (b))
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#define _max3_(a, b, c) _max_((a), _max_((b), (c)))
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#define L1_CACHE_SHIFT 5
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#define L2_CACHE_SHIFT 6
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#ifdef CONFIG_E2K_MACHINE
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# if defined(CONFIG_E2K_E8C)
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# define L3_CACHE_SHIFT E8C_L3_CACHE_SHIFT
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# elif defined(CONFIG_E2K_E8C2)
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# define L3_CACHE_SHIFT E8C2_L3_CACHE_SHIFT
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# elif defined(CONFIG_E2K_E12C)
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# define L3_CACHE_SHIFT E12C_L3_CACHE_SHIFT
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# elif defined(CONFIG_E2K_E16C)
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# define L3_CACHE_SHIFT E16C_L3_CACHE_SHIFT
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# endif
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# ifndef L3_CACHE_SHIFT
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# define L3_CACHE_SHIFT 0
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# endif
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#else /* ! CONFIG_E2K_MACHINE */
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/*
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* FIXME: Take it in mind while adding new cpu type
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*/
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# define L3_CACHE_SHIFT_MAX E8C_L3_CACHE_SHIFT
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# define L3_CACHE_SHIFT L3_CACHE_SHIFT_MAX
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#endif /* CONFIG_E2K_MACHINE */
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#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
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#define L2_CACHE_BYTES (1 << L2_CACHE_SHIFT)
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#define L3_CACHE_BYTES (L3_CACHE_SHIFT ? (1 << L3_CACHE_SHIFT) : 0)
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/* Stores pass through L1$, so we should use the biggest size. */
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#define SMP_CACHE_BYTES _max3_(L1_CACHE_BYTES, L2_CACHE_BYTES, \
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L3_CACHE_BYTES)
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#define INTERNODE_CACHE_SHIFT _max3_(L1_CACHE_SHIFT, L2_CACHE_SHIFT, \
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L3_CACHE_SHIFT)
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#define INTERNODE_CACHE_BYTES (1 << INTERNODE_CACHE_SHIFT)
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#define cache_line_size() _max3_(L1_CACHE_BYTES, L2_CACHE_BYTES, \
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L3_CACHE_BYTES)
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#define __read_mostly __attribute__((__section__(".data..read_mostly")))
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#endif /* _E2K_CACHE_H_ */
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